Revisiting variance gamma pricing : an application to S&P500 index options

We reformulate the Lévy-Kintchine formula to make it suitable for modelling the stochastic time-changing effects of Lévy processes. Using Variance-Gamma (VG) process as an example, it illustrates the dynamic properties of a Lévy process and revisits the earlier work of Geman (2002). It also shows how the model can be calibrated to price options under a Lévy VG process, and calibrates the model on recent S&P500 index options data. It then compares the pricing performance of Fast Fourier Transform (FFT) and Fractional Fourier Transform (FRFT) approaches to model calibration and investigates the trade-off between calibration performance and required calculation time

A Lower Bound Technique for Communication in BSP

Communication is a major factor determining the performance of algorithms on current computing systems; it is therefore valuable to provide tight lower bounds on the communication complexity of computations. This paper presents a lower bound technique for the communication complexity in the bulk-synchronous parallel (BSP) model of a given class of DAG computations. The derived bound is expressed in terms of the switching potential of a DAG, that is, the number of permutations that the DAG can realize when viewed as a switching network. The proposed technique yields tight lower bounds for the fast Fourier transform (FFT), and for any sorting and permutation network. A stronger bound is also derived for the periodic balanced sorting network, by applying this technique to suitable subnetworks. Finally, we demonstrate that the switching potential captures communication requirements even in computational models different from BSP, such as the I/O model and the LPRAM

On an application of extended kalman filtering to activated sludge processes: a benchmark study

The growing demand for performance improvements of urban wastewater system operation coupled with the lack of instrumentation in most wastewater treatment plants motivates the need for non-linear observers to be used as virtual sensors for estimation and control of effluent quality. This paper is focused on the development of a general procedure for on-line monitoring of activated sludge processes, using an extended Kalman filter (EKF) approach. The Activated Sludge Model no.1 (ASM1) is selected to describe the biological processes in the reactor. On-line measurements are corrupted by additive white noise and unknown inputs are modelled using fast Fourier transform (FFT) and spectrum analyses. The given procedure aims at reducing the original ASM1 model to an observable and identifiable model, which can be used for joint non-linear state and parameter estimations. Simulation results are presented to demonstrate the effectiveness of the proposed methods and show that on-line monitoring of SND and XND concentrations is achieved when dynamic input data are used tocharacterize the influent wastewater for the model

A Novel Design and Implementation of FBMC Transceiver for Low Power Applications

The complex structure of the Filter Bank Multicarrier (FBMC) communication system is the main drawback affecting the performance of the system and causes a high-power consumption. The complexity arises from using a polyphase filter bank, which consists of fast Fourier Transform/ Inverse Fast Fourier Transform (FFT/IFFT) processors and a filter bank of Finite Impulse Response (FIR) filters. This paper presents the analysis and the implementation of a new design model for FBMC transceiver in which the polyphase filter is removed completely in both transmitter and receiver and uses instead of it, a multi-level cascaded structure of FIR subfilters. The coefficients of each subfilter selected using an optimization algorithm to minimize the amplitude of sidelobes compared to the amplitude of the main lobe in the frequency response of the subfilter. The proposed design reduces the number of multiplications compared to the conventional design by 65%. The field-programmable gate array (FPGA) implementation results indicate that the proposed architecture saves 24% of resources of the FPGA board, works faster, and saves 27% of power consumption compared to conventional FBMC transceiver