87 research outputs found
Passive and active circuits in cmos technology for rf, microwave and millimeter wave applications
The permeation of CMOS technology to radio frequencies and beyond has
fuelled an urgent need for a diverse array of passive and active circuits that address the
challenges of rapidly emerging wireless applications. While traditional analog based
design approaches satisfy some applications, the stringent requirements of newly
emerging applications cannot necessarily be addressed by existing design ideas and
compel designers to pursue alternatives. One such alternative, an amalgamation of
microwave and analog design techniques, is pursued in this work.
A number of passive and active circuits have been designed using a combination
of microwave and analog design techniques. For passives, the most crucial challenge to
their CMOS implementation is identified as their large dimensions that are not
compatible with CMOS technology. To address this issue, several design techniques –
including multi-layered design and slow wave structures – are proposed and
demonstrated through experimental results after being suitably tailored for CMOS
technology. A number of novel passive structures - including a compact 10 GHz hairpin resonator, a broadband, low loss 25-35 GHz Lange coupler, a 25-35 GHz thin film
microstrip (TFMS) ring hybrid, an array of 0.8 nH and 0.4 nH multi-layered high self
resonant frequency (SRF) inductors are proposed, designed and experimentally verified.
A number of active circuits are also designed and notable experimental results
are presented. These include 3-10 GHz and DC-20 GHz distributed low noise amplifiers
(LNA), a dual wideband Low noise amplifier and 15 GHz distributed voltage controlled
oscillators (DVCO). Distributed amplifiers are identified as particularly effective in the
development of wideband receiver front end sub-systems due to their gain flatness,
excellent matching and high linearity. The most important challenge to the
implementation of distributed amplifiers in CMOS RFICs is identified as the issue of
their miniaturization. This problem is solved by using integrated multi-layered inductors
instead of transmission lines to achieve over 90% size compression compared to earlier
CMOS implementations. Finally, a dual wideband receiver front end sub-system is
designed employing the miniaturized distributed amplifier with resonant loads and
integrated with a double balanced Gilbert cell mixer to perform dual band operation. The
receiver front end measured results show 15 dB conversion gain, and a 1-dB
compression point of -4.1 dBm in the centre of band 1 (from 3.1 to 5.0 GHz) and -5.2
dBm in the centre of band 2 (from 5.8 to 8 GHz) with input return loss less than 10 dB
throughout the two bands of operation
Radio-frequency integrated-circuit design for CMOS single-chip UWB systems
Low cost, a high-integrated capability, and low-power consumption are the basic requirements for ultra wide band (UWB) system design in order for the system to be adopted in various commercial electronic devices in the near future. Thus, the highly integrated transceiver is trended to be manufactured by companies using the latest silicon based complimentary metal-oxide-silicon (CMOS) processes. In this dissertation, several new structural designs are proposed, which provide solutions for some crucial RF blocks in CMOS for UWB for commercial applications. In this dissertation, there is a discussion of the development, as well as an illustration, of a fully-integrated ultra-broadband transmit/receive (T/R) switch which uses nMOS transistors with deep n-well in a standard 0.18-μm CMOS process. The new CMOS T/R switch exploits patterned-ground-shield on-chip inductors together with MOSFET’s parasitic capacitances in order to synthesize artificial transmission lines which result in low insertion loss over an extremely wide bandwidth. Within DC-10 GHz, 10-18 GHz, and 18-20 GHz, the developed CMOS T/R switch exhibits insertion loss of less than 0.7, 1.0 and 2.5 dB and isolation between 32-60 dB, 25-32 dB, and 25-27 dB, respectively. The measured 1-dB power compression point and input third-order intercept point reach as high as 26.2 and 41 dBm, respectively. Further, there is a discussion and demonstration of a tunable Carrier-based Time-gated UWB transmitter in this dissertation which uses a broadband multiplier, a novel fully integrated single pole single throw (SPST) switch designed by the CMOS process, where a tunable instantaneous bandwidth from 500 MHz to 4 GHz is exhibited by adjusting the width of the base band impulses in time domain. The SPST switch utilizes the synthetic transmission line concept and multiple reflections technique in order to realize a flat insertion loss less than 1.5 dB from 3.1 GHz to 10.6 GHz and an extremely high isolation of more than 45 dB within this frequency range. A fully integrated complementary LC voltage control oscillator (VCO), designed with a tunable buffer, operates from 4.6 GHz to 5.9 GHz. The measurement results demonstrate that the integrated VCO has a very low phase noise of –117 dBc/ Hz at 1 MHz offset. The fully integrated VCO achieves a very high figure of merit (FOM) of 183.5 using standard CMOS process while consuming 4 mA DC current
RECONFIGURABLE AND WIDEBAND SAW RESONATOR-BASED FILTERS & CMOS BANDPASS FILTERS FOR WIRELESS COMMUNICATION SYSTEM
Ph.DDOCTOR OF PHILOSOPH
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