5,302 research outputs found

    System configuration, fault detection, location, isolation and restoration: a review on LVDC Microgrid protections

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    Low voltage direct current (LVDC) distribution has gained the significant interest of research due to the advancements in power conversion technologies. However, the use of converters has given rise to several technical issues regarding their protections and controls of such devices under faulty conditions. Post-fault behaviour of converter-fed LVDC system involves both active converter control and passive circuit transient of similar time scale, which makes the protection for LVDC distribution significantly different and more challenging than low voltage AC. These protection and operational issues have handicapped the practical applications of DC distribution. This paper presents state-of-the-art protection schemes developed for DC Microgrids. With a close look at practical limitations such as the dependency on modelling accuracy, requirement on communications and so forth, a comprehensive evaluation is carried out on those system approaches in terms of system configurations, fault detection, location, isolation and restoration

    Improved Accuracy Area Efficient Hybrid CMOS/GaN DC-DC Buck Converterfor High Step-Down Ratio Applications

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    abstract: Point of Load (POL) DC-DC converters are increasingly used in space applications, data centres, electric vehicles, portable computers and devices and medical electronics. Heavy computing and processing capabilities of the modern devices have ushered the use of higher battery supply voltage to increase power storage. The need to address this consumer experience driven requirement has propelled the evolution of the next generation of small form-factor power converters which can operate with higher step down ratios while supplying heavy continuous load currents without sacrificing efficiency. Constant On-Time (COT) converter topology is capable of achieving stable operation at high conversion ratio with minimum off-chip components and small silicon area. This work proposes a Constant On-Time buck dc-dc converter for a wide dynamic input range and load currents from 100mA to 10A. Accuracy of this ripple based converter is improved by a unique voltage positioning technique which modulates the reference voltage to lower the average ripple profile close to the nominal output. Adaptive On-time block features a transient enhancement scheme to assist in faster voltage droop recovery when the output voltage dips below a defined threshold. UtilizingGallium Nitride (GaN) power switches enable the proposed converter to achieve very high efficiency while using smaller size inductor-capacitor (LC) power-stage. Use of novel Superjunction devices with higher drain-source blocking voltage simplifies the complex driver design and enables faster frequency of operation. It allows 1.8VComplementary Metal-Oxide Semiconductor (CMOS) devices to effectively drive GaNpower FETs which require 5V gate signal swing. The presented controller circuit uses internal ripple generation which reduces reliance on output cap equivalent series resistance (ESR) for loop stability and facilitates ripples reduction at the output. The ripple generation network is designed to provide ai optimally stable performance while maintaining load regulation and line regulation accuracy withing specified margin. The chip with ts external Power FET package is proposed to be integrated on a printed circuit board for testing. The designed power converter is expected to operate under 200 MRad of a total ionising dose of radiation enabling it to function within large hadron collider at CERN and space satellite and probe missions.Dissertation/ThesisMasters Thesis Electrical Engineering 201

    Active Stabilization Techniques for Cascaded Systems in DC Microgrids

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    Determination of protection system requirements for DC UAV electrical power networks for enhanced capability and survivability

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    A growing number of designs of future Unmanned Aerial Vehicle (UAV) applications utilise dc for the primary power distribution method. Such systems typically employ large numbers of power electronic converters as interfaces for novel loads and generators. The characteristic behaviour of these systems under electrical fault conditions, and in particular their natural response, can produce particularly demanding protection requirements. Whilst a number of protection methods for multi-terminal dc networks have been proposed in literature, these are not universally applicable and will not meet the specific protection challenges associated with the aerospace domain. Through extensive analysis, this paper seeks to determine the operating requirements of protection systems for compact dc networks proposed for future UAV applications, with particular emphasis on dealing with the issues of capacitive discharge in these compact networks. The capability of existing multi-terminal dc network protection methods and technologies are then assessed against these criteria in order to determine their suitability for UAV applications. Recommendations for best protection practice are then proposed and key inhibiting research challenges are discussed

    Control And Topology Improvements In Half-bridge Dc-dc Converters

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    Efficiency and transient response are two key requirements for DC-DC converters. Topology and control are two key topics in this dissertation. A variety of techniques for DC-DC converter performance improvement are presented in this work. Focusing on the efficiency issue, a variety of clamping techniques including both active and passive methods are presented after the ringing issues in DC-DC converters are investigated. By presenting the clamping techniques, a big variety of energy management concepts are introduced. The active bridge-capacitor tank clamping and FET-diode-capacitor tank clamping are close ideas, which transfer the leakage inductor energy to clamping capacitor to prevent oscillation between leakage inductor and junction capacitor of MOSFETs. The two-FET-clamping tank employs two MOSFETs to freewheeling the leakage current when the main MOSFETs of the half-bridge are both off. Driving voltage variation on the secondary side Synchronous Rectifier (SR) MOSFETs in self-driven circuit due to input voltage variation in bus converter applications is also investigated. One solution with a variety of derivations is proposed using zerner-capacitor combination to clamping the voltage while maintaining reasonable power losses. Another efficiency improvement idea comes from phase-shift concept in DC-DC converters. By employing phase-shift scheme, the primary side and the secondary side two MOSFETs have complementary driving signals respectively, which allow the MOSFET to be turned on with Zero Voltage Switching (ZVS). Simulation verified the feasibility of the proposed phase-shifted DC-DC converter. From the control scheme point of view, a novel peak current mode control concept for half-bridge topologies is presented. Aiming at compensating the imbalanced voltage due to peak current mode control in symmetric half-bridge topologies, an additional voltage compensation loop is used to bring the half-bridge capacitor voltage back to balance. In the proposed solutions, one scheme is applied on symmetric half-bridge topology and the other one is applied on Duty-cycle-shifted (DCS) half-bridge topology. Both schemes employ simple circuitry and are suitable for integration. Loop stability issues are also investigated in this work. Modeling work shows the uncompensated half-bridge topology cannot be stabilized under all conditions and the additional compensation loop helps to prevent the voltage imbalance effectively

    Transient Mitigation of DC–DC Converters for High Output Current Slew Rate Applications

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    Control of multi-terminal HVDC networks towards wind power integration: A review

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    © 2015 Elsevier Ltd. More interconnections among countries and synchronous areas are foreseen in order to fulfil the EU 2050 target on the renewable generation share. One proposal to accomplish this challenging objective is the development of the so-called European SuperGrid. Multi-terminal HVDC networks are emerging as the most promising technologies to develop such a concept. Moreover, multi-terminal HVDC grids are based on highly controllable devices, which may allow not only transmitting power, but also supporting the AC grids to ensure a secure and stable operation. This paper aims to present an overview of different control schemes for multi-terminal HVDC grids, including the control of the power converters and the controls for power sharing and the provision of ancillary services. This paper also analyses the proposed modifications of the existing control schemes to manage high participation shares of wind power generation in multi-terminal grids.Postprint (author's final draft

    Analysis And Design Optimization Of Multiphase Converter

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    Future microprocessors pose many challenges to the power conversion techniques. Multiphase synchronous buck converters have been widely used in high current low voltage microprocessor application. Design optimization needs to be carefully carried out with pushing the envelope specification and ever increasing concentration towards power saving features. In this work, attention has been focused on dynamic aspects of multiphase synchronous buck design. The power related issues and optimizations have been comprehensively investigated in this paper. In the first chapter, multiphase DC-DC conversion is presented with background application. Adaptive voltage positioning and various nonlinear control schemes are evaluated. Design optimization are presented to achieve best static efficiency over the entire load range. Power loss analysis from various operation modes and driver IC definition are studied thoroughly to better understand the loss terms and minimize the power loss. Load adaptive control is then proposed together with parametric optimization to achieve optimum efficiency figure. New nonlinear control schemes are proposed to improve the transient response, i.e. load engage and load release responses, of the multiphase VR in low frequency repetitive transient. Drop phase optimization and PWM transition from long tri-state phase are presented to improve the smoothness and robustness of the VR in mode transition. During high frequency repetitive transient, the control loop should be optimized and nonlinear loop should be turned off. Dynamic current sharing are thoroughly studied in chapter 4. The output impedance of the multiphase v synchronous buck are derived to assist the analysis. Beat frequency is studied and mitigated by proposing load frequency detection scheme by turning OFF the nonlinear loop and introducing current protection in the control loop. Dynamic voltage scaling (DVS) is now used in modern Multi-Core processor (MCP) and multiprocessor System-on-Chip (MPSoC) to reduce operational voltage under light load condition. With the aggressive motivation to boost dynamic power efficiency, the design specification of voltage transition (dv/dt) for the DVS is pushing the physical limitation of the multiphase converter design and the component stress as well. In this paper, the operation modes and modes transition during dynamic voltage transition are illustrated. Critical dead-times of driver IC design and system dynamics are first studied and then optimized. The excessive stress on the control MOSFET which increases the reliability concern is captured in boost mode operation. Feasible solutions are also proposed and verified by both simulation and experiment results. CdV/dt compensation for removing the AVP effect and novel nonlinear control scheme for smooth transition are proposed for dealing with fast voltage positioning. Optimum phase number control during dynamic voltage transition is also proposed and triggered by voltage identification (VID) delta to further reduce the dynamic loss. The proposed schemes are experimentally verified in a 200 W six phase synchronous buck converter. Finally, the work is concluded. The references are listed

    Fault Management in DC Microgrids:A Review of Challenges, Countermeasures, and Future Research Trends

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    The significant benefits of DC microgrids have instigated extensive efforts to be an alternative network as compared to conventional AC power networks. Although their deployment is ever-growing, multiple challenges still occurred for the protection of DC microgrids to efficiently design, control, and operate the system for the islanded mode and grid-tied mode. Therefore, there are extensive research activities underway to tackle these issues. The challenge arises from the sudden exponential increase in DC fault current, which must be extinguished in the absence of the naturally occurring zero crossings, potentially leading to sustained arcs. This paper presents cut-age and state-of-the-art issues concerning the fault management of DC microgrids. It provides an account of research in areas related to fault management of DC microgrids, including fault detection, location, identification, isolation, and reconfiguration. In each area, a comprehensive review has been carried out to identify the fault management of DC microgrids. Finally, future trends and challenges regarding fault management in DC-microgrids are also discussed
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