Compensation technique for nonlinear distortion in RF circuits for multi-standard wireless systems

Recent technological advances in the RF and wireless industry has led to the design requirement of more sophisticated devices which can meet stringent specifications of bandwidth, data rate and throughput. These devices are required to be extremely sensitive and hence any external interference from other systems can severely affect the device and the output. This thesis introduces the existing problem in nonlinear components in a multi-standard wireless system due to interfering signals and suggests potential solution to the problem. Advances in RF and wireless systems with emerging new communication standards have made reconfigurablility and tunability a very viable option. RF transceivers are optimised for multi-standard operation, where one band of frequency can act as an interfering signal to the other band. Due to the presence of nonlinear circuits in the transceiver chains such as power amplifiers, reconfigurable and tunable filters and modulators, these interfering signals produce nonlinear distortion products which can deform the output signal considerably. Hence it becomes necessary to block these interfering signals using special components. The main objective of this thesis is to analyse and experimentally verify the nonlinear distortions in various RF circuits such as reconfigurable and tunable filters and devise ways to minimize the overall nonlinear distortion in the presence of other interfering signals. Reconfigurbality and tunablity in filters can be achieved using components such as varactor diodes, PIN diodes and optical switches. Nonlinear distortions in such components are measured using different signals and results noted. The compensation method developed to minimize nonlinear distortions in RF circuits caused due to interfering signals is explored thoroughly in this thesis. Compensation method used involves the design of novel microstrip bandstop filters which can block the interfering signals and hence give a clean output spectrum at the final stage. Recent years have seen the emergence of electronic band gap technology which has “band gap” properties meaning that a bandstop response is seen within particular range of frequency. This concept was utilised in the design of several novel bandstop filters using defected microstrip structure. Novel tunable bandstop filters has been introduced in order to block the unwanted signal. Fixed single-band and dual-band filters using DMS were fabricated with excellent achieved results. These filters were further extended to tunable structures. A dual-band tunable filter with miniaturized size was developed and designed. The designed filters were further used in the compensation technique where different scenarios showing the effect of interfering signals in wireless transceiver were described. Mathematical analysis proved the validation of the use of a bandstop filter as an inter-stage component. Distortion improvements of around 10dB have been experimentally verified using a power amplifier as device under test. Further experimental verification was carried out with a transmitter which included reconfigurable RF filters and power amplifier where an improvement of 15dB was achieved

A digital polar transmitter for multi-band OFDM Ultra-WideBand

Linear power amplifiers used to implement the Ultra-Wideband standard must be backed off from optimum power efficiency to meet the standard specifications and the power efficiency suffers. The problem of low efficiency can be mitigated by polar modulation. Digital polar architectures have been employed on numerous wireless standards like GSM, EDGE, and WLAN, where the fractional bandwidths achieved are only about 1%, and the power levels achieved are often in the vicinity of 20 dBm. Can the architecture be employed on wireless standards with low-power and high fractional bandwidth requirements and yet achieve good power efficiency? To answer these question, this thesis studies the application of a digital polar transmitter architecture with parallel amplifier stages for UWB. The concept of the digital transmitter is motivated and inspired by three factors. First, unrelenting advances in the CMOS technology in deep-submicron process and the prevalence of low-cost Digital Signal processing have resulted in the realization of higher level of integration using digitally intensive approaches. Furthermore, the architecture is an evolution of polar modulation, which is known for high power efficiency in other wireless applications. Finally, the architecture is operated as a digital-to-analog converter which circumvents the use of converters in conventional transmitters. Modeling and simulation of the system architecture is performed on the Agilent Advanced Design System Ptolemy simulation platform. First, by studying the envelope signal, we found that envelope clipping results in a reduction in the peak-to-average power ratio which in turn improves the error vector magnitude performance (figure of merit for the study). In addition, we have demonstrated that a resolution of three bits suffices for the digital polar transmitter when envelope clipping is performed. Next, this thesis covers a theoretical derivation for the estimate of the error vector magnitude based on the resolution, quantization and phase noise errors. An analysis on the process variations - which result in gain and delay mismatches - for a digital transmitter architecture with four bits ensues. The above studies allow RF designers to estimate the number of bits required and the amount of distortion that can be tolerated in the system. Next, a study on the circuit implementation was conducted. A DPA that comprises 7 parallel RF amplifiers driven by a constant RF phase-modulated signal and 7 cascode transistors (individually connected in series with the bottom amplifiers) digitally controlled by a 3-bit digitized envelope signal to reconstruct the UWB signal at the output. Through the use of NFET models from the IBM 130-nm technology, our simulation reveals that our DPA is able to achieve an EVM of - 22 dB. The DPA simulations have been performed at 3.432 GHz centre frequency with a channel bandwidth of 528 MHz, which translates to a fractional bandwidth of 15.4%. Drain efficiencies of 13.2/19.5/21.0% have been obtained while delivering -1.9/2.5/5.5 dBm of output power and consuming 5/9/17 mW of power. In addition, we performed a yield analysis on the digital polar amplifier, based on unit-weighted and binary-weighted architecture, when gain variations are introduced in all the individual stages. The dynamic element matching method is also introduced for the unit-weighted digital polar transmitter. Monte Carlo simulations reveal that when the gain of the amplifiers are allowed to vary at a mean of 1 with a standard deviation of 0.2, the binary-weighted architecture obtained a yield of 79%, while the yields of the unit-weighted architectures are in the neighbourhood of 95%. Moreover, the dynamic element matching technique demonstrates an improvement in the yield by approximately 3%. Finally, a hardware implementation for this architecture based on software-defined arbitrary waveform generators is studied. In this section, we demonstrate that the error vector magnitude results obtained with a four-stage binary-weighted digital polar transmitter under ideal combining conditions fulfill the European Computer Manufacturers Association requirements. The proposed experimental setup, believed to be the first ever attempted, confirm the feasibility of a digital polar transmitter architecture for Ultra-Wideband. In addition, we propose a number of power combining techniques suitable for the hardware implementation. Spatial power combining, in particular, shows a high potential for the digital polar transmitter architecture. The above studies demonstrate the feasibility of the digital polar architecture with good power efficiency for a wideband wireless standard with low-power and high fractional bandwidth requirements

Enhancing the BER and ACLR for the HPA Using Pre-Distortion Technique

Power amplifiers are key components in wireless transceivers. Their function is to amplify signal and generate the required Radio Frequency (RF) power that allows to transmit the signal over an appropriate range. The Orthogonal Frequency Division Multiplexing (OFDM) systems are highly sensitive to nonlinear distortion introduced by High Power Amplifier (HPA). The HPA nonlinearity causes in-band and out-of-band distortions. The linearization techniques are used to compensate the nonlinear effects of the high power amplifier. These techniques correct the distortion effects resulting from nonlinearities in the transmitted signal. Many linearization techniques have been developed to improve power amplifier linearity and to decrease both Bit Error Rate (BER) and Adjacent Channel Leakage Ratio (ACLR). This work is set to run the high power amplifier in the nonlinear region. It is also attempting to analyze the resulting signal in terms of the BER and ACLR, next employs pre-distortion linearization techniques to reduce the distortion introduced in this region. According to Digital Video Broadcasting-Terrestrial (DVB-T) standard the linearization techniques, circuit and the OFDM transmitter and receiver is designed and implemented through using computer simulation of AWR Design Environment

Integrated Filters and Couplers for Next Generation Wireless Tranceivers

The main focus of this thesis is to investigate the critical nonlinear distortion issues affecting RF/Microwave components such as power amplifiers (PA) and develop new and improved solutions that will improve efficiency and linearity of next generation RF/Microwave mobile wireless communication systems. This research involves evaluating the nonlinear distortions in PA for different analog and digital signals which have been a major concern. The second harmonic injection technique is explored and used to effectively suppress nonlinear distortions. This method consists of simultaneously feeding back the second harmonics at the output of the power amplifier (PA) into the input of the PA. Simulated and measured results show improved linearity results. However, for increasing frequency bandwidth, the suppression abilities reduced which is a limitation for 4G LTE and 5G networks that require larger bandwidth (above 5 MHz). This thesis explores creative ways to deal with this major drawback. The injection technique was modified with the aid of a well-designed band-stop filter. The compact narrowband notch filter designed was able to suppress nonlinear distortions very effectively when used before the PA. The notch filter is also integrated in the injection technique for LTE carrier aggregation (CA) with multiple carriers and significant improvement in nonlinear distortion performance was observed. This thesis also considers maximizing efficiency alongside with improved linearity performance. To improve on the efficiency performance of the PA, the balanced PA configuration was investigated. However, another major challenge was that the couplers used in this configuration are very large in size at the desired operating frequency. In this thesis, this problem was solved by designing a compact branch line coupler. The novel coupler was simulated, fabricated and measured with performance comparable to its conventional equivalent and the coupler achieved substantial size reduction over others. The coupler is implemented in the balanced PA configuration giving improved input and output matching abilities. The proposed balanced PA is also implemented in 4G LTE and 5G wireless transmitters. This thesis provides simulation and measured results for all balanced PA cases with substantial efficiency and linearity improvements observed even for higher bandwidths (above 5 MHz). Additionally, the coupler is successfully integrated with rectifiers for improved energy harvesting performance and gave improved RF-dc conversion efficienc

Design and Linearization of Energy Efficiency Power Amplifier in Nonlinear OFDM Transmitter for LTE-5G Applications. Simulation and measurements of energy efficiency power amplifier in the presence of nonlinear OFDM transmitter system and digital predistortion based on Hammerstein-Wiener method

This research work has made an effort to understand a novel line of radio frequency power amplifiers (RFPAs) that address initiatives for efficiency enhancement and linearity compensation to harmonize the fifth generation (5G) campaign. The objective is to enhance the performance of an orthogonal frequency division multiplexing-long term evolution (OFDM-LTE) transmitter by reducing the nonlinear distortion of the RFPA. The first part of this work explores the design and implementation of 15.5 W class AB RF power amplifier, adopting a balanced technique to stimulate efficiency enhancement and redeeming exhibition of excessive power in the transmitter. Consequently, this work goes beyond improving efficiency over a linear RF power amplifier design; in which a comprehensive investigation on the fundamental and harmonic components of class F RF power amplifier using a load-pull approach to realise an optimum load impedance and the matching network is presented. The frequency bandwidth for both amplifiers was allocated to operate in the 2.620-2.690 GHz of mobile LTE applications. The second part explores the development of the behavioural model for the class AB power amplifier. A particular novel, Hammerstein-Wiener based model is proposed to describe the dynamic nonlinear behaviour of the power amplifier. The RF power amplifier nonlinear distortion is approximated using a new linear parameter approximation approach. The first and second-order Hammerstein-Wiener using the Normalised Least Mean Square Error (NLMSE) algorithm is used with the aim of easing the complexity of filtering process during linear memory cancellation. Moreover, an enhanced adaptive Wiener model is proposed to explore the nonlinear memory effect in the system. The proposed approach is able to balance between convergence speed and high-level accuracy when compared with behavioural modelling algorithms that are more complex in computation. Finally, the adaptive predistorter technique is implemented and verified in the OFDM transceiver test-bed. The results were compared against the computed one from MATLAB simulation for OFDM and 5G modulation transmitters. The results have confirmed the reliability of the model and the effectiveness of the proposed predistorter.Fundacão para a Ciência e a Tecnologia, Portugal, under European Union’s Horizon 2020 research and innovation programme ... grant agreement H2020-MSCA-ITN- 2016 SECRET-722424 I also acknowledge the role of the National Space Research and Development Agency (NASRDA) Sokoto State Government Petroleum Technology Trust Fund (PTDF

Analysis and design of low power CMOS ultra wideband receiver

This research concentrates on the design and analysis of low power ultra wideband receivers for Multiband Orthogonal Frequency Division Multiplexing systems. Low power design entails different performance tradeoffs, which are analyzed. Relationship among power consumption, achievable noise figure and linearity performance including distortion products (cross-modulation, inter-modulation and harmonic distortion) are derived. From these relationships, circuit design proceeds with allocation of gain among different sub circuit blocks for power optimum system. A power optimum RF receiver front-end for MB-OFDM based UWB systems is designed that covers all the MB-OFDM spectrum between 3.1 GHZ to 9.6 GHZ. The receiver consists of a low-noise amplifier, down-converter, channel select filter and programmable gain amplifier and occupies only 1mm 2 in 0.13um CMOS process. Receiver consumes 20 mA from a 1.2 V supply and has the measured gain of 69db, noise figure less than 6 dB and input IIP 3 of -6 dBm

Transformer NN-based behavioral modeling and predistortion for wideband pas

Abstract. This work investigates the suitability of transformer neural networks (NNs) for behavioral modeling and the predistortion of wideband power amplifiers. We propose an augmented real-valued time delay transformer NN (ARVTDTNN) model based on a transformer encoder that utilizes the multi-head attention mechanism. The inherent parallelized computation nature of transformers enables faster training and inference in the hardware implementation phase. Additionally, transformers have the potential to learn complex nonlinearities and long-term memory effects that will appear in future high-bandwidth power amplifiers. The experimental results based on 100 MHz LDMOS Doherty PA show that the ARVTDTNN model exhibits superior or comparable performance to the state-of-the-art models in terms of normalized mean square error (NMSE) and adjacent channel power ratio (ACPR). It improves the NMSE and ACPR up to −37.6 dB and −41.8 dB, respectively. Moreover, this approach can be considered as a generic framework to solve sequence-to-one regression problems with the transformer architecture

ワイヤレス通信のための先進的な信号処理技術を用いた非線形補償法の研究

The inherit nonlinearity in analogue front-ends of transmitters and receivers have had primary impact on the overall performance of the wireless communication systems, as it gives arise of substantial distortion when transmitting and processing signals with such circuits. Therefore, the nonlinear compensation (linearization) techniques become essential to suppress the distortion to an acceptable extent in order to ensure sufficient low bit error rate. Furthermore, the increasing demands on higher data rate and ubiquitous interoperability between various multi-coverage protocols are two of the most important features of the contemporary communication system. The former demand pushes the communication system to use wider bandwidth and the latter one brings up severe coexistence problems. Having fully considered the problems raised above, the work in this Ph.D. thesis carries out extensive researches on the nonlinear compensations utilizing advanced digital signal processing techniques. The motivation behind this is to push more processing tasks to the digital domain, as it can potentially cut down the bill of materials (BOM) costs paid for the off-chip devices and reduce practical implementation difficulties. The work here is carried out using three approaches: numerical analysis & computer simulations; experimental tests using commercial instruments; actual implementation with FPGA. The primary contributions for this thesis are summarized as the following three points: 1) An adaptive digital predistortion (DPD) with fast convergence rate and low complexity for multi-carrier GSM system is presented. Albeit a legacy system, the GSM, however, has a very strict requirement on the out-of-band emission, thus it represents a much more difficult hurdle for DPD application. It is successfully implemented in an FPGA without using any other auxiliary processor. A simplified multiplier-free NLMS algorithm, especially suitable for FPGA implementation, for fast adapting the LUT is proposed. Many design methodologies and practical implementation issues are discussed in details. Experimental results have shown that the DPD performed robustly when it is involved in the multichannel transmitter. 2) The next generation system (5G) will unquestionably use wider bandwidth to support higher throughput, which poses stringent needs for using high-speed data converters. Herein the analog-to-digital converter (ADC) tends to be the most expensive single device in the whole transmitter/receiver systems. Therefore, conventional DPD utilizing high-speed ADC becomes unaffordable, especially for small base stations (micro, pico and femto). A digital predistortion technique utilizing spectral extrapolation is proposed in this thesis, wherein with band-limited feedback signal, the requirement on ADC speed can be significantly released. Experimental results have validated the feasibility of the proposed technique for coping with band-limited feedback signal. It has been shown that adequate linearization performance can be achieved even if the acquisition bandwidth is less than the original signal bandwidth. The experimental results obtained by using LTE-Advanced signal of 320 MHz bandwidth are quite satisfactory, and to the authors’ knowledge, this is the first high-performance wideband DPD ever been reported. 3) To address the predicament that mobile operators do not have enough contiguous usable bandwidth, carrier aggregation (CA) technique is developed and imported into 4G LTE-Advanced. This pushes the utilization of concurrent dual-band transmitter/receiver, which reduces the hardware expense by using a single front-end. Compensation techniques for the respective concurrent dual-band transmitter and receiver front-ends are proposed to combat the inter-band modulation distortion, and simultaneously reduce the distortion for the both lower-side band and upper-side band signals.電気通信大学201

Class-E Power Amplifiers in Modern RF Transmitters

Power amplifiers have been playing a vital role in most wireless communication systems. In order to improve efficiency of wireless systems, advanced transmitter architectures, such as Doherty amplifiers, outphasing amplifiers, supply voltage modulation techniques are widely used. The goal of this work is to develop novel techniques for building load modulation transmitters based on class-E power amplifiers. The first contribution is an analytical model for derivation load network parameters. The proposed model derives the parameters for both the peak and back-off power levels providing high efficiency. The proposed model demonstrates, that class-E PA with shunt capacitance and shunt filter is capable of providing high drain efficiency for back-off output power levels. The second contribution is a design of a wideband class-E power amplifier (PA) with shunt capacitance and shunt filter. The broadband operation has been achieved by application of the double reactance compensation technique. Simulated and experimental results are presented. The performance of the fabricated PA is compared with existing wideband PAs. The third contribution is application of the proposed technique to outphasing PA design. The designed outphasing PA was optimized, fabricated and tested. A possibility to extend the operational bandwidth of the PA is considered. Also the application of the proposed technique to Doherty PA design is demonstrated. The fourth contribution is linearization of outphasing PA. Firstly, an analytical model describing the nonlinearity of nonisolated combiners under amplitude imbalance is presented. Secondly, a novel phase-only predistortion technique for class-E outphasing PAs is proposed. Thirdly, linearization of the fabricated outphasing PA based on memory polynomial model is demonstrated using a 64QAM OFDM modulated signal with 20 MHz bandwidth. Overall, this work provides novel techniques for load modulation transmitter design based on class-E power amplifiers with shunt capacitance and shunt filter