A survey on OFDM-based elastic core optical networking

Orthogonal frequency-division multiplexing (OFDM) is a modulation technology that has been widely adopted in many new and emerging broadband wireless and wireline communication systems. Due to its capability to transmit a high-speed data stream using multiple spectral-overlapped lower-speed subcarriers, OFDM technology offers superior advantages of high spectrum efficiency, robustness against inter-carrier and inter-symbol interference, adaptability to server channel conditions, etc. In recent years, there have been intensive studies on optical OFDM (O-OFDM) transmission technologies, and it is considered a promising technology for future ultra-high-speed optical transmission. Based on O-OFDM technology, a novel elastic optical network architecture with immense flexibility and scalability in spectrum allocation and data rate accommodation could be built to support diverse services and the rapid growth of Internet traffic in the future. In this paper, we present a comprehensive survey on OFDM-based elastic optical network technologies, including basic principles of OFDM, O-OFDM technologies, the architectures of OFDM-based elastic core optical networks, and related key enabling technologies. The main advantages and issues of OFDM-based elastic core optical networks that are under research are also discussed

Dynamic reconfiguration technologies based on FPGA in software defined radio system

Partial Reconfiguration (PR) is a method for Field Programmable Gate Array (FPGA) designs which allows multiple applications to time-share a portion of an FPGA while the rest of the device continues to operate unaffected. Using this strategy, the physical layer processing architecture in Software Defined Radio (SDR) systems can benefit from reduced complexity and increased design flexibility, as different waveform applications can be grouped into one part of a single FPGA. Waveform switching often means not only changing functionality, but also changing the FPGA clock frequency. However, that is beyond the current functionality of PR processes as the clock components (such as Digital Clock Managers (DCMs)) are excluded from the process of partial reconfiguration. In this paper, we present a novel architecture that combines another reconfigurable technology, Dynamic Reconfigurable Port (DRP), with PR based on a single FPGA in order to dynamically change both functionality and also the clock frequency. The architecture is demonstrated to reduce hardware utilization significantly compared with standard, static FPGA design

A Software Defined Radio Platform with Direct Conversion: SOPRANO

A new software defined radio platform with multiport-based direct conversion is proposed, named SOPRANO (Software Programmable and Hardware Reconfigurable Architecture for Network). The main features of SOPRANO are a high-level design methodology for digital circuits, a new mixer-less direct conversion method, and software algorithms for multi-band and multi-mode operation. We built the first prototype SOPRANO 1.0, which was able to receive PSK and QAM signals with two different carrier frequencies at 2.45 GHz and 5.25 GHz by changing signal processing software

Economic Galileo E5 Receiver

The Galileo system introduces an extremely wideband civil E5 signal for high precision navigation. The structure of the receiver for the E5 signal is complicated due to the signal complexity and the large bandwidth. It is possible to process the whole E5 signal or process separately E5a and E5b parts combining obtained results afterwards (we call here such method as piece-wise processing). The second procedure has three times worse standard deviation of the pseudorange then first one. The main goal of the paper is to present a design of an E5 receiver which we will call the economic E5 receiver (ecoE5). It is built from jointly controlled correlators for the processing of the E5a and E5b signals which are parts of the E5 signal. Control of these partial E5a and E5b correlators is realized by only one delay and one phase lock loops. The performance, i.e. the pseudorange noise and multipath errors, of the receiver equipped with the ecoE5, is only slightly worse (the standard deviation of the pseudorange noise is 10 - 20% larger) than the performance of the optimal E5 receiver and it is much better than the performance of the receiver combining the piecewise (E5a and E5b) measurements. The ecoE5 receiver hardware demands are about one quarter of the hardware demands of the classical E5 receiver