Efficient optimization of the integrity behavior of analog nonlinear devices using surrogate models

A novel technique to analyze and optimize the integrity behavior of nonlinear analog devices in the presence of noise is proposed. The technique leverages surrogate models, as such reducing the simulation time, avoiding time-consuming and expensive measurements after tape-out and hiding the original netlist of the circuit, while maintaining high accuracy. Easy integration of the surrogates into a circuit simulator together with pertinent subcircuits representing, e. g., board and package, allows mimicking the integrity behavior of a complete setup while still being in the design phase. In this contribution, the method is applied to a case study, being a voltage regulator designed for automotive applications

Harmonic balance surrogate-based immunity modeling of a nonlinear analog circuit

A novel harmonic balance surrogate-based technique to create fast and accurate behavioral models predicting, in the early design stage, the performance of nonlinear analog devices during immunity tests is presented. The obtained immunity model hides the real netlist, reduces the simulation time, and avoids expensive and time-consuming measurements after tape-out, while still providing high accuracy. The model can easily be integrated into a circuit simulator together with additional subcircuits, e.g., board and package models, as such allowing to efficiently reproduce complete immunity test setups during the early design stage and without disclosing any intellectual property. The novel method is validated by means of application to an industrial case study, being an automotive voltage regulator, clearly showing the technique's capabilities and practical advantages

High Power Solid State Retrofit Lamp Thermal Characterization and Modeling

Thermal and thermo-mechanical modeling and characterization of solid state lightening (SSL) retrofit LED lamp are presented in this paper. Paramount importance is to design SSL lamps for reliability, in which thermal and thermo-mechanical aspects are key points. The main goal is to get a precise 3D thermal lamp model for further thermal optimization. Simulations are performed with ANSYS and CoventorWare software tools to compere different simulation approaches. Simulated thermal distribution has been validated with thermal measurement on a commercial 8W LED lamp. Materials parametric study has been carried out to discover problematic parts for heat transfer from power LEDs to ambient and future solutions are proposed. The objectives are to predict the thermal management by simulation of LED lamp, get more understanding in the effect of lamp shape and used materials in order to design more effective LED lamps and predict light quality, life time and reliability

The road to fully integrated DC-DC conversion via the switched-capacitor approach

This paper provides a perspective on progress toward realization of efficient, fully integrated dc-dc conversion and regulation functionality in CMOS platforms. In providing a comparative assessment between the inductor-based and switched-capacitor approaches, the presentation reviews the salient features in effectiveness in utilization of switch technology and in use and implementation of passives. The analytical conclusions point toward the strong advantages of the switched-capacitor (SC) approach with respect to both switch utilization and much higher energy densities of capacitors versus inductors. The analysis is substantiated with a review of recently developed and published integrated dc-dc converters of both the inductor-based and SC types. © 2012 IEEE

Accurate modeling techniques for power delivery

“Power delivery is essential in electronic systems to provide reliable power from voltage sources to load devices. Driven by the ambitious user demands and technology evolutions, the power delivery design is posed serious challenges. In this work, we focus on modeling two types of power delivery paths: the power distribution network (PDN) and the wireless power transfer (WPT) system. For the modeling of PDN, a novel pattern-based analytical method is proposed for PCB-level PDN impedance calculations, which constructs an equivalent circuit with one-to-one correspondences to the PCB’s physical structure. A practical modeling methodology is also introduced to optimize the PDN design. In addition, a topology-based behavior model is developed for the current-mode voltage regulator module (VRM). This model includes all the critical components in the power stage, the voltage control loop, and the current control loop of a VRM device. A novel method is also proposed to unify the modeling of the continuous and discontinuous conduction modes for transient load responses. Cascading the proposed VRM model with the PCB-level PDN model enables a combined PDN analysis, which is much needed for modern PDN designs. For the modeling of WPT system, a system-level model is developed for both efficiency and power loss of all the blocks in WPT systems. A rectifier characterization method is also proposed to obtain the accurate load impedance. This model is capable of deriving the power capabilities for both the fundamental and higher order harmonics. Based on the system model, a practical design methodology is introduced to simultaneously optimize multiple system parameters, which greatly accelerates the design process”--Abstract, page iv

A smart voltage and current monitoring system for three phase inverters using an android smartphone application

In this paper, a new smart voltage and current monitoring system (SVCMS) technique is proposed. It monitors a three phase electrical system using an Arduino platform as a microcontroller to read the voltage and current from sensors and then wirelessly send the measured data to monitor the results using a new Android application. The integrated SVCMS design uses an Arduino Nano V3.0 as the microcontroller to measure the results from three voltage and three current sensors and then send this data, after calculation, to the Android smartphone device of an end user using Bluetooth HC-05. The Arduino Nano V3.0 controller and Bluetooth HC-05 are a cheap microcontroller and wireless device, respectively. The new Android smartphone application that monitors the voltage and current measurements uses the open source MIT App Inventor 2 software. It allows for monitoring some elementary fundamental voltage power quality properties. An effort has been made to investigate what is possible using available off-the-shelf components and open source software

A GPU-Computing Approach to Solar Stokes Profile Inversion

We present a new computational approach to the inversion of solar photospheric Stokes polarization profiles, under the Milne-Eddington model, for vector magnetography. Our code, named GENESIS (GENEtic Stokes Inversion Strategy), employs multi-threaded parallel-processing techniques to harness the computing power of graphics processing units GPUs, along with algorithms designed to exploit the inherent parallelism of the Stokes inversion problem. Using a genetic algorithm (GA) engineered specifically for use with a GPU, we produce full-disc maps of the photospheric vector magnetic field from polarized spectral line observations recorded by the Synoptic Optical Long-term Investigations of the Sun (SOLIS) Vector Spectromagnetograph (VSM) instrument. We show the advantages of pairing a population-parallel genetic algorithm with data-parallel GPU-computing techniques, and present an overview of the Stokes inversion problem, including a description of our adaptation to the GPU-computing paradigm. Full-disc vector magnetograms derived by this method are shown, using SOLIS/VSM data observed on 2008 March 28 at 15:45 UT

Electrical-thermal Co-simulation With Joule Heating And Convection Effects For 3d Systems

In a method for simulating temperature and electrical characteristics within an circuit, a temperature of at least one volume within the circuit as a function of a resistance within the at least one volume is repeatedly calculated and the resistance as a function of the temperature is repeatedly calculated until the temperature is within a predetermined tolerance of a previous temperature result and until the resistance is within a predetermined tolerance of a previous resistance result. Once the temperature is within a predetermined tolerance of the previous temperature result and the resistance is within a predetermined tolerance of the previous resistance, then an output indicative of the temperature is generated.Georgia Tech Research Corporatio

Robust and Efficient Uncertainty Quantification and Validation of RFIC Isolation

Modern communication and identification products impose demanding constraints on reliability of components. Due to this statistical constraints more and more enter optimization formulations of electronic products. Yield constraints often require efficient sampling techniques to obtain uncertainty quantification also at the tails of the distributions. These sampling techniques should outperform standard Monte Carlo techniques, since these latter ones are normally not efficient enough to deal with tail probabilities. One such a technique, Importance Sampling, has successfully been applied to optimize Static Random Access Memories (SRAMs) while guaranteeing very small failure probabilities, even going beyond 6-sigma variations of parameters involved. Apart from this, emerging uncertainty quantifications techniques offer expansions of the solution that serve as a response surface facility when doing statistics and optimization. To efficiently derive the coefficients in the expansions one either has to solve a large number of problems or a huge combined problem. Here parameterized Model Order Reduction (MOR) techniques can be used to reduce the work load. To also reduce the amount of parameters we identify those that only affect the variance in a minor way. These parameters can simply be set to a fixed value. The remaining parameters can be viewed as dominant. Preservation of the variation also allows to make statements about the approximation accuracy obtained by the parameter-reduced problem. This is illustrated on an RLC circuit. Additionally, the MOR technique used should not affect the variance significantly. Finally we consider a methodology for reliable RFIC isolation using floor-plan modeling and isolation grounding. Simulations show good comparison with measurements