Hybrid and modular multilevel converter designs for isolated HVDC–DC converters

Efficient medium and high-voltage dc-dc conversion is critical for future dc grids. This paper proposes a hybrid multilevel dc-ac converter structure that is used as the kernel of dc-dc conversion systems. Operation of the proposed dc-ac converter is suited to trapezoidal ac-voltage waveforms. Quantitative and qualitative analyses show that said trapezoidal operation reduces converter footprint, active and passive components' size, and on-state losses relative to conventional modular multilevel converters. The proposed converter is scalable to high voltages with controllable ac-voltage slope; implying tolerable dv/dt stresses on the converter transformer. Structural variations of the proposed converter with enhanced modularity and improved efficiency will be presented and discussed with regards to application in front-to-front isolated dc-dc conversion stages, and in light of said trapezoidal operation. Numerical results provide deeper insight of the presented converter designs with emphasis on system design aspects. Results obtained from a proof-of-concept 1-kW experimental test rig confirm the validity of simulation results, theoretical analyses, and simplified design equations presented in this paper. - 2013 IEEE.Scopu

Modular Multilevel Converter for Electric Motor Drive Applications

In this master thesis the topic of Modular Multilevel Converters (MMC) has been studied. The working principle of the converter is presented with advantageous attributes such as a multilevel waveform, a modular realization and cost saving features. Vital control objectives are active and reactive power control, DC link voltage control, submodule capacitor voltage control and current control. A level-shifted pulse-width modulation (PWM) switching scheme was found to have relatively low total harmonic distortion (THD), thus used in the upcoming simulations. In order to ensure balancing of the converter capacitors, a voltage balancing algorithm was presented, sorting the capacitors based on their voltage level, and giving a state command accordingly. The thesis has examined the challenges of using MMC for electric motor drive applications. It has been found that the low frequency operation causes large voltage ripple in the capacitors, thus a large circulating current. Through a literature search, different measures where found in order to reduce the circulating current, including circulating current suppressing and manipulation. In addition an introduction of a common mode voltage was presented as a possible measure. After developing the one-phase model of the project thesis into a three-phase model, the circulating current suppressing controllers (CCSC) were tested, first at 50Hz, and then at 25Hz. At 50Hz, all three controllers worked as intended, reducing the circulating current by up to 72% and the voltage ripple was reduced from ∆vc = 10V to ∆vc = 6V . At 25Hz, all the controllers maintained their ability to reduce the circulating current. Nonetheless, it was concluded that further measures must be studied, as all controllers increased the capacitor voltage ripple at f =25Hz

A New MMC Topology Which Decreases the Sub Module Voltage Fluctuations at Lower Switching Frequencies and Improves Converter Efficiency

Modular Multi-level inverters (MMCs) are becoming more common because of their suitability for applications in smart grids and multi-terminal HVDC transmission networks. The comparative study between the two classic topologies of MMC (AC side cascaded and DC side cascaded topologies) indicates some disadvantages which can affect their performance. The sub module voltage ripple and switching losses are one of the main issues and the reason for the appearance of the circulating current is sub module capacitor voltage ripple. Hence, the sub module capacitor needs to be large enough to constrain the voltage ripple when operating at lower switching frequencies. However, this is prohibitively uneconomical for the high voltage applications. There is always a trade off in MMC design between the switching frequency and sub module voltage ripple

High Power Density and High Efficiency Converter Topologies for Renewable Energy Conversion and EV Applications

This dissertation work presents two novel converter topologies (a three-level ANPC inverter utilizing hybrid Si/SiC switches and an Asymmetric Alternate Arm Converter (AAAC) topology) that are suitable for high efficiency and high-power density energy conversion systems. The operation principle, modulation, and control strategy of these newly introduced converter topologies are presented in detail supported by simulation and experimental results. A thorough design optimization of these converter topologies (Si/SiC current rating ratio optimization and gate control strategies for the three-level ANPC inverter topology and component sizing for the asymmetric alternate arm converter topology) are also presented. Performance comparison of the proposed converter topologies with other similar converter topologies is also presented. The performance of the proposed ANPC inverter topology is compared with other ANPC inverter topologies such as an all SiC MOSFET ANPC inverter topology, an all Si IGBT ANPC inverter topology and mixed Si IGBT and SiC MOSFET based ANPC inverter topologies in terms of efficiency and cost. The efficiency and cost comparison results show that the proposed hybrid Si/SiC switch based ANPC inverter has higher efficiency and lower cost compared to the other ANPC inverter topologies considered for the comparison. The performance of the asymmetric alternate arm converter topology is also compared with other similar voltage source converter topologies such as the modular multilevel converter topology, the alternate arm converter topology, and the improved alternate arm converter topology in terms of total device count, number of switches per current conduction path, output voltage levels, dc-fault blocking capability and overmodulation capability. The proposed multilevel converter topology has lower total number of devices and lower number of devices per current conduction path hence it has lower cost and lower conduction power loss. However, it has lower number of output voltage levels (requiring larger ac interface inductors) and lacks dc-fault blocking and overmodulation operation capabilities. A converter figure-of-merit accounting for the hybrid Si/SiC switch and converter topology properties is also proposed to help perform quick performance comparison between different hybrid Si/SiC switch based converter topologies. It eliminates the need for developing full electro-thermal power loss model for different converter topologies that would otherwise be needed to carry out power loss comparison between different converter topologies. Hence it saves time and effort

Operation of a hybrid modular multilevel converter during grid voltage unbalance

The recently proposed parallel hybrid modular multilevel converter is considered to be a low loss, low component count converter with soft switching capability of the ‘main’ H-bridge. The converter has similar advantages to other emerging modular multilevel converter circuits being considered for HVDC power transmission and can be made compact which is desirable for offshore application. However, during ac network unbalance the individual ‘chain-links’ exchange unequal amounts of power with the grid which requires appropriate remedial action. This paper presents research into the performance of the converter and proposes a suitable control method that enables the converter to operate during grid voltage unbalance. The proposed control concept involves the use of asymmetric third harmonic voltage generation in the ‘chain-links’ of the converter to redistribute the power exchanged between the individual ‘chain-links’ and the grid. Mathematical analysis and simulation modelling with results are presented to support the work described