Second year technical report on-board processing for future satellite communications systems

Advanced baseband and microwave switching techniques for large domestic communications satellites operating in the 30/20 GHz frequency bands are discussed. The nominal baseband processor throughput is one million packets per second (1.6 Gb/s) from one thousand T1 carrier rate customer premises terminals. A frequency reuse factor of sixteen is assumed by using 16 spot antenna beams with the same 100 MHz bandwidth per beam and a modulation with a one b/s per Hz bandwidth efficiency. Eight of the beams are fixed on major metropolitan areas and eight are scanning beams which periodically cover the remainder of the U.S. under dynamic control. User signals are regenerated (demodulated/remodulated) and message packages are reformatted on board. Frequency division multiple access and time division multiplex are employed on the uplinks and downlinks, respectively, for terminals within the coverage area and dwell interval of a scanning beam. Link establishment and packet routing protocols are defined. Also described is a detailed design of a separate 100 x 100 microwave switch capable of handling nonregenerated signals occupying the remaining 2.4 GHz bandwidth with 60 dB of isolation, at an estimated weight and power consumption of approximately 400 kg and 100 W, respectively

Application of advanced on-board processing concepts to future satellite communications systems

An initial definition of on-board processing requirements for an advanced satellite communications system to service domestic markets in the 1990's is presented. An exemplar system architecture with both RF on-board switching and demodulation/remodulation baseband processing was used to identify important issues related to system implementation, cost, and technology development

Transparent semiconducting oxides for active multi-electrode arrays

Die vorliegende Arbeit befasst sich mit der Anwendbarkeit von transparenter Elektronik basierend auf oxidischen Halbleitern in Multielektrodenarrays zur Messung von neuronalen Signalen. Im ersten experimentellen Kapitel werden auf Zinkoxid basierende Bauelemente untersucht. Verschiedene Varianten von Feldeffekttransistoren (FETs) werden charakterisiert und ihre Eignung zur Detektion von Zellsignalen überprüft. Die Anwendbarkeit physikalischer Modelle zur Beschreibung von ZnO-basierten Metal-Halbleiter-FETs (MESFETs) wird behandelt. Weiterhin wird die Eignung von einfachen Inverterschaltungen zur Spannungsverstärkung diskutiert. Das zweite Kapitel thematisiert Rauschmessungen an unterschiedlichen ZnO-basierten Proben, darunter Dünnfilme, Mikronadeln, MESFETs und Inverter. Darauf aufbauend wird die Auswirkung des gemessenen Stromrauschens auf die Sensitivität der Bauelemente nachvollzogen und theoretisch modelliert. Im dritten Kapitel wird das Verhalten der Bauelemente im Kontakt mit Elektolyt beschrieben. Die Signalübertragung von Spannungsänderungen im Elektrolyt auf die Chipelektronik wird mit verschiedenen Messmethoden charakterisiert. Dabei kommt teilweise ein selbstgebauter Vorverstärker zum Einsatz, dessen Aufbau ebenfalls beschrieben wird. Die Stabilität der verwendeten Materialien in physiologischen Salzlösungen und ihre Biokompatibilität wird überprüft. Darüber hinaus werden FETs mit Elektrolytgate und Zinkzinnoxid-Kanal vorgestellt.:1. Introduction 2. Measurement Setup and Sample Fabrication 2.1. Device Fabrication 2.2. Measurement Methods 2.3. Current Amplifier with Offset Compensation 3. Oxide Semiconductor Based Devices 3.1. Theoretical Description 3.2. Thin Films 3.4. Simple Inverter 3.5. Test Circuit for Active Matrix Configurations 4. Noise 4.1. Noise Sources 4.2. Contributions from Measurement Setup 4.3. Homogenous ZnO Samples 4.4. ZnO Based Devices 5. Experiments in Electrolyte and with Cells 5.1. Cell-Transistor Coupling 5.2. Materials in Electrolytical and Biological Environment 5.3. Electrode Arrays with Field-Effect Transistors 5.4. Electrode Arrays with Simple Inverters 5.5. Electrode Arrays with Solution Gated Transistors 6. Conclusion and Outlook Appendices Bibliography Symbols and Abbreviations List of Own and Contributed Articles Acknowledgement

Methods for the atomistic simulation of ultrasmall semiconductor devices

As the feature sizes in VLSI technology shrink to less than 100 nm the effects due to the quantisation of electronic charge begin to emerge. There are a small number of carriers and impurities and the statistical variation in their number have significant effects on the threshold characteristics of the devices that hamper their large scale integration into future ULSI.The complex potential landscape arising from the Coulomb force, with its sharp localised peaks and troughs, faces problems due to band limiting in meshes and places heavy burdens on the integration techniques. A computationally efficient solution to the problem of band-limiting is presented and is shown to provide an accurate description of the electrostatics. This work also introduces a highly efficient and numerically stable multigrid solver, for Poisson's equation, that can cope with the complex potential distributions on large meshes.The study of ionised impurity scattering is used to validate these molecular dynamics simulations. Results have shown that the Brownian method - despite precluding the use of adaptive integration schemes - gives a good approximation to the standard results and has the advantage of smoothing away errors that can build up during the integration of motion and drives the system towards thermal equilibrium.The greatest hurdle to be cleared before these three-dimensional simulations can be practicable is the sheer computational effort that is required. The implementation of the problem on parallel architectures has been explored and discussed.The methods developed in this work are demonstrated through the simulation of an 80 nm dual-gate MESFET. The results were verified by comparing them with those from a commercial drift-diffusion simulator.The threshold behaviour of devices has been investigated through the study of the formation of conduction channels in blocks. The percolation threshold gives the point when conductive paths form across the gate barrier. The results from the FET simulation were found to be in agreement with the earlier studies on the blocks

DESIGN OF A GAAS DISTRIBUTED AMPLIFIER WITH LC TRAPS BASED BROADBAND LINEARIZATION

Increasing the linearity of power amplifiers has been an important area of research because its signal integrity influences the performance of the entire transreceiver system and there are strict regulatory requirements on them. Due to the nonlinear behaviour of power amplifiers, third order intermodulation products are generated close to the desired signals and cannot be removed by filters. Increasing linearity will help bring these distortion products closer to the noise floor. However, it is not an easy task to increase linearity without trading off output power. To maintain the same level of output power generated but with higher linearity, many techniques, each with its own pros and cons, have been implemented to linearize an amplifier. Techniques involving feedback are seriously limited in terms of modulation bandwidth whereas methods such as predistortion and feedforward are very difficult to implement. This project seeks to use a simple method of placing terminations directly to the distributed amplifier (DA), making it a device level linearization technique and can be used in addition to the other system level techniques mentioned earlier. To increase linearity over a broad bandwidth of 0.5 to 3.0 GHz, this work proposes using low impedance terminations (LC traps) at the envelope frequency to the input and output of several distributed amplifiers. This research is novel since this is the first time broadband improvement in linearity has been demonstrated using the LC trap method. Two design iterations were completed (first design iteration has four variants to test the output trap while the second design iteration has three variants to test the input trap). The low impedance terminations are implemented using inductor-capacitor networks that are external to the monolithic microwave integrated circuit (MMIC). Design and layout of the DAs were carried out using Agilent’s Advanced Design System (ADS). Results show that placing the traps at the output of the DA does not truly affect the linearity of the device at lower frequencies but provide an improvement of 1.6 dB and 3.4 dB to the third-order output intercept point (OIP3) at 2.5 GHz and 3.0 GHz, respectively. With traps at the input, measurement results at -5 dBm input power, viii 1.375 V base bias (61 mA total collector current) and 10 MHz two tone spacing show a broadband improvement throughout the band (0.5 GHz to 3.0 GHz) of 3.3 dB to 7.4 dB in OIP3. Furthermore, the OIP3 is increased to 19.2 dB above P1dB. Results show that the improvement in OIP3 comes without lowering gain, return loss or P1dB and without causing any stability problems

NASA Tech Briefs, April 1993

Topics include: Optoelectronics; Electronic Components and Circuits; Electronic Systems; Physical Sciences; Materials; Computer Programs; Mechanics; Machinery; Fabrication Technology; Mathematics and Information Sciences; Life Sciences

Electric field effect in disordered thin films

L'abstract è presente nell'allegato / the abstract is in the attachmen

Journal of Telecommunications and Information Technology, 2004, nr 1

kwartalni