230 research outputs found

    Advanced digital modulation: Communication techniques and monolithic GaAs technology

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    Communications theory and practice are merged with state-of-the-art technology in IC fabrication, especially monolithic GaAs technology, to examine the general feasibility of a number of advanced technology digital transmission systems. Satellite-channel models with (1) superior throughput, perhaps 2 Gbps; (2) attractive weight and cost; and (3) high RF power and spectrum efficiency are discussed. Transmission techniques possessing reasonably simple architectures capable of monolithic fabrication at high speeds were surveyed. This included a review of amplitude/phase shift keying (APSK) techniques and the continuous-phase-modulation (CPM) methods, of which MSK represents the simplest case

    Parameter Estimation of a High Frequency Cascode Low Noise Amplifier Model

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    A Low Noise Amplifier (LNA) is an important building block in the RF receiver chain. Typically the LNA should provide acceptable gain and high linearity while maintaining low noise and power consumption. To optimize these conflicting goals the so-called Cascode topology is widely used in industry. Here the gain cell is comprised of two transistors, one in common-source and the other in common gate configuration. Cascode has a number of competitive advantages over other topologies such as high output impedance that shields the input device from voltage variations at the output, good reverse isolation resulting in improved stability, and acceptable input matching. Moreover, the topology features excellent frequency characteristics. Unfortunately, a Cascode design is expensive to deploy in RF systems and it requires more careful tuning and matching. Since the design relies on many circuit components, optimization methods are generally difficult to implement and often inaccurate in their predictions. To overcome these problems, this thesis proposes a modeling environment within the Advanced Design Systems (ADS) simulator that utilized DC and RF measurements in an effort to characterize each transistor separately. The model creates an easy-to-apply design approach capable of predicting the most important circuit components of the Cascode topology. The validity of the method is tested in ADS with a realistic p-HEMT library device. The comparison between model prediction and the realistic device involves both standard transistor parameters and high-frequency parasitic effects

    Fabrication and Scaling Effects of Very Short Gate-Length GaAs MESFETs

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    A process has been demonstrated for the fabrication of scaled GaAs based metal-semiconductor field effect transistors (MESFETs) suitable for high frequency characterisation with gate-lengths down to 40nm. MESFETs were fabricated with gate-lengths in the range 40 to 300nm on molecular beam epitaxy (MBE) grown layers with GaAs and AlGaAs buffers. The MESFETs were characterised electrically at direct current (DC) and high frequency. The MESFETs have very good DC and high frequency performance, even down to the shortest gate-lengths. The performance is characterised by figures of merit such as transconductance and unity current gain cut-off frequency. MESFETs with a DC extrinsic transconductance of 720mS/mm and unity gain cut-off frequency of 150GHz (for a 40nm gate-length) have been demonstrated. However, the performance of the MESFETs is limited by scaling effects. Some of these effects are of a technological nature such as buffer layer current, a large gate resistance, surface depletion effects, and the high active layer doping. More importantly, the performance of the shortest gate-length MESFETs is restricted by the fundamental short-channel effects of punch-through and hot-electrons. The origin and function of many of these effects are introduced through a review of the operation and modelling of short-channel FETs. The MESFET design included features to minimise the technological scaling effects, i.e. 1) AlGaAs buffer layers to suppress buffer layer current. Experimental comparison was made with the GaAs buffer case. 2) High active layer doping to reduce the effect of surface depletion and maintain the channel aspect ratio, at the cost of deteriorated carrier transport. Devices with three different doping concentrations were compared. 3) A reduced gate-width with shorter gate-length to compensate for the larger series gate resistance. The experimental work described in this thesis investigates the scaling effects by electrical characterisation of the devices at DC and high frequency. The measurements presented and discussed include: 1) DC open channel and subthreshold transfer and output characteristics. 2) DC threshold voltage shift, equivalent to output conductance. 3) High frequency (up to 26.5GHz) S-parameters which yield the short-circuit current gain, maximum frequency of oscillation, and parasitic carrier transit delays through the channel. The design strategy was successful to the extent of overcoming many of the detrimental scaling effects for MESFETs with gate-lengths down to 200nm. The buffer layer current was suppressed by the AlGaAs buffer, and it was shown that interrupted growth of the AlGaAs buffer can surmount the problem of degradation of active layer quality associated with MBE growth of GaAs on AlGaAs. On the negative side, the technological problems of large gate resistance, surface depletion effects and very high active layer doping (which inhibits carrier transport) were found to significantly degrade the high frequency performance of the devices in this work. These are all issues which could be addressed by modifications to the device design. In addition, the parasitic carrier transit delays became more significant in degradation of high frequency performance as the gate-length was reduced. As for the more fundamental effects, the main conclusion of this thesis is that the ultimate scaling limits of hot-electron and punch-through effects govern the behaviour of the MESFETs with very short gate-lengths (in this case, less than 100nm). The most severely affected parameters are output conductance and subthreshold current. For example, the benefits of AlGaAs buffer are greatly reduced for 40nm gate-length MESFETs. Reduction of gate-length can still give an improvement in high frequency performance, but less than predicted by simple scaling of the carrier transit time and the beneficial hot-electron effect of velocity overshoot. No evidence of velocity overshoot effects has been found in these MESFETs

    Fabrication and High Speed Optoelectronic Characterization of Semiconductor Devices

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    This work is an investigation on the use of high speed optoelectronic techniques for the characterization of semiconductor devices. A low-frequency electrooptic probe station was demonstrated as well as the optoelectronic sampling scheme. The optoelectronic sampling technique relies on fast photoconductive switches for its operation. The autocorrelation signal detected in optoelectronic sampling was compared with signal detection by conventional techniques employing a sampling oscilloscope and a network analyser. The optoelectronic techniques described in this work depend critically on short-pulse lasers for the measurement of high speed devices. A fibre-grating pulse compressor was set-up to shorten the 120 ps pulses produced by a mode-locked Nd:YAG laser. Compression by a factor of 40 was demonstrated and nearly transform limited pulses of 3 ps duration were obtained. However, the output of the pulse compressor is very noisy and the output power is not high enough to enable electrooptic sampling experiments, in a jitter-free scheme. The same Nd:YAG laser was frequency doubled and used to synchronously pump a rhodamine 6G dye laser. Autocorrelation measurements obtained with the dye laser are again, very noisy and with poor reproducibility. The noise problems with the pulse compressor and with the dye laser were traced back to the Nd:YAG pump laser. It is concluded that this laser should be avoided as the source of short pulses for the electrooptic and optoelectronic measurement techniques. The use of a feedback loop is likely to reduce the noise in this laser, but drift in the intensity in a long time scale would still be present. A mode-locked Ti:Sapphire laser was also used for measurements in this project. Autocorrelation measurements taken with this laser are totally reproducible and contain little or no noise. The devices measured in this project were made by a combination of electron-beam lithography and photolithography. The use of these two lithography techniques together was made possible by the design of a mask set with alignment marks which can be used for registration in a mask aligner and in the electron beam lithography machine. Discrete devices were made and characterized by electrical techniques. Fabrication procedures were developed for resistors, Metal-Insulator-Metal (MIM) capacitors and for the Optoelecttonic Sampling Device (OSD). Discrete Mesfets were fabricated on MBE grown epilayers and their I-V characteristics were measured. A simplified optoelectronic sampling device was designed and made in a single lithographic step. It provides a quick way of producing devices in which autocorrelation measurements can be performed to determine the carrier lifetime in the substrate material. The optoelectronic sampling devices were made on four different substrate materials. The first one is a high purity, MBE grown GaAs epilayer, with very long lifetime (2ns). The control samples were made on "standard" semi-insulating GaAs, whose carrier lifetime is ~200 ps. Proton implantation in some of these devices made on SI GaAs substrate was used as a means of shortening the carrier lifetime, to produce fast turn-off times in the photoconductive switches. The lifetime after implantation of 4 x 10e14 protons/cm2 was estimated from an optoelectronic sampling measurement, to be around 40 ps. This is still a very long lifetime for the photoconductive switches. It is thought that self-annealing of the deep electron traps, caused by the lack of temperature control in the implanter, prevented the achievement of short lifetime in the switches. GaAs epilayers were grown by MBE at a temperature around 25

    Advanced 3-V semiconductor technology assessment

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    Components required for extensions of currently planned space communications systems are discussed for large antennas, crosslink systems, single sideband systems, Aerostat systems, and digital signal processing. Systems using advanced modulation concepts and new concepts in communications satellites are included. The current status and trends in materials technology are examined with emphasis on bulk growth of semi-insulating GaAs and InP, epitaxial growth, and ion implantation. Microwave solid state discrete active devices, multigigabit rate GaAs digital integrated circuits, microwave integrated circuits, and the exploratory development of GaInAs devices, heterojunction devices, and quasi-ballistic devices is considered. Competing technologies such as RF power generation, filter structures, and microwave circuit fabrication are discussed. The fundamental limits of semiconductor devices and problems in implementation are explored

    Characterization and modelling of GaAs MESFETs in the design of nonlinear circuits

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    Dry processing of GaAs-based MESFETs and pseudomorphic HFETs

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    A Method for the Determination of a Distributed FET Noise-Model Based on Matched-Source Noise-Figure Measurements

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    A new method for the determination of a distributed FET noise model is presented. It is based on the extraction of the intrinsic noise-correlation matrix of an elemental section of the device from the device's noise figure, measured for only one source-impedance state at a number of frequency points. Experimental results up to 40 GHz are given.Peer Reviewe

    Modélisation distribuée et évolutive du GaN HEMT

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    L’industrie de télécommunication et les satellites se base majoritairement sur les technologies Si et GaAs. La demande croissante des hauts débits de données entraine une facture élevée en énergie. En outre, la saturation de la bande des basses fréquences, le besoin des débits élevés et les exigences de la haute puissance imposait l’utilisation de la bande hautes fréquences. Dans le but de résoudre les problèmes cités auparavant, la technologie GaN est introduite comme un candidat prometteur qui peut offrir de la haute puissance, taille du circuit plus faible avec une meilleure stabilité mécanique aux environnements hostiles/milieux agressifs. À titre d’exemple, l‘agence spatiale européenne sont en cours de développement d’un circuit à base du GaN sur substrat en Si pour faible cout, une hautes performance et une grande fiabilité. La technologie GaN est assez mature pour proposer de nouveaux systèmes intégrés utilisés pour les puissances microonde ce qui permet une réduction considérable de la taille du système. Étant un semiconducteur à grande bande interdite, GaN peut offrir une haute puissance sous hautes températures (>225oC) avec une bonne stabilité mécanique. Elle présente un facteur de bruit faible, qui est intéressant notamment pour les circuits intégrés aux ondes millimétriques. À noter que la mobilité du GaN par rapport à la température est assez élevée pour proposer des amplificateurs dans la bande W. Avec le progrès du procédé de fabrication du GaN, notre objectif est l’introduction de cette technologie dans des applications industrielles. À cette fin, on désire avoir un modèle du dispositif qui correspond à la meilleure performance. Ensuite, on veut le valider dans une modélisation du circuit. Cette thèse, basée sur la technologie GaN unique développée au 3IT, a pour objectif l’amélioration de l’outil de conception en réduisant son erreur avec une validation de son utilisation dans la conception du circuit. Ce travail est réalisé pour la première fois au 3IT avec des résultats de simulation pour une conception idéale d’un circuit MMIC ainsi que sa démonstration. Une caractérisation des échantillons a été réalisée avec objectif d’extraction de données qui vont servir à l’alimentation de modélisation des transistors sur l’outil ADS. Une fois complétée, la modélisation a été validée par une modélisation des petits et grands signaux et a été testée par une mesure load-pull. Enfin, ce modèle a été utilisé lors de la conception d’un amplificateur pour les applications RF. L’innovation de ce travail réside dans la modélisation de la résistance d’une grille large sous forme de quadripôles parallèles à structure 3D (ou à résistances de grille distribuées) du transistor MOSHEMT GaN. La conception et la fabrication de l’amplificateur à haute puissance (HPA) aux fréquences microondes (≤4GHz) sont réalisés au LNN du 3IT et inclus une couche d’oxyde de grille afin de réduire le courant de fuite notamment pour les tensions Vgs élevées, la grille du transistor forme un serpentin pour fournir une puissance de sortie élevée avec un encombrement spatial minimal et une grille présentant une électrode de champ pour permettre d’augmenter la tension de claquage.Abstract : The telecommunication and satellite industry is mainly relying on Si and GaAs technologies as the demand for a high data rate is continuously growing, leading to higher power consumption. Moreover, the lower frequency band's saturation, the need for high data rate, and high-power force to utilize the high-frequency band. In pursuit of solving the issues mentioned earlier, GaN technology has been introduced as a promising candidate that can offer high power at a smaller circuit footprint and higher mechanical stability in harsh environments. For example, currently, the European space agency (ESA) is developing an integrated circuit with GaN on Si substrate for low cost, high performance, and high reliability. GaN technology is sufficiently mature to propose integrated new systems which are needed for microwave power range. This technology reduces the size of the system considerably. GaN is a wide bandgap semiconductor which can offer remarkably high power at high temperature (>225℃), and it is very stable mechanically. It presents a low noise factor, very interesting for a millimeter-wave integrated circuit. Finally, the mobility of GaN vs. temperature is sufficiently elevated to propose a power amplifier in W-Band. With the improvement of the GaN process, our objective is to introduce this technology for industrial applications. For this purpose, we wish to have a better model of the device that corresponds to the best performance and then validate it by using this model in a circuit. Based on the 3IT's GaN process, which is unique in its context, this thesis aims to improve the design kit by reducing the design model's error and validating it by using it in circuit design. This work is the first to realize in 3IT with simulation results to design an MMIC circuit for demonstration. I first characterized the new samples by performing different measurements than using these measurement data; transistor is modeled in ADS software. Once the model was completed, it is validated by small-signal modeling, and then the large-signal model is tested with non-linear capacitances, current source, and transconductance modeling. Finally, we used this model to design a power amplifier for RF application. The innovation comes from modeling large gate resistance as distributed gate resistance for GaN MOSHEMT transistor and then designing high-power amplifier (HPA) in the frequency range (≤ 4GHz) while using 3IT GaN process which includes first oxide layer to have low gate current and more voltage of Vgs, the second transistor is meander to have high power and third, field plate - gate for high breakdown voltage
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