340 research outputs found

    Flexible Electronics Based on Solution Processable Organic Semiconductors and Colloidal Semiconductor Nanocrystals

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    Solution-processable semiconductors hold great potential for the large-area, low-cost fabrication of flexible electronics. Recent advances in flexible electronics have introduced new functional devices such as light-weight displays and conformal sensors. However, key challenges remain to develop flexible devices from emerging materials that use simple fabrication processes and have high-performance. In this thesis, we first use a solution-processable organic semiconductor to build field-effect transistors on large-area plastic with mobility of 0.1 cm^2/Vs. Combined with passive components, we are able to build voltage amplifiers to capture few mV amplitude bio-signals. This work provides a proof of concept on applying solution processable materials in flexible circuits. In the second part of the thesis, we introduce colloidal CdSe nanocrystals (NCs) as solution-processable inks of semiconductor thin film devices. By strongly coupling and doping the CdSe NC thin films, we demonstrate high-performance, flexible nanocrystal field-effect transistors (NC-FETs) with mobility greater than 20 cm^2/Vs under 2V supply. Using these NC-FETs as building blocks, we demonstrate the first flexible nanocrystal integrated circuits (NCICs) with switching speed of 600 ”sec. To design reliable integrated circuits with low-noise, we characterize the flicker noise amplitude and origin. We find the figure of merit for noise, the Hooge parameter, to be 3 x 10^-2 for CdSe NC-FETs, comparable to other emerging solution processable organic semiconductors and promising for low-noise circuit applications.As most of NCs are reactive and their devices tend to degrade in air, we develop processes that allow manipulation of the NCs in ambient atmosphere without compromising device performance. These processes open up opportunities for NC-based devices to be fabricated over large area using photolithography. By scaling the devices and reducing device parasitics, we are able to fabricate hundreds of NC-FETs on wafer-scale substrates and integrate them as circuits. We demonstrate voltage amplifiers with bandwidths of a few kHz and ring-oscillators with a stage delay of 3 ”sec. We also show functional NCICs NOR and NAND logic. This thesis demonstrates the use of colloidal NCs to realize flexible, large-area circuits and the feasibility of more advanced analog and digital NCICs built on flexible substrates for various applications

    Backplane System Design Considerations for Micro LED Displays

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    Display technologies have evolved from the bulky Cathode Ray Tube based displays to the latest lightweight and low power micro-Led (uLED) based flat panel displays. A display system consists of a device technology that either manipulates the incoming light or emits its own light and a controller circuit to control the behavior of these devices. This system makes up the backplane of a display technology. uLEDs due to their small size provide higher resolution and better contrast than all the previous display technologies like the LCDs and the OLEDs. Backplane system design considerations for a uLED flat panel display is the primary focus of this work. The uLEDs are arranged in a 2-D matrix on a glass substrate with each uLED driven by an arrangement of 2 transistor and 1 capacitor that make up a pixel circuit. Indium Gallium Zinc Oxide TFTs are used as the choice of transistors for this project. The backplane design considerations are done to support an active matrix of 10x10, 50x50 and 380x380 pixel count in both monochrome and color versions. The behavior of the pixel circuit is evaluated using existing TFT and uLED electrical device compact models to determine the optimal value of the storage capacitor needed for the pixel circuit operation at 30 & 60Hz refresh rates. A model board with shift registers, transistors and LEDs to mimic the operation of a 10x10 uLED array is made and a FPGA is used to control the operation of this board. A timing relationship between the row and column data latch is deduced and the impact of the row-line, column-line RC delay and the pixel transient response time is evaluated. The impact of IR losses due to the power and ground line resistances are evaluated with the help monochrome pixel circuit physical layout. A new pixel circuit to accommodate the RGB pixels is made and care is taken to minimize both the RC delay and IR losses. Finally, a low contact resistance (0.05Ω-mm2) modular packaging scheme to electrically bond the two-dimensional array of pixel circuits on glass with the electronics on the PCB and to reduce RC delay is given

    Wide Bandwidth - High Accuracy Control Loops in the presence of Slow Varying Signals and Applications in Active Matrix Organic Light Emitting Displays and Sensor Arrays

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    This dissertation deals with the problems of modern active matrix organic light-emitting diode AMOLED display back-plane drivers and sensor arrays. The research described here, aims to classify recently utilized compensation techniques into distinct groups and further pinpoint their advantages and shortcomings. Additionally, a way of describing the loops as mathematical constructs is utilized to derive new circuits from the analog design perspective. A novel principle on display driving is derived by observing those mathematical control loop models and it is analyzed and evaluated as a novel way of pixel driving. Specifically, a new feedback current programming architecture and method is described and validated through experiments, which is compatible with AMOLED displays having the two transistor one capacitor (2T1C) pixel structure. The new pixel programming approach is compatible with all TFT technologies and can compensate for non-uniformities in both threshold voltage and carrier mobility of the pixel OLED drive TFT. Data gathered show that a pixel drive current of 20 nA can be programmed in less than 10usec. This new approach can be implemented within an AMOLED external or integrated display data driver. The method to achieve robustness in the operation of the loop is also presented here, observed through a series of measurements. All the peripheral blocks implementing the design are presented and analyzed through simulations and verified experimentally. Sources of noise are identified and eliminated, while new techniques for better isolation from digital noise are described and tested on a newly fabricated driver. Multiple versions of the new proposed circuit are outlined, simulated, fabricated and measured to evaluate their performance.A novel active matrix array approach suitable for a compact multi-channel gas sensor platform is also described. The proposed active matrix sensor array utilizes an array of P-i-N diodes each connected in series with an Inter-Digitated Electrode (IDE). The functionality of 8x8 and 16x16 sensor arrays measured through external current feedback loops is also presented for the 8x8 arrays and the detection of ammonia (NH3) and chlorine (Cl2) vapor sources is demonstrated

    Technology aware circuit design for smart sensors on plastic foils

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    Flexible, Photopatterned, Colloidal Cdse Semiconductor Nanocrystal Integrated Circuits

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    As semiconductor manufacturing pushes towards smaller and faster transistors, a parallel goal exists to create transistors which are not nearly as small. These transistors are not intended to match the performance of traditional crystalline semiconductors; they are designed to be significantly lower in cost and manufactured using methods that can make them physically flexible for applications where form is more important than speed. One of the developing technologies for this application is semiconductor nanocrystals. We first explore methods to develop CdSe nanocrystal semiconducting “inks” into large-scale, high-speed integrated circuits. We demonstrate photopatterned transistors with mobilities of 10 cm2/Vs on Kapton substrates. We develop new methods for vertical interconnect access holes to demonstrate multi-device integrated circuits including inverting amplifiers with ~7 kHz bandwidths, ring oscillators with \u3c10 ”s stage delays, and NAND and NOR logic gates. In order to produce higher performance and more consistent transistors, we develop a new hybrid procedure for processing the CdSe nanocrystals. This procedure produces transistors with repeatable performance exceeding 40 cm2/Vs when fabricated on silicon wafers and 16 cm2/vs when fabricated as part of photopatterned integrated circuits on Kapton substrates. In order to demonstrate the full potential of these transistors, methods to create high-frequency oscillators were developed. These methods allow for transistors to operate at higher voltages as well as provide a means for wirebonding to the Kapton substrate, both of which are required for operating and probing high-frequency oscillators. Simulations of this system show the potential for operation at MHz frequencies. Demonstration of these transistors in this frequency range would open the door for development of CdSe integrated circuits for high-performance sensor, display, and audio applications. To develop further applications of electronics on flexible substrates, procedures are developed for the integration of polychromatic displays on polyethylene terephthalate (PET) substrates and a commercial near field communication (NFC) link. The device draws its power from the NFC transmitter common on smartphones and eliminates the need for a fixed battery. This allows for the mass deployment of flexible, interactive displays on product packaging

    Circuit Design and Compact Modeling in Printed Electronics Based on Inorganic Materials

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    Die gedruckte Elektronik ist ein im Vergleich zur konventionellen Siliziumtechnologie junges Forschungsgebiet. Die Idee hinter der gedruckten Elektronik ist es elektronische Bauteile wie WiderstĂ€nde, KapazitĂ€ten, Solarzellen, Dioden und Transistoren mit gĂ€ngigen Druckmethoden herzustellen. Dabei ist es möglich die elektronischen Bauteile auf unbiegsamen Substrate, wie Glas oder Silizium, als auch auf biegsamen Substrate, wie Papier und Folie, zu drucken. Aufgrund des Druckprozesses, sind die Herstellungskosten gering, da drucken ein additiver Prozess ist und somit teure Masken obsolet sind. In einem Feldeffekttransistor, wird der Halbleiter zwischen zwei Elektroden (Drain- und Source) gedruckt. Die Drain- und Source-Elektroden werden dabei durch einen Vakuum- oder Druckprozess abgeschieden und strukturiert. Der halbleitende Kanal wird durch einen Dielektrikum von der Gate-Elektrode isoliert. Auch fĂŒr das Dielektrikum und die Gate-Elektrode sind ein Vakuum- oder Druckprozess denkbar. StandardmĂ€ĂŸig finden organische Materialien Einsatz in der gedruckten Elektronik. Leider weisen organische Halbleiter, in einem Feldeffekttransistor, nur eine geringe LadungstrĂ€gerbeweglichkeit (≀1\leq 1 cm2^2(Vs)−1^{-1}) auf. Die niedrige LadungstrĂ€gerbeweglichkeit fĂŒhrt zu einer geringen LadungstrĂ€gerdichte im Halbleiter und als Resultat zu geringen Stromdichten. Auch sind grĂ¶ĂŸtenteils nur p-leitende Halbleiter fĂŒr den Einsatz in Schaltungen vorhanden, weswegen die meisten Schaltungen nur p-leitende Feldeffekttransistoren besitzen. Ein weiterer Nachteil der organischen Elektronik ist, dass die eingesetzten Dielektrika mit dem Halbleiter eine mangelhafte GrenzflĂ€che bildet. Deshalb sind Versorgungsspannungen in Bereich von 5 V keine Seltenheit. Eine interessante Alternative zu organischen Halbleitern sind Materialien die der Kategorie der Oxide zugeordnet sind. Zum Beispiel in Indiumoxid (In2_{2}O3_{3}) ist eine LadungstrĂ€erbeweglichkeit um die 100 cm2^2(Vs)−1^{-1} messbar. Leider sind durch Oxide realisierte p-leitende Feldeffekttransistoren sehr selten, weshalb die meisten Schaltungen auf n-leitenden Feldeffekttransistoren basieren. Ein weiterer Nachteil von Metalloxidhalbleitern is das hohe GlĂŒhtemperaturen (\sim 400 \, ^\circC) benötigt werden um die richtige Kristallstruktur zu erzielen. Durch den Einsatz eines Elektrolyten, anstatt eines Dielektrikum, werden die benötigten hohen Versorgungsspannungen auf 1 V reduziert. Der Grund fĂŒr die Reduzierung der Versorgungsspannung liegt in der hohen KapazitĂ€t (∌5 Ό\sim 5 \, \muF(cm)−1^{-1}), die sich zwischen der Gate-Elektrode und dem Kanal ausbildet. Die optimale GrenzflĂ€che zwischen der Gate-Elektrode und dem Elektrolyten sowie als auch zwischen dem Elektrolyten und dem Kanal, wo sich eine Helmholtz-Doppelschicht ausbildet, ist der Grund fĂŒr die hohe KapazitĂ€t. In dieser Arbeit, werden die Vorteile der hohen LadungstrĂ€gerbeweglichkeit, resultierend von einem Indiumoxid-Kanal, und der niedrigen Versorgungsspannungen, durch den Einsatz eines Elektrolyten als Isolator, in einem gedruckten Transistor kombiniert. Daher ist das Ziel zunĂ€chst Transistoren basierend auf einem Elektrolyten und Indiumoxid-Kanal zu charakterisieren und zu modellieren. Auch werden Möglichkeiten zum Schaltungsentwurf mit der hier vorgestellten Transistortechnologie ausgearbeitet. Der Schaltungsentwurf wird anhand mikroelektronischen Zellen und Ringoszillator-Strukturen verifiziert. Wichtig fĂŒr den Schaltungsentwurf sind Modelle die fĂ€hig sind die elektrischen Eigenschaften eines Transistors abzubilden. Dabei muss die simulierte Kurve Stetigkeit und KontinuitĂ€t aufweisen um Konvergenzprobleme wĂ€hrend der Simulation zu verhindern. Zur Modellierung der elektrischen Eigenschaften und Ströme der Transistoren wird ein Modell basierend auf den Curtice-Modell entwickelt. Der Bereich ĂŒber der Schwellwertspannung wird daher durch das Curtice-Modell abgebildet und der Bereich unter der Schwellspannung durch ein aus Siliziumtransistoren bekanntes Standard-Modell beschrieben. KontinuitĂ€t und Stetigkeit wird durch eine Interpolation zwischen den beiden Transistormodellen gewĂ€hrleistet. Ein Verglich zwischen gemessenen und simulierten Daten zeigt das das Modell die hier vorgestellte Transistortechnologie sehr gut abbilden kann. Das entwickelte Transistormodel wird zur unterstĂŒtzung des Schaltungsentwurf in einem Prozesskit (PDK) integriert. Dadurch ist das Verhalten einer Schaltung durch Simulation vorhersehbar. In der Simulation können auch der Einfluss der Umwelt, z.B. Luftfeuchtigkeit, auf die Transistoren analysiert werden. In der digitalen Schaltungstechnik wird ein p-leitender Feldeffekttransistor verwendet um ein Eingangssignal hochzusetzen, wĂ€hrend um ein Signal runterzusetzen, ein n-leitender Feldeffekttransistor von Vorteil ist. Da p-leitende Oxide selten und unzuverlĂ€ssig sind, wird der p-leitende Feldeffekttransistor durch einen Widerstand (Transistor-Widerstand-Logik (TRL)) oder einen n-leitenden Feldeffekttransistor (Transistor-Transistor-Logik (TTL)) ersetzt. Ein Inverter in TRL weist bei einer Versorgungsspannung von 1 V einen VerstĂ€rkungsfaktor von ungefĂ€hr -5 auf und eine Signalverzögerung von 0.9 ms. Die Oszillatorfrequenz im entsprechend Ringoszillator betrĂ€gt 296 Hz. Weitere Logikgatter (NAND, NOR und XOR) sind ebenfalls realisierbar mit TRL-EntwĂŒrfe. In TTL wird der p-leitende Feldeffekttransistor durch einen n-leitenden Verarmungstyps Feldeffekttransistor ersetzt. Die in der TTL entworfene Logikgatter verhalten sich identisch zu den TTR-Zellen aber die Frequenz vom Ringoszillator steigt bis in den unteren kHz-Bereich an. In TTL ist es ebenfalls möglich die Verlustleistung um einen Faktor von 6 zu reduzieren

    A Second-Order ΣΔ ADC using sputtered IGZO TFTs with multilayer dielectric

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    This dissertation combines materials science and electronics engineering to implement, for the first time, a 2nd-order ∑∆ ADC using oxide TFTs. The transistors employ a sputtered IGZO semiconductor and an optimizeddielectric layer, based on mixtures of sputtered Ta2O5and SiO2. These dielectrics are studied in multilayer configurations, being the best results achieved for 7 layers: IG7.5 MV/cm, while keeping Îș>10, yielding a major improvement over Ta2O5single-layer. After annealing at 200 °C, TFTs with these dielectrics exhibit ÎŒSAT≈13 cm2/Vs, On/Off≈107and S≈0.2 V/dec. An a-Si:H TFT RPI model is adapted to simulate these devices with good fitting to experimental data. Concerning circuits, the ∑∆ architecture is naturally selected to deal with device mismatch. After design optimization, ADC simulations achieve SNDR≈57 dB, DR≈65 dB and power dissipation, approximately, of 22 mW (VDD=10 V), which are above the current state-of-the-art for competing thinfilm technologies, such as organics or even LTPS. Mask layouts are currently under verification to enable successful circuit fabrication in the next months.This work is a major step towards the design of complex multifunctional electronic systems with oxide TFT technology, being integrated in ongoing EU-funded and FCT-funded research projects at CENIMAT and UNINOVA
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