Digital signal conditioning on multiprocessor systems

An important application area of modem computer systems is that of digital signal processing. This discipline is concerned with the analysis or modification of digitally represented signals, through the use of simple mathematical operations. A primary need of such systems is that of high data throughput. Although optimised programmable processors are available, system designers are now looking towards parallel processing to gain further performance increases. Such parallel systems may be easily constructed using the transputer family of processors. However, although these devices are comparatively easy to program, they possess a general von Neumann core and so are relatively inefficient at implementing digital signal processing algorithms. The power of the transputer lies in its ability to communicate effectively, not in its computational capability. The converse is true of specialised digital signal processors. These devices have been designed specifically to implement the type of small data intensive operations required by digital signal processing algorithms, but have not been designed to operate efficiently in a multiprocessor environment. This thesis examines the performance of both types of processors with reference to a common signal processing application, multichannel filtering. The transputer is examined in both uniprocessor and multiprocessor configurations, and its performance analysed. A theoretical model of program behaviour is developed, in order to assess the performance benefits of particular code structures and the effects of such parameters as data block size. The transputer implementation is contrasted with that of the Motorola DSP56001 digital signal processor. This device is found to be much more efficient at implementing such algorithms on a single device, but provides limited multiprocessor support. Using the conclusions of this assessment, a hybrid multiprocessor has been designed. This consists of a transputer controlling a number of signal processors, communicating through shared memory, separating tiie tasks of computation and communication. Forcing the transputer to communicate through shared memory causes problems, and these have been addressed. A theoretical performance model of the system has been produced. A small system has been constructed, and is currently running performance test software

A study of aspects of synchronisation and communication in certain parallel computer architectures

This paper examines methods for synchronisation and communication between tasks in highly parallel arrays of processors. The development of various methods is researched and simulation techniques are applied to specific structures, to examine their effectiveness. Two approaches to simulation are presented, in the first case a discrete event simulator is applied to task synchronisation implemented with semaphores in a close coupled environment. Secondly the concurrent programming language Occam is used to simulate a systolic configuration of processors. In this case the design is verified, through actual system construction. Conclusions are drawn regarding the design disciplines and structure imposed by the use of these simulation techniques. A close relationship is found between the behaviour of a simulation written in Occam and the same structure constructed from multiple processors. Further research is suggested into the subject of dataflow processors, to find suitable means for simulating such systems, prior to implementation. A type of test vehicle is proposed that would operate a dataflow processor under the control of the development system

Multi-wavelength infrared imaging computer systems and applications

This dissertation presents the development of three computer systems for multi-wavelength thermal imaging. Two computer systems were developed for the multi-wavelength imaging pyrometers (M-WIPs) that yield non-contact temperature measurements by remotely sensing the surface of objects with unknown wavelength-dependent emissivity. These M-WIP computer systems represent the state-of-art development in remote temperature measurement system based on the multi-wavelength approach. The dissertation research includes M-WIP computer system integration, software development, performance evaluation, and also applications in monitoring and control of temperature distribution of silicon wafers in a rapid thermal process system. The two M-WIPs are capable of data acquisition, signal processing, system calibration, radiometric measurement, parallel processing and process control. Temperature measurement experiments demonstrated the accuracy of ±1°C against blackbody and ±4°C for colorbody objects. Various algorithms were developed and implemented, including real-time two-point non-uniformity correction, thermal image pseudocoloring, PC to SUN workstation data transfer, automatic IR camera integration time control, and radiometric measurement parallel processing. A third computer system was developed for the demonstration of a 3-color InGaAs FPA which can provide images with information in three different IR wavelength range simultaneously. Numbers of functions were developed to demonstrate and characterize 3-color FPAs, and the system was delivered to be used by the 3-color FPA manufacturer

Management of concurrency in a reliable object-oriented computing system

PhD ThesisModern computing systems support concurrency as a means of increasing the performance of the system. However, the potential for increased performance is not without its problems. For example, lost updates and inconsistent retrieval are but two of the possible consequences of unconstrained concurrency. Many concurrency control techniques have been designed to combat these problems; this thesis considers the applicability of some of these techniques in the context of a reliable object-oriented system supporting atomic actions. The object-oriented programming paradigm is one approach to handling the inherent complexity of modern computer programs. By modeling entities from the real world as objects which have well-defined interfaces, the interactions in the system can be carefully controlled. By structuring sequences of such interactions as atomic actions, then the consistency of the system is assured. Objects are encapsulated entities such that their internal representation is not externally visible. This thesis postulates that this encapsulation should also include the capability for an object to be responsible for its own concurrency control. Given this latter assumption, this thesis explores the means by which the property of type-inheritance possessed by object-oriented languages can be exploited to allow programmers to explicitly control the level of concurrency an object supports. In particular, a object-oriented concurrency controller based upon the technique of two-phase locking is described and implemented using type-inheritance. The thesis also shows how this inheritance-based approach is highly flexible such that the basic concurrency control capabilities can be adopted unchanged or overridden with more type-specific concurrency control if requiredUK Science and Engineering Research Council, Serc/Alve

The exploitation of parallelism on shared memory multiprocessors

PhD ThesisWith the arrival of many general purpose shared memory multiple processor (multiprocessor) computers into the commercial arena during the mid-1980's, a rift has opened between the raw processing power offered by the emerging hardware and the relative inability of its operating software to effectively deliver this power to potential users. This rift stems from the fact that, currently, no computational model with the capability to elegantly express parallel activity is mature enough to be universally accepted, and used as the basis for programming languages to exploit the parallelism that multiprocessors offer. To add to this, there is a lack of software tools to assist programmers in the processes of designing and debugging parallel programs. Although much research has been done in the field of programming languages, no undisputed candidate for the most appropriate language for programming shared memory multiprocessors has yet been found. This thesis examines why this state of affairs has arisen and proposes programming language constructs, together with a programming methodology and environment, to close the ever widening hardware to software gap. The novel programming constructs described in this thesis are intended for use in imperative languages even though they make use of the synchronisation inherent in the dataflow model by using the semantics of single assignment when operating on shared data, so giving rise to the term shared values. As there are several distinct parallel programming paradigms, matching flavours of shared value are developed to permit the concise expression of these paradigms.The Science and Engineering Research Council

Tyrimai įterptines Operacines sistemas skirtus belaidžio korinio daiktų interneto (DI) sistemoms

The master degree final project focusses on Embedded Operating Systems for a Wireless Cellular IoT System. Internet of Things (IoT) is a great chance for upcoming devices to be intelligent, more robust and efficient. This tremendous pathway has become available due to regular cost degradation of various separate systems and accessories like sensors, computing devices, communication methods, the cloud and the big data paradigms. Connectivity is the base for IoT and the type of access needed will focus on the nature of the application. Thus, the target is now on Narrow Band IoT, which is a Low Power Wide Area Network (LPWAN) radio technology standard that has been developed to contribute a wide range of devices and services to be connected via cellular telecommunications bands. Accordingly, the thesis works on ARM MBED OS, an embedded operating system, which is a platform as well as operating system for internet connected devices for 32-bit ARM cortex-M microcontrollers which is needed for NB-IoT system. First, MBED OS is designed and implemented on ARM cortex -M prototyping system MPS2+ as a real-time operating system by bringing latest version of CMSIS-RTOS with RTX as kernel on Cortex-M4 as well as its successor Cortex-M33 contained on MPS2+ hardware board to examine different RTOS parameters such as memory, heap, stack, hardware and software impacts. Next, these obtained parameters for MBED OS is compared with other RTOS, say FreeRTOS on MPS2+ board. Thus, the final outcome would be how cellular IoT system will change when a new embedded operating system will be incorporated into Corelink SSE 200 IoT subsytem and fulfil the requirements for NB-IoT standard