Capacitive coupled RFID tag using a new dielectric droplet encapsulation approach

Radio frequency identification (RFID) is a well-known and fast-growing technology used to identify people, animals and products. RFID tags are used to replace bar codes in a wide range of applications, to mention just a few, retail, transportation, logistics and healthcare. The two main driving aspects for most of research and development projects concerning RFID tags are the reduction of assembly costs and the downsizing of microchips. In that respect and considering an Industry 4.0 scenario, the study of a new assembly approach for passive and high frequency RFID tags has been proposed and studied in this thesis. In this new approach, which is based on the inkjet printing technology, a specifically designed radio frequency integrated circuit (RFIC) will be delivered, inside a liquid dielectric droplet, onto the antenna and no longer placed and oriented precisely as it happens nowadays with pick-and-place and flip chip machines. After a landing phase, the liquid droplet (with the encapsulated chip) will self-aligns with respect to the contact thanks to capillary forces driven by specifically designed wetting conditions on the substrate of the antenna. Finally, with few additional steps, the complete RFID tag is created. This research project brings to light a considerable simplification and a very high potential of parallelization, compatible with large volume manufacturing methods, in comparison to nowadays existing technologies. This may substantially drive down the fabrication costs. An in-depth analysis of electrical performances have been carefully undertaken and compliance with the ISO/IEC 144443 standard has been verified. Mathematical models have been developed showing fundamental limits for the maximum tag reading range and power requirements of the RFID reader

A wirelessly-powered sensor platform using a novel textile antenna

This thesis describes the design and analysis of a novel wideband circularly-polarized textile antenna to power up a wearable wirelessly-powered sensor system operating in the 2.45 GHz ISM band (2.4-2.5 GHz) and the building of the whole system. The system is constructed using off-the-shelf components and it is shown that the wirelessly-powered sensor system is able to operate when just a few mW are transmitted from a base station at a distance over a metre. Initially, standard linearly-polarized patch antennas are used for power transmission. However, the antennas have to be aligned perfectly for the best efficiency. Subsequently, a circularly-polarized antenna is proposed for enhanced wireless-power transfer due to the freedom of orientation. A wide-slot antenna without a ground plane has been chosen for its simplicity and wide impedance band. The geometry is firstly optimized for wide impedance and 3-dB axial ratio bandwidth on FR-4. The experimental and simulation results have been studied to analyse the characteristics of such an antenna. The wideband circularly-polarized antenna is then constructed using a conductive textile and re-optimized for on-body applications. With a simple antenna geometry and only a single layer of conductive textile layer, the axial ratio and impedance bandwidths are wide enough to cover the whole 2.45 GHz ISM band with plenty of margin and are significantly wider than any other on-body circularly-polarized textile patch antennas which have been reported. The characteristics of this wideband circularly-polarized antenna under different conditions on the human body have been measured and then connected to the wirelessly-powered sensor system to demonstrate the effectiveness of power transfer to the human body

Modelagem e projeto de conversores AC/DC de ultrabaixa tensão de operação

Tese (doutorado) - Universidade Federal de Santa Catarina, Centro Tecnológico. Programa de Pós-Graduação em Engenharia ElétricaEsta tese apresenta o desenvolvimento de um modelo analítico e muito simples do circuito retificador, considerando a lei corrente-tensão (exponencial) do diodo, tendo como mérito simplificar um problema relativamente complexo e não linear (retificador) com uma ótima precisão. O modelo mostra-se válido, mesmo para tensões abaixo da tensão térmica, tendo sido testado para um ampla variação de tensão e corrente. São apresentadas equações para a tensão DC de saída, ripple de tensão, transiente durante o startup e eficiência de conversão de potência. Para validação, o modelo é comparado à simulações realizadas em simulador SPICE e a resultados experimentais, mostrando uma ótima precisão. Comparando-se este modelo com outros citados nas referências bibliográficas, este possui a vantagem de ser analítico, mais simples e/ou mais preciso. O desenvolvimento deste modelo torna-se mais importante, à medida que cresce o interesse pela utilização de sensores remotos autoalimentados, e também pelo uso de dispositivos de identificação por rádiofrequência (RFID). O espaço de projeto do conversor AC/DC foi explorado por meio de equações simples e de uma metodologia de projeto desenvolvida para que, através de gráficos, o projetista possa de forma fácil, rápida e com boa precisão, determinar os principais elementos do conversor AC/DC e da rede de adaptação de impedâncias. Para alcançar potências menores na entrada do conversor AC/DC, a metodologia utiliza redes de adaptação de impedâncias para o casamento entre as impedâncias da antena (ou impedância da fonte geradora de sinal AC) e do conversor AC/DC. Além disso, esta metodologia pode ser utilizada para conversores AC/DC com diodos ou transistores conectados como diodos, mesmo que sua equação característica não seja a do diodo exponencial. Para a utilização do conversor AC/DC em circuitos integrados, são estudadas as possibilidades de uso do transistor MOS conectado como diodo operando na região de inversão fraca. Para obter suporte experimental, foram projetados multiplicadores de tensão, com rede de adaptação de impedâncias incorporada ao circuito integrado e também externa ao mesmo, com o objetivo de atingir a menor potência de entrada disponível.This thesis presents a simple analytical model of the rectifier circuit assuming that the diode is characterized by the exponential current-voltage law. The model shown is valid even for voltages below the thermal voltage and it has been tested for a wide range of voltages and currents. Equations are provided for the DC output voltage, ripple voltage, transient during startup and power conversion efficiency. For validation, the model is compared to simulations carried out in SPICE and experimental results, showing a good accuracy. Comparing this model with others cited in the references, this one has the advantage of being analytical, simpler, and more accurate. The development of this model becomes more relevant with the growing use of self powered remote sensors, and radio frequency identification devices (RFID). The design space of the AC/DC converter was explored using a graphic methodology. To operate with reduced power at the input, the methodology uses an impedance adaptation network for the matching between the impedances of the antenna (or the source impedance of the AC signal) and that of the AC/DC converter. Furthermore, this methodology can be used for AC/DC converters with diodes or transistors connected as diodes, even if their characteristic equations are not exponential. To obtain experimental support, voltage multipliers have been designed with impedance adaptation network incorporated into the integrated circuit and also external to it, in order to achieve the lowest possible power at the input

Wireless wire - ultra-low-power and high-data-rate wireless communication systems

With the rapid development of communication technologies, wireless personal-area communication systems gain momentum and become increasingly important. When the market gets gradually saturated and the technology becomes much more mature, new demands on higher throughput push the wireless communication further into the high-frequency and high-data-rate direction. For example, in the IEEE 802.15.3c standard, a 60-GHz physical layer is specified, which occupies the unlicensed 57 to 64 GHz band and supports gigabit links for applications such as wireless downloading and data streaming. Along with the progress, however, both wireless protocols and physical systems and devices start to become very complex. Due to the limited cut-off frequency of the technology and high parasitic and noise levels at high frequency bands, the power consumption of these systems, especially of the RF front-ends, increases significantly. The reason behind this is that RF performance does not scale with technology at the same rate as digital baseband circuits. Based on the challenges encountered, the wireless-wire system is proposed for the millimeter wave high-data-rate communication. In this system, beamsteering directional communication front-ends are used, which confine the RF power within a narrow beam and increase the level of the equivalent isotropic radiation power by a factor equal to the number of antenna elements. Since extra gain is obtained from the antenna beamsteering, less front-end gain is required, which will reduce the power consumption accordingly. Besides, the narrow beam also reduces the interference level to other nodes. In order to minimize the system average power consumption, an ultra-low power asynchronous duty-cycled wake-up receiver is added to listen to the channel and control the communication modes. The main receiver is switched on by the wake-up receiver only when the communication is identified while in other cases it will always be in sleep mode with virtually no power consumed. Before transmitting the payload, the event-triggered transmitter will send a wake-up beacon to the wake-up receiver. As long as the wake-up beacon is longer than one cycle of the wake-up receiver, it can be captured and identified. Furthermore, by adopting a frequency-sweeping injection locking oscillator, the wake-up receiver is able to achieve good sensitivity, low latency and wide bandwidth simultaneously. In this way, high-data-rate communication can be achieved with ultra-low average power consumption. System power optimization is achieved by optimizing the antenna number, data rate, modulation scheme, transceiver architecture, and transceiver circuitries with regards to particular application scenarios. Cross-layer power optimization is performed as well. In order to verify the most critical elements of this new approach, a W-band injection-locked oscillator and the wake-up receiver have been designed and implemented in standard TSMC 65-nm CMOS technology. It can be seen from the measurement results that the wake-up receiver is able to achieve about -60 dBm sensitivity, 10 mW peak power consumption and 8.5 µs worst-case latency simultaneously. When applying a duty-cycling scheme, the average power of the wake-up receiver becomes lower than 10 µW if the event frequency is 1000 times/day, which matches battery-based or energy harvesting-based wireless applications. A 4-path phased-array main receiver is simulated working with 1 Gbps data rate and on-off-keying modulation. The average power consumption is 10 µW with 10 Gb communication data per day

Transceiver architectures and sub-mW fast frequency-hopping synthesizers for ultra-low power WSNs

Wireless sensor networks (WSN) have the potential to become the third wireless revolution after wireless voice networks in the 80s and wireless data networks in the late 90s. This revolution will finally connect together the physical world of the human and the virtual world of the electronic devices. Though in the recent years large progress in power consumption reduction has been made in the wireless arena in order to increase the battery life, this is still not enough to achieve a wide adoption of this technology. Indeed, while nowadays consumers are used to charge batteries in laptops, mobile phones and other high-tech products, this operation becomes infeasible when scaled up to large industrial, enterprise or home networks composed of thousands of wireless nodes. Wireless sensor networks come as a new way to connect electronic equipments reducing, in this way, the costs associated with the installation and maintenance of large wired networks. To accomplish this task, it is necessary to reduce the energy consumption of the wireless node to a point where energy harvesting becomes feasible and the node energy autonomy exceeds the life time of the wireless node itself. This thesis focuses on the radio design, which is the backbone of any wireless node. A common approach to radio design for WSNs is to start from a very simple radio (like an RFID) adding more functionalities up to the point in which the power budget is reached. In this way, the robustness of the wireless link is traded off for power reducing the range of applications that can draw benefit form a WSN. In this thesis, we propose a novel approach to the radio design for WSNs. We started from a proven architecture like Bluetooth, and progressively we removed all the functionalities that are not required for WSNs. The robustness of the wireless link is guaranteed by using a fast frequency hopping spread spectrum technique while the power budget is achieved by optimizing the radio architecture and the frequency hopping synthesizer Two different radio architectures and a novel fast frequency hopping synthesizer are proposed that cover the large space of applications for WSNs. The two architectures make use of the peculiarities of each scenario and, together with a novel fast frequency hopping synthesizer, proved that spread spectrum techniques can be used also in severely power constrained scenarios like WSNs. This solution opens a new window toward a radio design, which ultimately trades off flexibility, rather than robustness, for power consumption. In this way, we broadened the range of applications for WSNs to areas in which security and reliability of the communication link are mandatory