5 research outputs found
HIGH-SPEED CONFLICT-FREE LAYERED LDPC DECODER FOR THE DVB-S2, -T2 AND -C2 STANDARDS
International audienceLayered decoding is known to provide efficient and highthroughput implementation of LDPC decoders. However, the implementation of layered architecture is not always straightforward because of memory update conflicts in the a posteriori information memory. In this paper, we focus our attention on a particular type of conflict that is due to multiple-diagonal sub-matrices in the DVB-S2, -T2 and -C2 parity-check matrices. We propose an original solution that combines repetition of the concerned layers and the write disable of the a posteriori information memory. The implementation of this solution on an FPGA-based LDPC decoder led to an average air throughput of 200 Mbit/s with a parallelism of 45 and a clock frequency of 300 MHz. Increasing the parallelism to 120 led to an average air throughput of 720 Mbit/s with a clock frequency of 400 MHz on CMOS technology
VLSI decoding architectures: flexibility, robustness and performance
Stemming from previous studies on flexible LDPC decoders, this thesis work has been mainly focused on the development of flexible turbo and LDPC decoder designs, and on the narrowing of the power, area and speed gap they might present with respect to dedicated solutions. Additional studies have been carried out within the field of increased code performance and of decoder resiliency to hardware errors. The first chapter regroups several main contributions in the design and implementation of flexible channel decoders. The first part concerns the design of a Network-on-Chip (NoC) serving as an interconnection network for a partially parallel LDPC decoder. A best-fit NoC architecture is designed and a complete multi-standard turbo/LDPC decoder is designed and implemented. Every time the code is changed, the decoder must be reconfigured. A number of variables influence the duration of the reconfiguration process, starting from the involved codes down to decoder design choices. These are taken in account in the flexible decoder designed, and novel traffic reduction and optimization methods are then implemented. In the second chapter a study on the early stopping of iterations for LDPC decoders is presented. The energy expenditure of any LDPC decoder is directly linked to the iterative nature of the decoding algorithm. We propose an innovative multi-standard early stopping criterion for LDPC decoders that observes the evolution of simple metrics and relies on on-the-fly threshold computation. Its effectiveness is evaluated against existing techniques both in terms of saved iterations and, after implementation, in terms of actual energy saving. The third chapter portrays a study on the resilience of LDPC decoders under the effect of memory errors. Given that the purpose of channel decoders is to correct errors, LDPC decoders are intrinsically characterized by a certain degree of resistance to hardware faults. This characteristic, together with the soft nature of the stored values, results in LDPC decoders being affected differently according to the meaning of the wrong bits: ad-hoc error protection techniques, like the Unequal Error Protection devised in this chapter, can consequently be applied to different bits according to their significance. In the fourth chapter the serial concatenation of LDPC and turbo codes is presented. The concatenated FEC targets very high error correction capabilities, joining the performance of turbo codes at low SNR with that of LDPC codes at high SNR, and outperforming both current deep-space FEC schemes and concatenation-based FECs. A unified decoder for the concatenated scheme is subsequently propose
High-Performance Decoder Architectures For Low-Density Parity-Check Codes
The Low-Density Parity-Check (LDPC) codes, which were invented by Gallager back in 1960s, have attracted considerable attentions recently. Compared with other error correction codes, LDPC codes are well suited for wireless, optical, and magnetic recording systems due to their near- Shannon-limit error-correcting capacity, high intrinsic parallelism and high-throughput potentials. With these remarkable characteristics, LDPC codes have been adopted in several recent communication standards such as 802.11n (Wi-Fi), 802.16e (WiMax), 802.15.3c (WPAN), DVB-S2 and CMMB. This dissertation is devoted to exploring efficient VLSI architectures for high-performance LDPC decoders and LDPC-like detectors in sparse inter-symbol interference (ISI) channels. The performance of an LDPC decoder is mainly evaluated by area efficiency, error-correcting capability, throughput and rate flexibility. With this work we investigate tradeoffs between the four performance aspects and develop several decoder architectures to improve one or several performance aspects while maintaining acceptable values for other aspects. Firstly, we present a high-throughput decoder design for the Quasi-Cyclic (QC) LDPC codes. Two new techniques are proposed for the first time, including parallel layered decoding architecture (PLDA) and critical path splitting. Parallel layered decoding architecture enables parallel processing for all layers by establishing dedicated message passing paths among them. The decoder avoids crossbar-based large interconnect network. Critical path splitting technique is based on articulate adjustment of the starting point of each layer to maximize the time intervals between adjacent layers, such that the critical path delay can be split into pipeline stages. Furthermore, min-sum and loosely coupled algorithms are employed for area efficiency. As a case study, a rate-1/2 2304-bit irregular LDPC decoder is implemented using ASIC design in 90 nm CMOS process. The decoder can achieve an input throughput of 1.1 Gbps, that is, 3 or 4 times improvement over state-of-art LDPC decoders, while maintaining a comparable chip size of 2.9 mm^2. Secondly, we present a high-throughput decoder architecture for rate-compatible (RC) LDPC codes which supports arbitrary code rates between the rate of mother code and 1. While the original PLDA is lack of rate flexibility, the problem is solved gracefully by incorporating the puncturing scheme. Simulation results show that our selected puncturing scheme only introduces the BER performance degradation of less than 0.2dB, compared with the dedicated codes for different rates specified in the IEEE 802.16e (WiMax) standard. Subsequently, PLDA is employed for high throughput decoder design. As a case study, a RC- LDPC decoder based on the rate-1/2 WiMax LDPC code is implemented in CMOS 90 nm process. The decoder can achieve an input throughput of 975 Mbps and supports any rate between 1/2 and 1. Thirdly, we develop a low-complexity VLSI architecture and implementation for LDPC decoder used in China Multimedia Mobile Broadcasting (CMMB) systems. An area-efficient layered decoding architecture based on min-sum algorithm is incorporated in the design. A novel split-memory architecture is developed to efficiently handle the weight-2 submatrices that are rarely seen in conventional LDPC decoders. In addition, the check-node processing unit is highly optimized to minimize complexity and computing latency while facilitating a reconfigurable decoding core. Finally, we propose an LDPC-decoder-like channel detector for sparse ISI channels using belief propagation (BP). The BP-based detection computationally depends on the number of nonzero interferers only and are thus more suited for sparse ISI channels which are characterized by long delay but a small fraction of nonzero interferers. Layered decoding algorithm, which is popular in LDPC decoding, is also adopted in this paper. Simulation results show that the layered decoding doubles the convergence speed of the iterative belief propagation process. Exploring the special structure of the connections between the check nodes and the variable nodes on the factor graph, we propose an effective detector architecture for generic sparse ISI channels to facilitate the practical application of the proposed detection algorithm. The proposed architecture is also reconfigurable in order to switch flexible connections on the factor graph in the time-varying ISI channels
Solutions for New Terrestrial Broadcasting Systems Offering Simultaneously Stationary and Mobile Services
221 p.[EN]Since the first broadcasted TV signal was transmitted in the early decades of
the past century, the television broadcasting industry has experienced a series of
dramatic changes. Most recently, following the evolution from analogue to digital
systems, the digital dividend has become one of the main concerns of the
broadcasting industry. In fact, there are many international spectrum authorities
reclaiming part of the broadcasting spectrum to satisfy the growing demand of
other services, such as broadband wireless services, arguing that the TV services
are not very spectrum-efficient.
Apart from that, it must be taken into account that, even if up to now the
mobile broadcasting has not been considered a major requirement, this will
probably change in the near future. In fact, it is expected that the global mobile
data traffic will increase 11-fold between 2014 and 2018, and what is more, over
two thirds of the data traffic will be video stream by the end of that period.
Therefore, the capability to receive HD services anywhere with a mobile device is
going to be a mandatory requirement for any new generation broadcasting system.
The main objective of this work is to present several technical solutions that
answer to these challenges. In particular, the main questions to be solved are the
spectrum efficiency issue and the increasing user expectations of receiving high
quality mobile services. In other words, the main objective is to provide technical
solutions for an efficient and flexible usage of the terrestrial broadcasting spectrum
for both stationary and mobile services.
The first contributions of this scientific work are closely related to the study of
the mobile broadcast reception. Firstly, a comprehensive mathematical analysis of
the OFDM signal behaviour over time-varying channels is presented. In order to
maximize the channel capacity in mobile environments, channel estimation and
equalization are studied in depth. First, the most implemented equalization
solutions in time-varying scenarios are analyzed, and then, based on these existing
techniques, a new equalization algorithm is proposed for enhancing the receivers’
performance.
An alternative solution for improving the efficiency under mobile channel
conditions is treating the Inter Carrier Interference as another noise source.
Specifically, after analyzing the ICI impact and the existing solutions for reducing
the ICI penalty, a new approach based on the robustness of FEC codes is
presented. This new approach employs one dimensional algorithms at the receiver
and entrusts the ICI removing task to the robust forward error correction codes.
Finally, another major contribution of this work is the presentation of the
Layer Division Multiplexing (LDM) as a spectrum-efficient and flexible solution
for offering stationary and mobile services simultaneously. The comprehensive
theoretical study developed here verifies the improved spectrum efficiency,
whereas the included practical validation confirms the feasibility of the system and
presents it as a very promising multiplexing technique, which will surely be a strong
candidate for the next generation broadcasting services.[ES]Desde el comienzo de la transmisión de las primeras señales de televisión a
principios del siglo pasado, la radiodifusión digital ha evolucionado gracias a una
serie de cambios relevantes. Recientemente, como consecuencia directa de la
digitalización del servicio, el dividendo digital se ha convertido en uno de los
caballos de batalla de la industria de la radiodifusión. De hecho, no son pocos los
consorcios internacionales que abogan por asignar parte del espectro de
radiodifusión a otros servicios como, por ejemplo, la telefonÃa móvil, argumentado
la poca eficiencia espectral de la tecnologÃa de radiodifusión actual.
Asimismo, se debe tener en cuenta que a pesar de que los servicios móviles no
se han considerado fundamentales en el pasado, esta tendencia probablemente
variará en el futuro cercano. De hecho, se espera que el tráfico derivado de
servicios móviles se multiplique por once entre los años 2014 y 2018; y lo que es
más importante, se pronostica que dos tercios del tráfico móvil sea video streaming
para finales de ese periodo. Por lo tanto, la posibilidad de ofrecer servicios de alta
definición en dispositivos móviles es un requisito fundamental para los sistemas de
radiodifusión de nueva generación.
El principal objetivo de este trabajo es presentar soluciones técnicas que den
respuesta a los retos planteados anteriormente. En particular, las principales
cuestiones a resolver son la ineficiencia espectral y el incremento de usuarios que
demandan mayor calidad en los contenidos para dispositivos móviles. En pocas
palabras, el principal objetivo de este trabajo se basa en ofrecer una solución más
eficiente y flexible para la transmisión simultánea de servicios fijos y móviles.
La primera contribución relevante de este trabajo está relacionada con la
recepción de la señal de televisión en movimiento. En primer lugar, se presenta un
completo análisis matemático del comportamiento de la señal OFDM en canales
variantes con el tiempo. A continuación, con la intención de maximizar la
capacidad del canal, se estudian en profundidad los algoritmos de estimación y
ecualización. Posteriormente, se analizan los algoritmos de ecualización más
implementados, y por último, basándose en estas técnicas, se propone un nuevo
algoritmo de ecualización para aumentar el rendimiento de los receptores en tales
condiciones.
Del mismo modo, se plantea un nuevo enfoque para mejorar la eficiencia de
los servicios móviles basado en tratar la interferencia entre portadoras como una
fuente de ruido. Concretamente, tras analizar el impacto del ICI en los receptores
actuales, se sugiere delegar el trabajo de corrección de dichas distorsiones en
códigos FEC muy robustos.
Finalmente, la última contribución importante de este trabajo es la
presentación de la tecnologÃa LDM como una manera más eficiente y flexible para
la transmisión simultánea de servicios fijos y móviles. El análisis teórico presentado
confirma el incremento en la eficiencia espectral, mientras que el estudio práctico
valida la posible implementación del sistema y presenta la tecnologÃa LDM c
On generalized LDPC codes for ultra reliable communication
Ultra reliable low latency communication (URLLC) is an important feature in
future mobile communication systems, as they will require high data rates, large
system capacity and massive device connectivity [11]. To meet such stringent
requirements, many error-correction codes (ECC)s are being investigated; turbo
codes, low density parity check (LDPC) codes, polar codes and convolutional codes
[70, 92, 38], among many others. In this work, we present generalized low density
parity check (GLDPC) codes as a promising candidate for URLLC.
Our proposal is based on a novel class of GLDPC code ensembles, for which
new analysis tools are proposed. We analyze the trade-o_ between coding rate and
asymptotic performance of a class of GLDPC codes constructed by including a
certain fraction of generalized constraint (GC) nodes in the graph. To incorporate
both bounded distance (BD) and maximum likelihood (ML) decoding at GC nodes
into our analysis without resorting to multi-edge type of degree distribution (DD)s,
we propose the probabilistic peeling decoding (P-PD) algorithm, which models the
decoding step at every GC node as an instance of a Bernoulli random variable with
a successful decoding probability that depends on both the GC block code as well
as its decoding algorithm. The P-PD asymptotic performance over the BEC can
be efficiently predicted using standard techniques for LDPC codes such as Density
evolution (DE) or the differential equation method. We demonstrate that the
simulated P-PD performance accurately predicts the actual performance of the
GLPDC code under ML decoding at GC nodes. We illustrate our analysis for
GLDPC code ensembles with regular and irregular DDs.
This design methodology is applied to construct practical codes for URLLC.
To this end, we incorporate to our analysis the use of quasi-cyclic (QC) structures,
to mitigate the code error floor and facilitate the code very large scale integration
(VLSI) implementation. Furthermore, for the additive white Gaussian noise
(AWGN) channel, we analyze the complexity and performance of the message
passing decoder with various update rules (including standard full-precision sum product and min-sum algorithms) and quantization schemes. The block error rate
(BLER) performance of the proposed GLDPC codes, combined with a complementary
outer code, is shown to outperform a variety of state-of-the-art codes, for
URLLC, including LDPC codes, polar codes, turbo codes and convolutional codes,
at similar complexity rates.Programa Oficial de Doctorado en Multimedia y ComunicacionesPresidente: Juan José Murillo Fuentes.- Secretario: Matilde Pilar Sánchez Fernández.- Vocal: Javier Valls Coquilla