A Conceptual Framework for Servitization in Industry 4.0: Distilling Directions for Future Research

Purpose: This paper focusses on developing further the recent conceptual frameworks of competitive dynamics and business-to-business value ecosystems considering the changing environment of Industry 4.0 and the particular perspective of servitization. Design/Methodology/Approach: This a conceptual paper that reviews and syntheses business model concepts in relation to competitive dynamics, collaborative business ecosystems and supply chain as evolving and reshaping manufacturing and services within Industry 4.0. Findings: The transformation of organizations in light of Industry 4.0 has led to a reframing of business models and practices, such as stakeholder value and supply chain relationships cooperating within a highly dynamic environment. In an attempt to consider the implications that Industry 4.0 has, particularly from the service perspective, this work attempts to distil directions for future research. Originality/Value: Previous studies on Industry 4.0 have articulated the reasoning about the benefits of Industry 4.0, with its paradigm shift to cyber-physical systems and revised business models. The intention of this paper, is to be able to further define collaboration and value ecosystems in order to show the interdependence and integration between organisations as applied to servitization within Industry 4.0. Moreover, this paper seeks to begin to articulate how research can be conducted to determine the degree to which the change and paradigm shift has become a reality

Machine Learning in Manufacturing towards Industry 4.0: From ‘For Now’ to ‘Four-Know’

While attracting increasing research attention in science and technology, Machine Learning (ML) is playing a critical role in the digitalization of manufacturing operations towards Industry 4.0. Recently, ML has been applied in several fields of production engineering to solve a variety of tasks with different levels of complexity and performance. However, in spite of the enormous number of ML use cases, there is no guidance or standard for developing ML solutions from ideation to deployment. This paper aims to address this problem by proposing an ML application roadmap for the manufacturing industry based on the state-of-the-art published research on the topic. First, this paper presents two dimensions for formulating ML tasks, namely, ’Four-Know’ (Know-what, Know-why, Know-when, Know-how) and ’Four-Level’ (Product, Process, Machine, System). These are used to analyze ML development trends in manufacturing. Then, the paper provides an implementation pipeline starting from the very early stages of ML solution development and summarizes the available ML methods, including supervised learning methods, semi-supervised methods, unsupervised methods, and reinforcement methods, along with their typical applications. Finally, the paper discusses the current challenges during ML applications and provides an outline of possible directions for future developments

Design Automation and Application for Emerging Reconfigurable Nanotechnologies

In the last few decades, two major phenomena have revolutionized the electronic industry – the ever-increasing dependence on electronic circuits and the Complementary Metal Oxide Semiconductor (CMOS) downscaling. These two phenomena have been complementing each other in a way that while electronics, in general, have demanded more computations per functional unit, CMOS downscaling has aptly supported such needs. However, while the computational demand is still rising exponentially, CMOS downscaling is reaching its physical limits. Hence, the need to explore viable emerging nanotechnologies is more imperative than ever. This thesis focuses on streamlining the existing design automation techniques for a class of emerging reconfigurable nanotechnologies. Transistors based on this technology exhibit duality in conduction, i.e. they can be configured dynamically either as a p-type or an n-type device on the application of an external bias. Owing to this dynamic reconfiguration, these transistors are also referred to as Reconfigurable Field-Effect Transistors (RFETs). Exploring and developing new technologies just like CMOS, require tackling two main challenges – first, design automation flow has to be modified to enable tailor- made circuit designs. Second, possible application opportunities should be explored where such technologies can outsmart the existing CMOS technologies. This thesis targets the above two objectives for emerging reconfigurable nanotechnologies by proposing approaches for enabling an Electronic Design Automation (EDA) flow for circuits based on RFETs and exploring hardware security as an application that exploits the transistor-level dynamic reconfiguration offered by this technology. This thesis explains the bottom-up approach adopted to propose a logic synthesis flow by identifying new logic gates and circuit design paradigms that can particularly exploit the dynamic reconfiguration offered by these novel nanotechnologies. This led to the subsequent need of finding natural Boolean logic abstraction for emerging reconfigurable nanotechnologies as it is shown that the existing abstraction of negative unate logic for CMOS technologies is sub-optimal for RFETs-based circuits. In this direction, it has been shown that duality in Boolean logic is a natural abstraction for this technology and can truly represent the duality in conduction offered by individual transistors. Finding this abstraction paved the way for defining suitable primitives and proposing various algorithms for logic synthesis and technology mapping. The following step is to explore compatible physical synthesis flow for emerging reconfigurable nanotechnologies. Using silicon nanowire-based RFETs, .lef and .lib files have been provided which can provide an end-to-end flow to generate .GDSII file for circuits exclusively based on RFETs. Additionally, new approaches have been explored to improve placement and routing for circuits based on reconfigurable nanotechnologies. It has been demonstrated how these approaches led to superior results as compared to the native flow meant for CMOS. Lastly, the unique property of transistor-level reconfiguration offered by RFETs is utilized to implement efficient Intellectual Property (IP) protection schemes against adversarial attacks. The ability to control the conduction of individual transistors can be argued as one of the impactful features of this technology and suitably fits into the paradigm of security measures. Prior security schemes based on CMOS technology often come with large overheads in terms of area, power, and delay. In contrast, RFETs-based hardware security measures such as logic locking, split manufacturing, etc. proposed in this thesis, demonstrate affordable security solutions with low overheads. Overall, this thesis lays a strong foundation for the two main objectives – design automation, and hardware security as an application, to push emerging reconfigurable nanotechnologies for commercial integration. Additionally, contributions done in this thesis are made available under open-source licenses so as to foster new research directions and collaborations.:Abstract List of Figures List of Tables 1 Introduction 1.1 What are emerging reconfigurable nanotechnologies? 1.2 Why does this technology look so promising? 1.3 Electronics Design Automation 1.4 The game of see-saw: key challenges vs benefits for emerging reconfigurable nanotechnologies 1.4.1 Abstracting ambipolarity in logic gate designs 1.4.2 Enabling electronic design automation for RFETs 1.4.3 Enhanced functionality: a suitable fit for hardware security applications 1.5 Research questions 1.6 Entire RFET-centric EDA Flow 1.7 Key Contributions and Thesis Organization 2 Preliminaries 2.1 Reconfigurable Nanotechnology 2.1.1 1D devices 2.1.2 2D devices 2.1.3 Factors favoring circuit-flexibility 2.2 Feasibility aspects of RFET technology 2.3 Logic Synthesis Preliminaries 2.3.1 Circuit Model 2.3.2 Boolean Algebra 2.3.3 Monotone Function and the property of Unateness 2.3.4 Logic Representations 3 Exploring Circuit Design Topologies for RFETs 3.1 Contributions 3.2 Organization 3.3 Related Works 3.4 Exploring design topologies for combinational circuits: functionality-enhanced logic gates 3.4.1 List of Combinational Functionality-Enhanced Logic Gates based on RFETs 3.4.2 Estimation of gate delay using the logical effort theory 3.5 Invariable design of Inverters 3.6 Sequential Circuits 3.6.1 Dual edge-triggered TSPC-based D-flip flop 3.6.2 Exploiting RFET’s ambipolarity for metastability 3.7 Evaluations 3.7.1 Evaluation of combinational logic gates 3.7.2 Novel design of 1-bit ALU 3.7.3 Comparison of the sequential circuit with an equivalent CMOS-based design 3.8 Concluding remarks 4 Standard Cells and Technology Mapping 4.1 Contributions 4.2 Organization 4.3 Related Work 4.4 Standard cells based on RFETs 4.4.1 Interchangeable Pull-Up and Pull-Down Networks 4.4.2 Reconfigurable Truth-Table 4.5 Distilling standard cells 4.6 HOF-based Technology Mapping Flow for RFETs-based circuits 4.6.1 Area adjustments through inverter sharings 4.6.2 Technology Mapping Flow 4.6.3 Realizing Parameters For The Generic Library 4.6.4 Defining RFETs-based Genlib for HOF-based mapping 4.7 Experiments 4.7.1 Experiment 1: Distilling standard-cells from a benchmark suite 4.7.2 Experiment 2A: HOF-based mapping . 4.7.3 Experiment 2B: Using the distilled standard-cells during mapping 4.8 Concluding Remarks 5 Logic Synthesis with XOR-Majority Graphs 5.1 Contributions 5.2 Organization 5.3 Motivation 5.4 Background and Preliminaries 5.4.1 Terminologies 5.4.2 Self-duality in NPN classes 5.4.3 Majority logic synthesis 5.4.4 Earlier work on XMG 5.4.5 Classification of Boolean functions 5.5 Preserving Self-Duality 5.5.1 During logic synthesis 5.5.2 During versatile technology mapping 5.6 Advanced Logic synthesis techniques 5.6.1 XMG resubstitution 5.6.2 Exact XMG rewriting 5.7 Logic representation-agnostic Mapping 5.7.1 Versatile Mapper 5.7.2 Support of supergates 5.8 Creating Self-dual Benchmarks 5.9 Experiments 5.9.1 XMG-based Flow 5.9.2 Experimental Setup 5.9.3 Synthetic self-dual benchmarks 5.9.4 Cryptographic benchmark suite 5.10 Concluding remarks and future research directions 6 Physical synthesis flow and liberty generation 6.1 Contributions 6.2 Organization 6.3 Background and Related Work 6.3.1 Related Works 6.3.2 Motivation 6.4 Silicon Nanowire Reconfigurable Transistors 6.5 Layouts for Logic Gates 6.5.1 Layouts for Static Functional Logic Gates 6.5.2 Layout for Reconfigurable Logic Gate 6.6 Table Model for Silicon Nanowire RFETs 6.7 Exploring Approaches for Physical Synthesis 6.7.1 Using the Standard Place & Route Flow 6.7.2 Open-source Flow 6.7.3 Concept of Driver Cells 6.7.4 Native Approach 6.7.5 Island-based Approach 6.7.6 Utilization Factor 6.7.7 Placement of the Island on the Chip 6.8 Experiments 6.8.1 Preliminary comparison with CMOS technology 6.8.2 Evaluating different physical synthesis approaches 6.9 Results and discussions 6.9.1 Parameters Which Affect The Area 6.9.2 Use of Germanium Nanowires Channels 6.10 Concluding Remarks 7 Polymporphic Primitives for Hardware Security 7.1 Contributions 7.2 Organization 7.3 The Shift To Explore Emerging Technologies For Security 7.4 Background 7.4.1 IP protection schemes 7.4.2 Preliminaries 7.5 Security Promises 7.5.1 RFETs for logic locking (transistor-level locking) 7.5.2 RFETs for split manufacturing 7.6 Security Vulnerabilities 7.6.1 Realization of short-circuit and open-circuit scenarios in an RFET-based inverter 7.6.2 Circuit evaluation on sub-circuits 7.6.3 Reliability concerns: A consequence of short-circuit scenario 7.6.4 Implication of the proposed security vulnerability 7.7 Analytical Evaluation 7.7.1 Investigating the security promises 7.7.2 Investigating the security vulnerabilities 7.8 Concluding remarks and future research directions 8 Conclusion 8.1 Concluding Remarks 8.2 Directions for Future Work Appendices A Distilling standard-cells B RFETs-based Genlib C Layout Extraction File (.lef) for Silicon Nanowire-based RFET D Liberty (.lib) file for Silicon Nanowire-based RFET

GAMIFICATION OF WAREHOUSING ACTIVITIES: EXPLORING PERSPECTIVES OF WAREHOUSE MANAGERS IN THE UK

Purpose The purpose of this study is to explore perspectives of warehouse managers’ on gamification of warehousing activities such as receiving, put-away, order picking, and shipping. This study explores potential benefits and obstacles of gamification in warehousing context. Research Approach A largely qualitative study which involves in depth interviews with eight warehouse managers from the United Kingdom. The interview protocol is a refined replication of methodology to gain insights from practitioners found in Lummus et al. (2001). Findings and Originality Gamification is applicable in the warehousing context with potential benefits such as improved worker engagement, increased morale and productivity, enforced competition, increased accuracy, and skills development. However there are also limitations, for instance limited resources, game tolerance with time, intense planning required, ethical implications, and ensuring fairness for all players should be considered before the implementation. Research Impact Although this study is limited to perspectives of UK warehousing managers the selected sample operates in the varied range of market sectors thus enabling the authors to generate a breadth of perspectives. Practical Impact A profile of perspectives of UK warehouse managers in relation to gamification of warehousing activities is presented

Process engineering advances in pharmaceutical and chemical industries: digital process design, advanced rectification and continuous filtration

This review paper presents some of the topics discussed at the 2018 ‘Chemical process development trends’ seminar organized by the Swiss Process and Chemical Engineers Society in Basel, Switzerland. The first subject covers the use of computer aided tools for systematic reaction route selection, the second one addresses the recent development in the field of process intensification with a focus on reactive distillation and dividing wall column technology, and the third topic highlights recent developments in the field of continuous filtration in the pharmaceutical industry

Changing States of Multistage Process Chains

Generally, a process describes a change of state of some kind (state transformation). This state change occurs from an initial state to a concluding state. Here, the authors take a step back and take a holistic look at generic processes and process sequences from a state perspective. The novel perspective this concept introduces is that the processes and their parameters are not the priority; they are rather included in the analysis by implication. A supervised machine learning based feature ranking method is used to identify and rank relevant state characteristics and thereby the processes’ inter- and intrarelationships. This is elaborated with simplified examples of possible applications from different domains to make the theoretical concept and results more feasible for readers from varying domains. The presented concept allows for a holistic description and analysis of complex, multistage processes sequences. This stands especially true for process chains where interrelations between processes and states, processes and processes, or states and states are not fully understood, thus where there is a lack of knowledge regarding causations, in dynamic, complex, and high-dimensional environments

Business Process Integration And Supply Chain Networks

Given the dot-com collapse and the recent Enron bankruptcy, one might conclude that the promises of the so-called new economy have been overstated.  Yet, in spite of the litany of failed Internet pure plays and Enron’s unexpected demise, the Internet has transformed the way the business is being conducted.  Yes, the basics still matter and cost-cutting is appropriate, but today it must be achieved along with unprecedented business-model innovation and corporate agility.  Witness the way many traditional firms are still thriving and succeeding by transforming their core business architectures around the Net. The Internet is slashing the cost of sharing knowledge, collaborating, and meshing business processes among supply chain partners.  Valued-added communities are replacing traditional vertically integrated industries. These value added communities are external networks that cover both company and supply chain processes, such as financial, marketing, accounting and human resources services.  Smart companies are focusing on their core competencies and outsourcing the remainder of their non-essential processes.  The traditional vertically integrated corporation is no longer the most effective vehicle for value creation.   Ford was the quintessential example of this. At one point, the company owned steamships, power plants, forests and virtually every other input critical to building an automobile. The vertically integrated structure worked well for auto manufacturers for a time to achieve scale economies and productivity.  But these companies have squeezed out about as much productivity as they can.  In today’s networked economy, one company makes the car's wheels, another makes the engine, another makes the seats and another makes the body all of which flow through the value added community that the auto company created.   In the end, the auto company and the consumer both benefit.  The automobile consumers get a better quality product, delivered precisely when and how they want it, at a much better cost.  The auto company can respond to customers far more quickly than ever before.  We strongly believe that the “glue” for building these networked communities is a business process orientation (BPO), a concept introduced in one of our earlier books, which serves as a powerful organizing principle for firms competing in the networked economy. BPO is not simply a new business fad, but an entirely new way of thinking or viewing an organization.  Nor is BPO simply a new business operations strategy, but rather broad framework for organizing work and information flows that ultimately help an organization build superior customer value. Corporate survival in the Internet economy will depend both on the effectiveness of internal processes and their integration with supply chain customers.  Supply chain management will serve as the coordinating mechanism for process integration among supply chain partners. Competitors can match individual processes or activities but can’t match the integration or “fit’ of these activities In this paper,we present empirical evidence showing that building a process-oriented organization results in improved business performance.  We also propose that BPO can be successfully applied to supply chain networks and argue that value is created in the networked economy based on the alignment of supply chain processes

REMIND-D: A Hybrid Energy-Economy Model of Germany

This paper presents a detailed documentation of the hybrid energy-economy model REMIND-D. REMIND-D is a Ramsey-type growth model for Germany that integrates a detailed bottom-up energy system module, coupled by a hard link. The model provides a quantitative framework for analyzing long-term domestic CO2 emission reduction scenarios. Due to its hybrid nature, REMIND-D facilitates an integrated analysis of the interplay between technological mitigation options in the different sectors of the energy system as well as overall macroeconomic dynamics. REMIND-D is an intertemporal optimization model, featuring optimal annual mitigation effort and technology deployment as a model output. In order to provide transparency on model assumptions, this paper gives an overview of the model structure, the input data used to calibrate REMIND-D to the Federal Republic of Germany, as well as the techno-economic parameters of the technologies considered in the energy system module.Hybrid Model, Germany, Energy System, Domestic Mitigation

ANALYZING VERTICAL MARKET STRUCTURE AND ITS IMPLICATIONS FOR TRADE LIBERALIZATION AND MARKET ACCESS

International Relations/Trade,