288 research outputs found

    Mixed Signal Integrated Circuit Design for Custom Sensor Interfacing

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    Low-power analog integrated circuits (ICs) can be utilized at the interface between an analog sensor and a digital system\u27s input to decrease power consumption, increase system accuracy, perform signal processing, and make the necessary adjustments for compatibility between the two devices. This interfacing has typically been done with custom integrated solutions, but advancements in floating-gate technologies have made reconfigurable analog ICs a competitive option. Whether the solution is a custom design or built from a reconfigurable system, digital peripheral circuits are needed to configure their operation for these analog circuits to work with the best accuracy.;Using an analog IC as a front end signal processor between an analog sensor and wireless sensor mote can greatly decrease battery consumption. Processing in the digital domain requires more power than when done on an analog system. An Analog Signal Processor (ASP) can allow the digital wireless mote to remain in sleep mode while the ASP is always listening for an important event. Once this event occurs, the ASP will wake the wireless mote, allowing it to record the event and send radio transmissions if necessary. As most wireless sensor networks employ the use of batteries as a power source, an energy harvesting system in addition to an ASP can be used to further supplement this battery consumption.;This thesis documents the development of mixed-signal integrated circuits for use as interfaces between analog sensors and digital Wireless Sensor Networks (WSNs). The following work outlines, as well as shows the results, of development for sensor interfacing utilizing both custom mixed signal integrated circuits as well as a Field Programmable Analog Array (FPAA) for post fabrication customization. An Analog Signal Processor (ASP) has been used in an Acoustic Vehicle Classification system. To keep these interfacing methods low power, a prototype energy harvesting system using commercial-off-the-shelf (COTS) devices is detailed which has led to the design of a fully integrated solution

    Realizing a CMOS RF Transceiver for Wireless Sensor Networks

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    ULTRA LOW POWER FSK RECEIVER AND RF ENERGY HARVESTER

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    This thesis focuses on low power receiver design and energy harvesting techniques as methods for intelligently managing energy usage and energy sources. The goal is to build an inexhaustibly powered communication system that can be widely applied, such as through wireless sensor networks (WSNs). Low power circuit design and smart power management are techniques that are often used to extend the lifetime of such mobile devices. Both methods are utilized here to optimize power usage and sources. RF energy is a promising ambient energy source that is widely available in urban areas and which we investigate in detail. A harvester circuit is modeled and analyzed in detail at low power input. Based on the circuit analysis, a design procedure is given for a narrowband energy harvester. The antenna and harvester co-design methodology improves RF to DC energy conversion efficiency. The strategy of co-design of the antenna and the harvester creates opportunities to optimize the system power conversion efficiency. Previous surveys have found that ambient RF energy is spread broadly over the frequency domain; however, here it is demonstrated that it is theoretically impossible to harvest RF energy over a wide frequency band if the ambient RF energy source(s) are weak, owing to the voltage requirements. It is found that most of the ambient RF energy lies in a series of narrow bands. Two different versions of harvesters have been designed, fabricated, and tested. The simulated and measured results demonstrate a dual-band energy harvester that obtains over 9% efficiency for two different bands (900MHz and 1800MHz) at an input power as low as -19dBm. The DC output voltage of this harvester is over 1V, which can be used to recharge the battery to form an inexhaustibly powered communication system. A new phase locked loop based receiver architecture is developed to avoid the significant conversion losses associated with OOK architectures. This also helps to minimize power consumption. A new low power mixer circuit has also been designed, and a detailed analysis is provided. Based on the mixer, a low power phase locked loop (PLL) based receiver has been designed, fabricated and measured. A power management circuit and a low power transceiver system have also been co-designed to provide a system on chip solution. The low power voltage regulator is designed to handle a variety of battery voltage, environmental temperature, and load conditions. The whole system can work with a battery and an application specific integrated circuit (ASIC) as a sensor node of a WSN network

    Integrated Circuits and Systems for Smart Sensory Applications

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    Connected intelligent sensing reshapes our society by empowering people with increasing new ways of mutual interactions. As integration technologies keep their scaling roadmap, the horizon of sensory applications is rapidly widening, thanks to myriad light-weight low-power or, in same cases even self-powered, smart devices with high-connectivity capabilities. CMOS integrated circuits technology is the best candidate to supply the required smartness and to pioneer these emerging sensory systems. As a result, new challenges are arising around the design of these integrated circuits and systems for sensory applications in terms of low-power edge computing, power management strategies, low-range wireless communications, integration with sensing devices. In this Special Issue recent advances in application-specific integrated circuits (ASIC) and systems for smart sensory applications in the following five emerging topics: (I) dedicated short-range communications transceivers; (II) digital smart sensors, (III) implantable neural interfaces, (IV) Power Management Strategies in wireless sensor nodes and (V) neuromorphic hardware

    Low-Power and Programmable Analog Circuitry for Wireless Sensors

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    Embedding networks of secure, wirelessly-connected sensors and actuators will help us to conscientiously manage our local and extended environments. One major challenge for this vision is to create networks of wireless sensor devices that provide maximal knowledge of their environment while using only the energy that is available within that environment. In this work, it is argued that the energy constraints in wireless sensor design are best addressed by incorporating analog signal processors. The low power-consumption of an analog signal processor allows persistent monitoring of multiple sensors while the device\u27s analog-to-digital converter, microcontroller, and transceiver are all in sleep mode. This dissertation describes the development of analog signal processing integrated circuits for wireless sensor networks. Specific technology problems that are addressed include reconfigurable processing architectures for low-power sensing applications, as well as the development of reprogrammable biasing for analog circuits

    Low-Power and Programmable Analog Circuitry for Wireless Sensors

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    Embedding networks of secure, wirelessly-connected sensors and actuators will help us to conscientiously manage our local and extended environments. One major challenge for this vision is to create networks of wireless sensor devices that provide maximal knowledge of their environment while using only the energy that is available within that environment. In this work, it is argued that the energy constraints in wireless sensor design are best addressed by incorporating analog signal processors. The low power-consumption of an analog signal processor allows persistent monitoring of multiple sensors while the device\u27s analog-to-digital converter, microcontroller, and transceiver are all in sleep mode. This dissertation describes the development of analog signal processing integrated circuits for wireless sensor networks. Specific technology problems that are addressed include reconfigurable processing architectures for low-power sensing applications, as well as the development of reprogrammable biasing for analog circuits

    RF Integrated Circuits for Energy Autonomous Sensor Nodes.

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    The exponential growth in the semiconductor industry has enabled computers to pervade our everyday lives, and as we move forward many of these computers will have form factors much smaller than a typical laptop or smartphone. Sensor nodes will soon be deployed ubiquitously, capable of capturing information of their surrounding environment. The next step is to connect all these different nodes together into an entire interconnected system. This “Internet of Things” (IoT) vision has incredible potential to change our lives commercially, societally, and personally. The backbone of IoT is the wireless sensor node, many of which will operate under very rigorous energy constraints with small batteries or no batteries at all. It has been shown that in sensor nodes, radio communication is one of the biggest bottlenecks to ultra-low power design. This research explores ways to reduce energy consumption in radios for wireless sensor networks, allowing them to run off harvested energy, while maintaining qualities that will allow them to function in a real world, multi-user environment. Three different prototypes have been designed demonstrating these techniques. The first is a sensitivity-reduced nanowatt wake-up radio which allows a sensor node to actively listen for packets even when the rest of the node is asleep. CDMA codes and interference rejection reduce the potential for energy-costly false wake-ups. The second prototype is a full transceiver for a body-worn EKG sensor node. This transceiver is designed to have low instantaneous power and is able to receive 802.15.6 Wireless Body Area Network compliant packets. It uses asymmetric communication including a wake-up receiver based on the previous design, UWB transmitter and a communication receiver. The communication receiver has 10 physical channels to avoid interference and demodulates coherent packets which is uncommon for low power radios, but dictated by the 802.15.6 standard. The third prototype is a long range transceiver capable of >1km communication range in the 433MHz band and able to interface with an existing commercial radio. A digitally assisted baseband demodulator was designed which enables the ability to perform bit-level as well as packet-level duty cycling which increases the radio's energy efficiency.PhDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/110432/1/nerobert_1.pd

    Low cost autonomous lock-in amplifier for resistance/capacitance sensor measurements

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    This paper presents the design and experimental characterization of a portable high-precision single-phase lock-in instrument with phase adjustment. The core consists of an analog lock-in amplifier IC prototype, integrated in 0.18 µm CMOS technology with 1.8 V supply, which features programmable gain and operating frequency, resulting in a versatile on-chip solution with power consumption below 834 µW. It incorporates automatic phase alignment of the input and reference signals, performed through both a fixed-90° and a 4-bit digitally programmable phase shifter, specifically designed using commercially available components to operate at 1 kHz frequency. The system is driven by an Arduino YUN board, thus overall conforming a low-cost autonomous signal recovery instrument to determine, in real time, the electrical equivalent of resistive and capacitive sensors with a sensitivity of 16.3 µV/O @ erS < 3 % and 37 kV/F @ erS < 5 %, respectively
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