A low-power, multichannel gated oscillator-based CDR for short-haul applications

We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and methods used to specify block constraints, to design and verify the topology down to the transistor level, as well as to achieve a power consumption as low as 5mW/Gbit/s. Statistical simulation is used to estimate the achievable bit error rate in presence of phase and frequency errors and to prove the feasibility of the concept. VHDL modeling provides extensive verification of the topology. Thermal noise modeling based on well-known concepts delivers design parameters for the device sizing and biasing. We present two practical examples of possible design improvements analyzed and implemented with this methodology

A multichannel 3.5mW/Gbps/channel gated oscillator based CDR in a 0.18µm digital CMOS technology

This article presents a very low-power clock and data recovery (CDR) circuit with 8 parallel channels achieving an aggregate data rate of 20 Gbps. A structural top-down design methodology has been applied to minimize the power dissipation while satisfying the required specifications for short-haul receivers. Implemented in a 0.18µm digital CMOS technology, total power dissipation is 70.2mW or 3.51mW/Gbps/Ch and each channel occupies 0.045µm2 silicon area

Tradeoffs in Design of Low-Power Gated-Oscillator CDR Circuits

This article describes some techniques for implementing low- power clock and data recovery (CDR) circuits based on gated- oscillator (GO) topology for short distance applications. Here, the main tradeoffs in design of a high performance and power-efficient GO CDR are studied and based on that a top-down design methodology is introduced such that the jitter tolerance (JTOL) and frequency tolerance (FTOL) requirements of the system are simultaneously satisfied. A test chip has been implemented in standard digital 0.18 μm CMOS while the proposed CDR circuit consumes only 10.5 mW and occupies 0.045 mm2 silicon area in 2.5 Gbps data bit rate. Measurement results show a good agreement to analyses proofs the capabilities of the proposed approach for implementing low-power GO CDRs

A Power-Efficient Clock and Data Recovery Circuit in 0.18-um CMOS Technology for Multi-Channel Short-Haul Optical Data Communication

This paper studies the specifications of gated-oscillator-based clock and data recovery circuits (GO CDRs) designed for short haul optical data communication systems. Jitter tolerance (JTOL) and frequency tolerance (FTOL) are analyzed and modeled as two main design parameters for the proposed topology to explore the main tradeoffs in design of low-power GO CDRs. Based on this, a top-down design methodology is presented to implement a low-power CDR unit while the JTOL and FTOL requirements of the system are simultaneously satisfied. Using standard digital 0.18 um CMOS technology, an 8-channel CDR system has been realized consuming 4.2 mW/Gbps/channel and occupying a silicon area of 0.045 mm2/channel, with the total aggregate data bit rate of 20 Gbps. The measured FTOL is 3.5% and no error was detected for a 231-1 PRBS (pseudo-random bit stream) input data for 30 minutes meaning that the bit error rate (BER) is smaller than 10-12. Meanwhile, a shared-PLL (phase-locked loop) with a wide tuning-range and compensated loop-gain has been applied to tune the center frequency of all CDR channels on desired frequency

Analysis and modeling of jitter and frequency tolerance in gated oscillator based CDRs

This paper presents an approach for analyzing and modeling of gated-oscillator (GO) -based CDRs and predicting their performance aspects such as jitter tolerance (JTOL) and frequency tolerance (FTOL). It is shown that high JTOL of this topology in addition to its acceptable FTOL and flexible topology, have made it very suitable for short-haul multi-rate applications

Digital signal processing techniques for fiber nonlinearity compensation in coherent optical communication systems

The capacity of long-haul coherent optical communication systems is limited by the detrimental effects of fiber Kerr nonlinearity. The power-dependent nature of the Kerr nonlinearity restricts the maximum launch power into the fiber. That results in the reduction of the optical signal-to-noise ratio at the receiver; thereby, the maximum transmission reach is limited. Over the last few decades, several digital signal processing (DSP) techniques have been proposed to mitigate the effects of fiber nonlinearity, for example, digital back-propagation (DBP), perturbation based nonlinearity compensation (PB-NLC), and phase-conjugated twin wave (PCTW). However, low-complexity and spectrally efficient DSP-based fiber nonlinearity mitigation schemes for long-haul transmission systems are yet to be developed. In this thesis, we focus on the computationally efficient DSP-based techniques that can help to combat various sources of fiber nonlinearity in long-haul coherent optical communication systems. With this aim, we propose a linear time/polarization coded digital phase conjugation (DPC) technique for the mitigation of fiber nonlinearity that doubles the spectral efficiency obtained in the PCTW technique. In addition, we propose to investigate the impact of random polarization effects, like polarization-dependent loss and polarization mode dispersion, on the performance of the linear-coded DPC techniques. We also propose a joint technique that combines single-channel DBP with the PCTW technique. We show that the proposed scheme is computationally efficient and achieves similar performance as multi-channel DBP in wavelength division multiplexed superchannel systems. The regular perturbation (RP) series used to analytically approximate the solution of the nonlinear Schrödinger equation (NLSE) has a serious energy divergence problem when truncated to the first-order. Recent results on the transmission of high data-rate optical signals reveal that the nonlinearity compensation performance of the first-order PB-NLC technique decreases as the product of the transmission distance and launch power increases. The enhanced RP (ERP) method can improve the accuracy of the first-order RP approximation by partially solving the energy divergence problem. On this ground, we propose an ERP-based nonlinearity compensation technique to compensate for the fiber nonlinearity in a polarization-division multiplexed dispersion unmanaged optical communication system. Another possible solution to improve the accuracy of the PB-NLC technique is to increase the order of the RP solution. Based on this idea, we propose to extend the first-order solution of the NLSE to the second-order to improve the nonlinearity compensation performance of the PB-NLC technique. Following that, we investigate a few simplifying assumptions to reduce the implementation complexity of the proposed second-order PB-NLC technique

Optical Switching for Scalable Data Centre Networks

This thesis explores the use of wavelength tuneable transmitters and control systems within the context of scalable, optically switched data centre networks. Modern data centres require innovative networking solutions to meet their growing power, bandwidth, and scalability requirements. Wavelength routed optical burst switching (WROBS) can meet these demands by applying agile wavelength tuneable transmitters at the edge of a passive network fabric. Through experimental investigation of an example WROBS network, the transmitter is shown to determine system performance, and must support ultra-fast switching as well as power efficient transmission. This thesis describes an intelligent optical transmitter capable of wideband sub-nanosecond wavelength switching and low-loss modulation. A regression optimiser is introduced that applies frequency-domain feedback to automatically enable fast tuneable laser reconfiguration. Through simulation and experiment, the optimised laser is shown to support 122×50 GHz channels, switching in less than 10 ns. The laser is deployed as a component within a new wavelength tuneable source (WTS) composed of two time-interleaved tuneable lasers and two semiconductor optical amplifiers. Switching over 6.05 THz is demonstrated, with stable switch times of 547 ps, a record result. The WTS scales well in terms of chip-space and bandwidth, constituting the first demonstration of scalable, sub-nanosecond optical switching. The power efficiency of the intelligent optical transmitter is further improved by introduction of a novel low-loss split-carrier modulator. The design is evaluated using 112 Gb/s/λ intensity modulated, direct-detection signals and a single-ended photodiode receiver. The split-carrier transmitter is shown to achieve hard decision forward error correction ready performance after 2 km of transmission using a laser output power of just 0 dBm; a 5.2 dB improvement over the conventional transmitter. The results achieved in the course of this research allow for ultra-fast, wideband, intelligent optical transmitters that can be applied in the design of all-optical data centres for power efficient, scalable networking