Advances in Bioengineering

The technological approach and the high level of innovation make bioengineering extremely dynamic and this forces researchers to continuous updating. It involves the publication of the results of the latest scientific research. This book covers a wide range of aspects and issues related to advances in bioengineering research with a particular focus on innovative technologies and applications. The book consists of 13 scientific contributions divided in four sections: Materials Science; Biosensors. Electronics and Telemetry; Light Therapy; Computing and Analysis Techniques

Data Conversion Within Energy Constrained Environments

Within scientific research, engineering, and consumer electronics, there is a multitude of new discrete sensor-interfaced devices. Maintaining high accuracy in signal quantization while staying within the strict power-budget of these devices is a very challenging problem. Traditional paths to solving this problem include researching more energy-efficient digital topologies as well as digital scaling.;This work offers an alternative path to lower-energy expenditure in the quantization stage --- content-dependent sampling of a signal. Instead of sampling at a constant rate, this work explores techniques which allow sampling based upon features of the signal itself through the use of application-dependent analog processing. This work presents an asynchronous sampling paradigm, based off the use of floating-gate-enabled analog circuitry. The basis of this work is developed through the mathematical models necessary for asynchronous sampling, as well the SPICE-compatible models necessary for simulating floating-gate enabled analog circuitry. These base techniques and circuitry are then extended to systems and applications utilizing novel analog-to-digital converter topologies capable of leveraging the non-constant sampling rates for significant sample and power savings

Low Power Circuits for Smart Flexible ECG Sensors

Cardiovascular diseases (CVDs) are the world leading cause of death. In-home heart condition monitoring effectively reduced the CVD patient hospitalization rate. Flexible electrocardiogram (ECG) sensor provides an affordable, convenient and comfortable in-home monitoring solution. The three critical building blocks of the ECG sensor i.e., analog frontend (AFE), QRS detector, and cardiac arrhythmia classifier (CAC), are studied in this research. A fully differential difference amplifier (FDDA) based AFE that employs DC-coupled input stage increases the input impedance and improves CMRR. A parasitic capacitor reuse technique is proposed to improve the noise/area efficiency and CMRR. An on-body DC bias scheme is introduced to deal with the input DC offset. Implemented in 0.35m CMOS process with an area of 0.405mm2, the proposed AFE consumes 0.9W at 1.8V and shows excellent noise effective factor of 2.55, and CMRR of 76dB. Experiment shows the proposed AFE not only picks up clean ECG signal with electrodes placed as close as 2cm under both resting and walking conditions, but also obtains the distinct -wave after eye blink from EEG recording. A personalized QRS detection algorithm is proposed to achieve an average positive prediction rate of 99.39% and sensitivity rate of 99.21%. The user-specific template avoids the complicate models and parameters used in existing algorithms while covers most situations for practical applications. The detection is based on the comparison of the correlation coefficient of the user-specific template with the ECG segment under detection. The proposed one-target clustering reduced the required loops. A continuous-in-time discrete-in-amplitude (CTDA) artificial neural network (ANN) based CAC is proposed for the smart ECG sensor. The proposed CAC achieves over 98% classification accuracy for 4 types of beats defined by AAMI (Association for the Advancement of Medical Instrumentation). The CTDA scheme significantly reduces the input sample numbers and simplifies the sample representation to one bit. Thus, the number of arithmetic operations and the ANN structure are greatly simplified. The proposed CAC is verified by FPGA and implemented in 0.18m CMOS process. Simulation results show it can operate at clock frequencies from 10KHz to 50MHz. Average power for the patient with 75bpm heart rate is 13.34W

Resource efficient on-node spike sorting

Current implantable brain-machine interfaces are recording multi-neuron activity by utilising multi-channel, multi-electrode micro-electrodes. With the rapid increase in recording capability has come more stringent constraints on implantable system power consumption and size. This is even more so with the increasing demand for wireless systems to increase the number of channels being monitored whilst overcoming the communication bottleneck (in transmitting raw data) via transcutaneous bio-telemetries. For systems observing unit activity, real-time spike sorting within an implantable device offers a unique solution to this problem. However, achieving such data compression prior to transmission via an on-node spike sorting system has several challenges. The inherent complexity of the spike sorting problem arising from various factors (such as signal variability, local field potentials, background and multi-unit activity) have required computationally intensive algorithms (e.g. PCA, wavelet transform, superparamagnetic clustering). Hence spike sorting systems have traditionally been implemented off-line, usually run on work-stations. Owing to their complexity and not-so-well scalability, these algorithms cannot be simply transformed into a resource efficient hardware. On the contrary, although there have been several attempts in implantable hardware, an implementation to match comparable accuracy to off-line within the required power and area requirements for future BMIs have yet to be proposed. Within this context, this research aims to fill in the gaps in the design towards a resource efficient implantable real-time spike sorter which achieves performance comparable to off-line methods. The research covered in this thesis target: 1) Identifying and quantifying the trade-offs on subsequent signal processing performance and hardware resource utilisation of the parameters associated with analogue-front-end. Following the development of a behavioural model of the analogue-front-end and an optimisation tool, the sensitivity of the spike sorting accuracy to different front-end parameters are quantified. 2) Identifying and quantifying the trade-offs associated with a two-stage hybrid solution to realising real-time on-node spike sorting. Initial part of the work focuses from the perspective of template matching only, while the second part of the work considers these parameters from the point of whole system including detection, sorting, and off-line training (template building). A set of minimum requirements are established which ensure robust, accurate and resource efficient operation. 3) Developing new feature extraction and spike sorting algorithms towards highly scalable systems. Based on waveform dynamics of the observed action potentials, a derivative based feature extraction and a spike sorting algorithm are proposed. These are compared with most commonly used methods of spike sorting under varying noise levels using realistic datasets to confirm their merits. The latter is implemented and demonstrated in real-time through an MCU based platform.Open Acces

Integrated Circuits and Systems for Smart Sensory Applications

Connected intelligent sensing reshapes our society by empowering people with increasing new ways of mutual interactions. As integration technologies keep their scaling roadmap, the horizon of sensory applications is rapidly widening, thanks to myriad light-weight low-power or, in same cases even self-powered, smart devices with high-connectivity capabilities. CMOS integrated circuits technology is the best candidate to supply the required smartness and to pioneer these emerging sensory systems. As a result, new challenges are arising around the design of these integrated circuits and systems for sensory applications in terms of low-power edge computing, power management strategies, low-range wireless communications, integration with sensing devices. In this Special Issue recent advances in application-specific integrated circuits (ASIC) and systems for smart sensory applications in the following five emerging topics: (I) dedicated short-range communications transceivers; (II) digital smart sensors, (III) implantable neural interfaces, (IV) Power Management Strategies in wireless sensor nodes and (V) neuromorphic hardware

Time Synchronization in Multimodal Wireless Cyber-Physical Systems: A Wearable Biopotential Acquisition and Collaborative Brain-Computer Interface Paradigm

Die Forschung zu Brain-Computer Interface (BCI) hat in den letzten drei Jahren riesige Fortschritte gemacht, nicht nur im Bereich der menschlich gesteuerten Roboter, der Steuerung von Prothesen, des Interpretierens von Wörtern, der Kommunikation in einer Virtual Reality Umgebung oder der Computerspiele, sondern auch in der kognitiven Neurologie. Patienten, die unter enormen motorischen Dysfunktionen leiden (letztes Stadium Amyotrophe Lateralsklerose) könnten solch ein BCI System als alternatives Medium zur Kommunikation durch die eigene Gehirnaktivität nutzen. Neuste Studien zeigen, dass die Verwendung dieses BCI Systems in einem Gruppenexperiment helfen kann die menschliche Entscheidungstreffung deutlich zu verbessern. Dies ist ein neues Feld des BCI, nämlich das Collaborative BCI. Einerseits erfordert die Durchführung solch eines Gruppenexperiments drahtlose Hochleistungs-EEG Systeme, basierend auf BCI, welches kostengünstig und tragbar sein sollte und Langzeit-Monitoring hochwertiger EEG Daten sicherstellt. Andererseits ist es erforderlich, eine Zeitsynchronisierung zwischen den einzelnen BCI Systemen einzusetzen, damit diese für ein Gruppenexperiment zum Einsatz kommen können. Diese Herausforderungen setzten die Grundlage dieser Doktorarbeit. In dieser Arbeit wurde ein neuartiges, nicht invasives, modulares, biopotentiales Messsystem entwickelt: Dieses kann Breitband (0.5 Hz–150 Hz) Biopotentiale ableiten, bestehend aus Elektromyographie (EMG), Elektrokardiografie (EKG), Elektroencephalografie (EEG), wurde insgesamt bezeichnet als ExG bzw. das Messsystem als ExG-System benannt. Die Modularität des ExG-Systems erlaubt 8 bis hin zu 256 Kanäle zu konfigurieren, je nach Anforderung, ob in einen textilen Schlauch eingekapselt zur Erfassung von EMG Signalen, in eine textilen Weste zur Erfassung von ECG Signalen oder in eine textilen Kappe zur Erfassung von EEG Signalen. Der Einbau des ExG-Systems in eine Kappe wurde ebenfalls im Rahmen der Arbeit entwickelt. Der letzte Schritt des ExG-Systems zeigt niedriges Eingangsrauschen von 7 µVvon-Spitze-zu-Spitze und benötigt 41 mW/Kanal der Datenaufnahme im aktiven Zustand. Ein WiFi-Modul wurde für eine drahtlose Datenübertragung an einen ferngesteuerten PC in das ExG-System eingebaut. Um mit dem entwickelte System BCI Anwendungen zu ermöglichen, wurde ein akustisch und visuell evozierter Potenzialstimulator (SSVEP/AEP Stimulator) entwickelt. In eben diesem wurde ein Rasperry Pi als Zentralrechner benutzt und ein Bash basiertes Player-Skript iii einprogrammiert, das Mediadaten (Video, Audio, Ton) aus der Angabe einer Lookup Tabelle (LUT) in ihr Linux Betriebssystem spielt. Im Rahmen der Arbeit wurde eine Zeitsynchronisierung an einigen dieser ExG-Systeme mit Hilfe von einer eingebetteten Hardware/Softwarelösung durchgeführt. Die Hardwareteile bestehen aus einigen Leiterplatten, nämlich Sync Modulen mit einem Quarzoszillator, einem Mikrocontroller und einem Funkmodul (Hierbei Bluetooth 4.0). Eines von diesen ist das Sync-Addon, das mit jedem Messsystem (z.B. ExG-System) das zu synchronisieren ist, angeschlossen wird. Das andere bezeichnet man als Sync-Center, das an die Datenverarbeitungsrechner angehängt wird. Das Softwareteil übernimmt den Zeitsynchronisierungsmechanismus mit Hilfe eines funkbasierten Protokolls. Im Rahmen der Arbeit wurde ein neues energieeffizientes pairwise broadcast Zeitsynchronisationsprotokoll (PBS), welches nur theoretisch vorgestellt wurde, experimentell verifiziert. Außerdem wurde es mit anderen bestehenden Zeitsynchronisationsprotokollen auf dem aktuellen Stand der Technik evaluiert, basierend auf den Ergebnissen der gleichen Hardwareebene. In der letzten Iteration der Sync-Module wurde ein durchschnittlicher Synchronisationsfehler von 2 ms, den Konfidenzintervall von 95% berücksichtigend, erlangt. Da für Collaborative BCI, P300, ein Ereignis bezogenes Potenzial mit dem Auslöseimpuls, der 300−500 ms nach dem Vorgang eintritt, eingestellt wurde, ist die erreichte Synchronisationsgenauigkeit genügend, um solch ein Experiment durchzuführen.Brain-computer interface (BCI) has experienced the last three decades tremendous technological advances not only in the field of human controller robotics, or in controlling prosthesis, or in spelling words, or in interacting with a virtual reality environment, or in gaming but also in cognitive neuroscience. Patients suffering from severe motoric dysfunction (e.g. late stage of Amyotrophic Lateral Sclerosis) may utilise such a BCI system as an alternative medium of communication by mental activity. Recently studies have shown that usage of such BCI in a group experiment can help to improve human decision making. This is a new field of BCI, namely collaborative BCI. On one hand, performing such group experiments require wireless, high density EEG system based BCI which should be low-cost, wearable and provide long time monitoring of good quality EEG data. On the other hand time synchronization is required to be established among a group of BCI systems if they are employed for such a group experiments. These drawbacks set the foundation of this thesis work. In this work a novel non-invasive modular biopotential measurement system which can acquire wideband (0.15 Hz–200 Hz) biopotential signals consisting Electromyography (EMG), Electrocardiography (ECG), Electroencephalography (EEG) together called ExG, following ExG-system was designed. The modularity of the ExG-system allows it to be configured from 8 up to 256 channels according to the requirement if it’s to be encapsulated in a textile sleeve for recording of EMG signals, or in a textile vest for recording of ECG signals, or in a textile cap for recording of EEG signals. The assembly of the ExG-system in cap was also developed during the scope of the work. The final iteration of the ExG-system exhibits low input noise of 7 µVpeak-to-peak and require 41 mW/channel of data recording in active state. A WiFi module was embedded into the ExG-system for wireless data transmission to a remote PC. To enable the developed system for BCI applications a steady-state visually/auditory evoked potential stimulator (SSVEP/AEP stimulator) incorporating a Raspberry Pi as a main computer and a bash based player script which plays media data (video, pictures, sound) as defined in a lookup table in the Linux operating system of it. Within the scope of the work time synchronization among a group of such ExG-systems was further realized with the help of an embedded hardware/software solution. The hardware part consists of two different PCB sync modules that are incorporated with a crystal oscillator a microcontroller, a radio module (in this case Bluetooth 4.0). One of them is called the v sync-addon which is to be attached to each of the measurement systems (e.g. ExG-system) that are to be synchronized and the sync-center which is to be attached to the remote PC. On the software part, a wireless time synchronization protocol exchanging timing information among the sync-center and sync-addons must establish tight time synchronization between the ExG-system. Within the framework of this work, a novel time synchronization protocol energy efficient pairwise broadcast synchronization protocol (PBS) that was only theoretically proposed before but not evaluated on real hardware was experimentally evaluated with the developed sync modules. Moreover a benchmarking with other state-of-the-art existing time synchronization protocols based on the results from same hardware platform were drawn. In the final iteration of sync modules an average synchronization error of 2 ms was achieved considering the 95% of confidence interval. Since for collaborative BCI, P300, an event related potential was triggered with the stimuli that occur 300−500 ms after the event, the achieved synchronization accuracy is sufficient to conduct such experiments

Ultra-low power logic in memory with commercial grade memristors and FPGA-based smart-IMPLY architecture

Reducing power consumption in nowadays computer technologies represents an increasingly difficult challenge. Conventional computing architectures suffer from the so-called von Neumann bottleneck (VNB), which consists in the continuous need to exchange data and instructions between the memory and the processing unit, leading to significant and apparently unavoidable power consumption. Even the hardware typically employed to run Artificial Intelligence (AI) algorithms, such as Deep Neural Networks (DNN), suffers from this limitation. A change of paradigm is so needed to comply with the ever-increasing demand for ultra-low power, autonomous, and intelligent systems. From this perspective, emerging memristive non-volatile memories are considered a good candidate to lead this technological transition toward the next-generation hardware platforms, enabling the possibility to store and process information in the same place, therefore bypassing the VNB. To evaluate the state of current public-available devices, in this work commercial-grade packaged Self Directed Channel memristors are thoroughly studied to evaluate their performance in the framework of in-memory computing. Specifically, the operating conditions allowing both analog update of the synaptic weight and stable binary switching are identified, along with the associated issues. To this purpose, a dedicated yet prototypical system based on an FPGA control platform is designed and realized. Then, it is exploited to fully characterize the performance in terms of power consumption of an innovative Smart IMPLY (SIMPLY) Logic-in-Memory (LiM) computing framework that allows reliable in-memory computation of classical Boolean operations. The projection of these results to the nanoseconds regime leads to an estimation of the real potential of this computing paradigm. Although not investigated in this work, the presented platform can also be exploited to test memristor-based SNN and Binarized DNNs (i.e., BNN), that can be combined with LiM to provide the heterogeneous flexible architecture envisioned as the long-term goal for ubiquitous and pervasive AI

Low-frequency local field potentials in primate motor cortex and their application to neural interfaces

PhD ThesisFor patients with spinal cord injury and paralysis, there are currently very limited options for clinical therapy. Brain-machine interfaces (BMIs) are neuroprosthetic devices that are being developed to record from the motor cortex in such patients, bypass the spinal lesion, and use decoded signals to control an effector, such as a prosthetic limb. The ideal BMI would be durable, reliable, totally predictable, fully-implantable, and have generous battery life. Current, state-of-the-art BMIs are limited in all of these domains; partly because the typical signals used—neuronal action potentials, or ‘spikes’—are very susceptible to micro-movement of recording electrodes. Recording spikes from the same neurons over many months is therefore difficult, and decoder behaviour may be unpredictable from day-today. Spikes also need to be digitized at high frequencies (~104 Hz) and heavily processed. As a result, devices are energy-hungry and difficult to miniaturise. Low-frequency local field potentials (lf-LFPs; < 5 Hz) are an alternative cortical signal. They are more stable and can be captured and processed at much lower frequencies (~101 Hz). Here we investigate rhythmical lf-LFP activity, related to the firing of local cortical neurons, during isometric wrist movements in Rhesus macaques. Multichannel spike-related slow potentials (SRSPs) can be used to accurately decode the firing rates of individual motor cortical neurons, and subjects can control a BMI task using this synthetic signal, as if they were controlling the actual firing rate. Lf-LFP–based firing rate estimates are stable over time – even once actual spike recordings have been lost. Furthermore, the dynamics of lf-LFPs are distinctive enough, that an unsupervised approach can be used to train a decoder to extract movement-related features for use in biofeedback BMIs. Novel electrode designs may help us optimise the recording of these signals, and facilitate progress towards a new generation of robust, implantable BMIs for patients.Research Studentship from the MRC, and Andy Jackson’s laboratory (hence this work) is supported by the Wellcome Trust