MMIC-based Low Phase Noise Millimetre-wave Signal Source Design

Wireless technology for future communication systems has been continuously evolving to meet society’s increasing demand on network capacity. The millimetre-wave frequency band has a large amount of bandwidth available, which is a key factor in enabling the capability of carrying higher data rates. However, a challenge with wideband systems is that the capacity of these systems is limited by the noise floor of the local oscillator (LO). The LO in today’s communication systems is traditionally generated at low frequency and subsequently multiplied using frequency multipliers, leading to a significant degradation of the LO noise floor at millimetre-wave frequencies. For this reason, the thesis considers low phase noise millimetre-wave signal source design optimised for future wideband millimetre-wave communications.In an oscillator, low frequency noise (LFN) is up-converted into phase noise around the microwave signal. Thus, aiming for low phase noise oscillator design, LFN characterisations and comparisons of several common III-V transistor technologies, e.g. GaAs-InGaP HBTs, GaAs pHEMTs, and GaN HEMTs, are carried out. It is shown that GaN HEMTs have good potential for oscillator applications where far-carrier phase noise performance is critical, e.g. wideband millimetre-wave communications. Since GaN HEMT is identified as an attractive technology for low noise floor oscillator applications, an in-depth study of some factors which affects LFN characteristics of III-N GaN HEMTs such as surface passivation methods and variations in transistor geometry are also investigated. It is found that the best surface passivation and deposition method can improve the LFN level of GaN HEMT devices significantly, resulting in a lower oscillator phase noise. Several MMIC GaN HEMT based oscillators including X-band Colpitts voltage-controlled-oscillators (VCOs) and Ka-band reflection type oscillators are demonstrated. It is verified that GaN HEMT based oscillators can reach a low noise floor. For instance, X-band GaN HEMT VCOs and a Ka-band GaN HEMT reflection type oscillator with 1 MHz phase noise performance of -135 dBc/Hz and -129 dBc/Hz, respectively, are demonstrated. These results are not only state-of-the-art for GaN HEMT oscillators, but also in-line with the best performance reported for GaAs-InGaP HBT based oscillators. Further, the MMIC oscillator designs are combined with accurate phase noise calculations based on a cyclostationary method and experimental LFN data. It has been seen that the measured and calculated phase noise agree well.The final part of this thesis covers low phase noise millimetre-wave signal source design and a comparison of different architectures and technological approaches. Specifically, a fundamental frequency 220 GHz oscillator is designed in advanced 130 nm InP DHBT process and a D-band signal source is based on the Ka-band GaN HEMT oscillator presented above and followed by a SiGe BiCMOS MMIC including a sixtupler and an amplifier. The Ka-band GaN HEMT oscillator is used to reach the critical low noise floor. The 220 GHz signal source presents an output power around 5 dBm, phase noise of -110 dBc/Hz at 10 MHz offset and a dc-to-RF efficiency in excess of 10% which is the highest number reported in open literature for a fundamental frequency signal source beyond 200 GHz. The D-band signal source, on the other hand, presents an output power of 5 dBm and phase noise of -128 dBc/Hz at 10 MHz offset from a 135 GHz carrier signal. Commenting on the performance of these two different millimetre-wave signal sources, the GaN HEMT/SiGe HBT source presents the best normalized phase noise at 10 MHz, while the integrated InP HBT oscillator demonstrates significantly better conversion efficiency and still a decent phase noise

A 5G mm-wave compact voltage-controlled oscillator in 0.25 µm pHEMT technology

A 5G mm-wave monolithic microwave integrated circuit (MMIC) voltage-controlled oscillator (VCO) is presented in this paper. It is designed on GaAs substrate and with 0.25 µm-pHEMT technology from UMS foundry and it is based on pHEMT varactors in order to achieve a very small chip size. A 0dBm-output power over the entire tuning range from 27.67 GHz to 28.91 GHz, a phase noise of -96.274 dBc/Hz and -116.24 dBc/Hz at 1 and 10 MHz offset frequency from the carrier respectively are obtained on simulation. A power consumption of 111 mW is obtained for a chip size of 0.268 mm2. According to our knowledge, this circuit occupies the smallest surface area compared to pHEMTs oscillators published in the literature

SiGe based multiple-phase VCO operating for mm-wave frequencies

The ever-increasing demand for higher speed in wireless consumer applications has increased the interest in the unlicensed spectrum of 7 GHz around 60 GHz. The high atmospheric oxygen absorption at 60 GHz and small size of the antennas at this frequency requires the use of integrated phased-array systems to overcome the deficiencies of lossy channels at these frequencies. The phased arrays combine signals from multiple paths to obtain higher receiver sensitivity and directivity. The system thus requires phase-shifted voltage-controlled oscillator (VCO) signals to implement phase shifting in the local-oscillator (LO) path. In this research, the vector sum method to generate various phases of the signal at 60 GHz was investigated for its suitability in phased-array systems. The main focus was on improving the phase noise performance of the VCO. The VCO was implemented using a fully differential common-collector Colpitts oscillator in the cascode configuration, which was found to be the VCO configuration with acceptable phase noise performance and stability in the millimetre-wave range. The research focus was on modelling the phase noise of the VCO, and was performed by identifying the impulse sensitivity function for various noise sources, followed by analysing its effect on the linear time varying (LTV) model of the oscillators. The analysis led to a closed-form expression for the phase noise of the oscillator in terms of process and design parameters. The design was then optimised in terms of identified parameters to attain minimum phase noise. The phase noise expression using LTV theory and SpectreRF simulations reported the same optimum value for the design parameter, of around 0.3 for the capacitor ratio. The simulation results utilising the vector sum phase shifting method to generate multiple phase oscillator signals suggest its suitability in implementing phased-array systems in the millimetre-wave range. The vector sum was realised by generating quadrature signals from the oscillator using hybrid couplers. Variable gain amplifiers (VGAs) based on Gilbert mixer topology were used to combine the in-phase and quadrature phase signals to generate the phase-shifted oscillator signal. The gains of the VGAs were linearised by using a pre-distortion circuit, which was an inverse tanh cell. A fully differential 60 GHz VCO was fabricated using a SiGe process with a fT of 200 GHz. The fabricated integrated circuit (IC) measured at the wafer level had a centre frequency of 52.8 GHz and a tuning range of 7 GHz. It demonstrated a phase noise performance of -98.9 dBc/Hz at 1 MHz offset and a power dissipation of 140 mW, thus providing a VCO figure of merit of 172 dBc/Hz. It delivered a differential output power of 8 dBm and the IC occupied an area of 0.54 mm2, including the bondpads. It was thus concluded that a 10 % design margin for the tuning range is required while using SiGe BiCMOS technology. The simulation results demonstrate that the VCO, along with an active interpolator, provides a range of phase-shifted signals from 0° to 360° in steps of 22.5° for various gain settings of the VGAs. The power dissipation of the active interpolator is around 60 mW and the system could thus be employed in LO path shifting architecture of the phased arrays with increased power consumption.Thesis (PhD)--University of Pretoria, 2013.Electrical, Electronic and Computer Engineeringunrestricte

Miniaturized Resonator and Bandpass Filter for Silicon-Based Monolithic Microwave and Millimeter-Wave Integrated Circuits

© 2018 IEEE. © 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.This paper introduces a unique approach for the implementation of a miniaturized on-chip resonator and its application for the first-order bandpass filter (BPF) design. This approach utilizes a combination of a broadside-coupling technique and a split-ring structure. To fully understand the principle behind it, simplified LC equivalent-circuit models are provided. By analyzing these models, guidelines for implementation of an ultra-compact resonator and a BPF are given. To further demonstrate the feasibility of using this approach in practice, both the implemented resonator and the filter are fabricated in a standard 0.13-μm (Bi)-CMOS technology. The measured results show that the resonator can generate a resonance at 66.75 GHz, while the BPF has a center frequency at 40 GHz and an insertion loss of 1.7 dB. The chip size of both the resonator and the BPF, excluding the pads, is only 0.012mm 2 (0.08 × 0.144 mm 2).Peer reviewe

Design and characterization of monolithic millimeter-wave active and passive components, low-noise and power amplifiers, resistive mixers, and radio front-ends

This thesis focuses on the design and characterization of monolithic active and passive components, low-noise and power amplifiers, resistive mixers, and radio front-ends for millimeter-wave applications. The thesis consists of 11 publications and an overview of the research area, which also summarizes the main results of the work. In the design of millimeter-wave active and passive components the main focus is on realized CMOS components and techniques for pushing nanoscale CMOS circuits beyond 100 GHz. Test structures for measuring and analyzing these components are shown. Topologies for a coplanar waveguide, microstrip line, and slow-wave coplanar waveguide that are suitable for implementing transmission lines in nanoscale CMOS are presented. It is demonstrated that the proposed slow-wave coplanar waveguide improves the performance of the transistor-matching networks when compared to a conventional coplanar waveguide and the floating slow-wave shield reduces losses and simplifies modeling when extended below other passives, such as DC decoupling and RF short-circuiting capacitors. Furthermore, wideband spiral transmission line baluns in CMOS at millimeter-wave frequencies are demonstrated. The design of amplifiers and a wideband resistive mixer utilizing the developed components in 65-nm CMOS are shown. A 40-GHz amplifier achieved a +6-dBm 1-dB output compression point and a saturated output power of 9.6 dBm with a miniature chip size of 0.286 mm². The measured noise figure and gain of the 60-GHz amplifier were 5.6 dB and 11.5 dB, respectively. The V-band balanced resistive mixer achieved a 13.5-dB upconversion loss and 34-dB LO-to-RF isolation with a chip area of 0.47 mm². In downconversion, the measured conversion loss and 1-dB input compression point were 12.5 dB and +5 dBm, respectively. The design and experimental results of low-noise and power amplifiers are presented. Two wideband low-noise amplifiers were implemented in a 100-nm metamorphic high electron mobility transistor (HEMT) technology. The amplifiers achieved a 22.5-dB gain and a 3.3-dB noise figure at 94 GHz and a 18-19-dB gain and a 5.5-7.0-dB noise figure from 130 to 154 GHz. A 60-GHz power amplifier implemented in a 150-nm pseudomorphic HEMT technology exhibited a +17-dBm 1-dB output compression point with a 13.4-dB linear gain. In this thesis, the main system-level aspects of millimeter-wave transmitters and receivers are discussed and the experimental circuits of a 60-GHz transmitter front-end and a 60-GHz receiver with an on-chip analog-to-digital converter implemented in 65-nm CMOS are shown. The receiver exhibited a 7-dB noise figure, while the saturated output power of the transmitter front-end was +2 dBm. Furthermore, a wideband W-band transmitter front-end with an output power of +6.6 dBm suitable for both image-rejecting superheterodyne and direct-conversion transmission is demonstrated in 65-nm CMOS

Simulations of III-V NWFET Double-Balanced Gilbert Cells with an Improved Noise Model

III-V nanowire transistors might provide a mean for extending Moore’s law, by overcoming the scaling limitations ultimately facing planar silicon CMOS. These high frequency capable transistors with cut-off frequencies in the terahertz regime are suitable for radio communication. In this project an active double-balanced gilbert cell mixer consisting of nanowire field-effect transistors (NWFETs) was simulated in Cadence Virtuoso using a compact transistor model. The transistor model was extended to take flicker and thermal noise into account, in order to more accurately compare the mixers against state-of-the-art silicon CMOS implementations. The final mixer for 60 GHz showed much greater linearity (0.4 dBm 1 dB compression and 8.5 dBm IIP 3) than previously reported silicon CMOS counterparts. It exhibited a conversion gain of 3.47 dB, a N F DSB of 14.6 dB and a DC power consumption of 8.7 mW.Based on these findings the design requirements for suitable low noise amplifier was discussed

Low Power Analog Processing for Ultra-High-Speed Receivers with RF Correlation

Ultra-high-speed data communication receivers (Rxs) conventionally require analog digital converters (ADC)s with high sampling rates which have design challenges in terms of adequate resolution and power. This leads to ultra-high-speed Rxs utilising expensive and bulky high-speed oscilloscopes which are extremely inefficient for demodulation, in terms of power and size. Designing energy-efficient mixed-signal and baseband units for ultra-high-speed Rxs requires a paradigm approach detailed in this paper that circumvents the use of power-hungry ADCs by employing low-power analog processing. The low-power analog Rx employs direct-demodulation with RF correlation using low-power comparators. The Rx is able to support multiple modulations with highest modulation of 16-QAM reported so far for direct-demodulation with RF correlation. Simulations using Matlab, Simulink R2020a® indicate sufficient symbol-error rate (SER) performance at a symbol rate of 8 GS/s for the 71 GHz Urban Micro Cell and 140 GHz indoor channels. Power analysis undertaken with current analog, hybrid and digital beamforming approaches requiring ADCs indicates considerable power savings. This novel approach can be adopted for ultra-high-speed Rxs envisaged for beyond fifth generation (B5G)/sixth generation (6G)/ terahertz (THz) communication without the power-hungry ADCs, leading to low-power integrated design solutions

A comprehensive survey on antennas on-chip based on metamaterial, metasurface, and substrate integrated waveguide principles for millimeter-waves and terahertz integrated circuits and systems

Antennas on-chip are a particular type of radiating elements valued for their small footprint. They are most commonly integrated in circuit boards to electromagnetically interface free space, which is necessary for wireless communications. Antennas on-chip radiate and receive electromagnetic (EM) energy as any conventional antennas, but what distinguishes them is their miniaturized size. This means they can be integrated inside electronic devices. Although on-chip antennas have a limited range, they are suitable for cell phones, tablet computers, headsets, global positioning system (GPS) devices, and WiFi and WLAN routers. Typically, on-chip antennas are handicapped by narrow bandwidth (less than 10%) and low radiation efficiency. This survey provides an overview of recent techniques and technologies investigated in the literature, to implement high performance on-chip antennas for millimeter-waves (mmWave) and terahertz (THz) integrated-circuit (IC) applications. The technologies discussed here include metamaterial (MTM), metasurface (MTS), and substrate integrated waveguides (SIW). The antenna designs described here are implemented on various substrate layers such as Silicon, Graphene, Polyimide, and GaAs to facilitate integration on ICs. Some of the antennas described here employ innovative excitation mechanisms, for example comprising open-circuited microstrip-line that is electromagnetically coupled to radiating elements through narrow dielectric slots. This excitation mechanism is shown to suppress surface wave propagation and reduce substrate loss. Other techniques described like SIW are shown to significantly attenuate surface waves and minimise loss. Radiation elements based on the MTM and MTS inspired technologies are shown to extend the effective aperture of the antenna without compromising the antenna’s form factor. Moreover, the on-chip antennas designed using the above technologies exhibit significantly improved impedance match, bandwidth, gain and radiation efficiency compared to previously used technologies. These features make such antennas a prime candidate for mmWave and THz on-chip integration. This review provides a thorough reference source for specialist antenna designers.This work was supported in part by the Universidad Carlos III de Madrid and the European Union's Horizon 2020 Research and Innovation Programme under the Marie Sklodowska-Curie Grant 801538, in part by the Icelandic Centre for Research (RANNIS) under Grant 206606, and in part by the National Science Centre of Poland under Grant 2018/31/B/ST7/02369