2,237 research outputs found

    Realization of Resistorless Lossless Positive and Negative Grounded Inductor Simulators Using Single ZC-CCCITA

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    This paper is in continuation with the very recent work of Prasad et al. [14], wherein new realizations of grounded and floating positive inductor simulator using current differencing transconductance amplifier (CDTA) are reported. The focus of the paper is to provide alternate realizations of lossless, both positive and negative inductor simulators (PIS and NIS) in grounded form using z-copy current-controlled current inverting transconductance amplifier (ZC-CCCITA), which can be considered as a derivative of CDTA, wherein the current differencing unit (CDU) is reduced to a current-controlled current inverting unit. We demonstrate that only a single ZC-CCCITA and one grounded capacitor are sufficient to realize grounded lossless PIS or NIS. The proposed circuits are resistorless whose parameters can be controlled through the bias currents. The workability of the proposed PIS is validated by SPICE simulations on three RLC prototypes

    Fault Location in Grid Connected Ungrounded PV Systems Using Wavelets

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    Solar photovoltaic (PV) power has become one of the major sources of renewable energy worldwide. This thesis develops a wavelet-based fault location method for ungrounded PV farms based on pattern recognition of the high frequency transients due to switching frequencies in the system and which does not need any separate devices for fault location. The solar PV farm used for the simulation studies consists of a large number of PV modules connected to grid-connected inverters through ungrounded DC cables. Manufacturers report that about 1% of installed PV panels fail annually. Detecting phase to ground faults in ungrounded underground DC cables is also difficult and time consuming. Therefore, identifying ground faults is a significant problem in ungrounded PV systems because such earth faults do not provide sufficient fault currents for their detection and location during system operation. If such ground faults are not cleared quickly, a subsequent ground fault on the healthy phase will create a complete short-circuit in the system, which will cause a fire hazard and arc-flashing. Locating such faults with commonly used fault locators requires costly external high frequency signal generators, transducers, relays, and communication devices as well as generally longer lead times to find the fault. This thesis work proposes a novel fault location scheme that overcomes the shortcomings of the currently available methods. In this research, high frequency noise patterns are used to identify the fault location in an ungrounded PV farm. This high frequency noise is generated due to the switching transients of converters combined with parasitic capacitance of PV panels and cables. The pattern recognition approach, using discrete wavelet transform (DWT) multi-resolution analysis (MRA) and artificial neural networks (ANN), is utilized to investigate the proposed method for ungrounded grid integrated PV systems. Detailed time domain electromagnetic simulations of PV systems are done in a real-time environment and the results are analyzed to verify the performance of the fault locator. The fault locator uses a wavelet transform-based digital signal processing technique, which uses the high frequency patterns of the mid-point voltage signal of the converters to analyze the ground fault location. The Daubechies 10 (db10) wavelet and scale 11 are chosen as the appropriate mother wavelet function and decomposition level according to the characteristics of the noise waveform to give the proposed method better performance. In this study, norm values of the measured waveform at different frequency bands give unique features at different fault locations and are used as the feature vectors for pattern recognition. Then, the three-layer feed-forward ANN classifier, which can automatically classify the fault locations according to the extracted features, is investigated. The neural network is trained with the Levenberg-Marquardt back-propagation learning algorithm. The proposed fault locating scheme is tested and verified for different types of faults, such as ground and line-line faults at PV modules and cables of the ungrounded PV system. These faults are simulated in a real-time environment with a digital simulator and the data is then analyzed with wavelets in MATLAB. The test results show that the proposed method achieves 99.177% and 97.851% of fault location accuracy for different faults in DC cables and PV modules, respectively. Finally, the effectiveness and feasibility of the designed fault locator in real field applications is tested under varying fault impedance, power outputs, temperature, PV parasitic elements, and switching frequencies of the converters. The results demonstrate the proposed approach has very accurate and robust performance even with noisy measurements and changes in operating conditions

    Novel Current-Mode Sensor Interfacing and Radio Blocks for Cell Culture Monitoring

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    Since 2004 Imperial College has been developing the world’s first application-specific instrumentation aiming at the on-line, in-situ, physiochemical monitoring of adult stem cell cultures. That effort is internationally known as the ‘Intelligent Stem Cell Culture Systems’ (ISCCS) project. The ISCCS platform is formed by the functional integration of biosensors, interfacing electronics and bioreactors. Contrary to the PCB-level ISCCS platform the work presented in this thesis relates to the realization of a miniaturized cell culture monitoring platform. Specifically, this thesis details the synthesis and fabrication of pivotal VLSI circuit blocks suitable for the construction of a miniaturized microelectronic cell monitoring platform. The thesis is composed of two main parts. The first part details the design and operation of a two-stage current-input currentoutput topology suitable for three-electrode amperometric sensor measurements. The first stage is a CMOS-dual rail-class AB-current conveyor providing a low impedancevirtual ground node for a current input. The second stage is a novel hyperbolic-sinebased externally-linear internally-non-linear current amplification stage. This stage bases its operation upon the compressive sinh−1 conversion of the interfaced current to an intermediate auxiliary voltage and the subsequent sinh expansion of the same voltage. The proposed novel topology has been simulated for current-gain values ranging from 10 to 1000 using the parameters of the commercially available 0.8ÎŒm AMS CMOS process. Measured results from a chip fabricated in the same technology are also reported. The proposed interfacing/amplification architecture consumes 0.88-95ÎŒW. The second part describes the design and practical evaluation of a 13.56MHz frequency shift keying (FSK) short-range (5cm) telemetry link suitable for the monitoring of incubated cultures. Prior to the design of the full FSK radio system, a pair of 13.56MHz antennae are characterized experimentally. The experimental S-parameter-value determination of the 13.56MHz wireless link is incorporated into the Cadence Design Framework allowing a high fidelity simulation of the reported FSK radio. The transmitter of the proposed system is a novel multi-tapped seven-stage ring-oscillator-based VCO whereas the core of the receiver is an appropriately modified phase locked loop (PLL). Simulated and measured results from a 0.8ÎŒm CMOS technology chip are reported

    Low power, compact charge coupled device signal processing system

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    A variety of charged coupled devices (CCDs) for performing programmable correlation for preprocessing environmental sensor data preparatory to its transmission to the ground were developed. A total of two separate ICs were developed and a third was evaluated. The first IC was a CCD chirp z transform IC capable of performing a 32 point DFT at frequencies to 1 MHz. All on chip circuitry operated as designed with the exception of the limited dynamic range caused by a fixed pattern noise due to interactions between the digital and analog circuits. The second IC developed was a 64 stage CCD analog/analog correlator for performing time domain correlation. Multiplier errors were found to be less than 1 percent at designed signal levels and less than 0.3 percent at the measured smaller levels. A prototype IC for performing time domain correlation was also evaluated

    Electromagnetic field energy density in artificial microwave materials with negative parameters

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    General relations for the stored reactive field energy density in passive linear artificial microwave materials are established. These relations account for dispersion and absorption effects in these materials, and they are valid also in the regions where the real parts of the material parameters are negative. These relations always give physically sound positive values for the energy density in passive metamaterials. The energy density and field solutions in active metamaterials with non-dispersive negative parameters are also considered. Basic physical limitations on the frequency dispersion of material parameters of artificial passive materials with negative real parts of the effective parameters are discussed. It is shown that field solutions in hypothetical materials with negative and non-dispersive parameters are unstable

    Characterization and compact modeling of printed electrolyte-gated thin film transistors and circuits

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    Die Herstellung konventioneller Elektronik ist ein hochkomplexer Prozess, der hohe Kosten erfordert. In diesem Zusammenhang gewinne die gedruckte Elektronik sowohl in der Wissenschaft als auch in der Industrie eine erhöhte Aufmerksamkeit. Der Hauptgrund dafĂŒr ist die Vereinfachung des Herstellungsprozesses durch additive Drucktechnologien wie Inkjet-Druck. Dies hat Vorteile wie die bedarfsgerechte Herstellung und minimaler Materialverbrauch. Außerdem wird eine vielfĂ€ltige Auswahl verschiedener Substratmaterialien ermöglicht. Im Zentrum der Entwicklung von Schaltungen auf Basis gedruckter Elektronik stehen gedruckte Transistoren. In letzter Zeit sind Metalloxidhalbleiter wie Indiumoxid aufgrund ihrer hohen Ladungsbeweglichkeit zu vielversprechenden Materialien fĂŒr die Herstellung gedruckter elektronischer Bauelemente geworden. DarĂŒber hinaus bietet der Elektrolyt-Gate-Ansatz aufgrund der großen Gate-KapazitĂ€t, die durch die elektrischen Doppelschichten bereitgestellt wird, auch die Vorteile, einen Niederspannungsbetrieb im Sub-1 V-Bereich zu erreichen. Dies eröffnet neue Möglichkeiten fĂŒr die Herstellung gedruckter Bauteile und Schaltungen in Nischenanwendungen. Um das Design und die Herstellung von gedruckten Schaltungen zu erleichtern, ist die Entwicklung kompakter Modelle erforderlich. Die meisten existierenden Arbeiten haben sich bisher auf die Untersuchung des statischen Verhaltens von Transistoren konzentriert. Hierbei wird das dynamische und das Rauschverhalten der Bauteile hĂ€ufig vernachlĂ€ssigt. Ziel dieser Arbeit ist es daher, die umfassende Untersuchung der KapazitĂ€ts sowie Rauscheigenschaften Tintenstrahl-gedruckter DĂŒnnschichttransistoren mit einem flĂŒssig-prozessierbaren Feststoffelektrolyten als Isolator (EGT) und einem Indiumoxid-Halbleiter als Kanalmaterial durchzufĂŒhren.. Es werden geeignete ModellierungsansĂ€tze vorgeschlagen, um das elektrische Verhalten genau zu erfassen. Dies ermöglicht eine erweiterte Analyse analoger, digitaler sowie gemischter analog-digitaler Schaltungen. In dieser Arbeit wird die KapazitĂ€t von EGTs mittels spannungsabhĂ€ngiger Impedanzspektroskopie charakterisiert. Intrinsische und extrinsische Effekte werden durch Verwendung von De-Embedding-Teststrukturen getrennt. Des Weiteren wird ein Ersatzschaltbild erstellt, um genaue Simulationen des gemessenen Frequenzgangs der Gate-Impedanz zu ermöglichen. Auf dieser Grundlage zeigt sich, dass Top-Gate EGTs das Potenzial haben, eine Schaltfrequenz im kHz-Bereich zu erreichen, wenn die Materialien und der Druckprozess weiter optimiert werden. DarĂŒber hinaus wird ein Meyer-Ă€hnliches Modell vorgeschlagen, um die KapazitĂ€ts-Spannungs-Eigenschaften der AnschlusskapazitĂ€t genau zu erfassen. Es werden sowohl parasitĂ€re KapazitĂ€ten als auch nicht-quasistatische Effekte berĂŒcksichtigt. Die resultierenden Modelle ermöglichen weitere AC- und transiente Simulationen komplexer Schaltungen in der EGT-Technologie. Im Folgenden werden Untersuchungen zu den Rauscheigenschaften gedruckter EGTs durchgefĂŒhrt. Das Niederfrequenzrauschen wird anhand eines eigens dafĂŒr optimierten Versuchsaufbaus charakterisiert. Durch Untersuchung der gemessenen Rauschspektren im Transistor-Drainstrom bei verschiedenen Gate-Spannungen wurde die LadungstrĂ€gerschwankung mit korrelierter MobilitĂ€tsschwankung als primĂ€rer Rauschmechanismus bestimmt. Auf dieser Grundlage kann das normalisierte Flachband-Spannungsrauschen als Hauptleistungsmetrik berechnet werden, was im Vergleich zu anderen DĂŒnnschichttechnologien, die auf Dielektrika und Halbleitern wie IZO und IGZO basieren, einen erheblich niedrigeren Wert aufweist.. Ein plausibler Grund könnte die große Gate-KapazitĂ€t sein, die durch die elektrische Doppelschicht erzeugt wird. Daher eigenen sich gedruckte EGTs fĂŒr beispielsweise rauscharme Anwendungen in der Sensorik. Abschließend werden verschiedene Schaltungsdesigns vorgeschlagen, die auf EGT-Technologie basieren. Dies beinhaltet grundlegende digitale Schaltungen wie Inverter Strukturen und Ringoszillatoren. Ihre Leistungsmetriken, einschließlich der Gatterlaufzeit und dem Stromverbrauch, werden ausfĂŒhrlich charakterisiert. Des Weiteren wird das erste Design eines gedruckten BrĂŒckengleichrichters unter Verwendung von EGTs mit eine nahe-null-Volt-Schwellspannung in einer Dioden-Konfiguration vorgestellt. Der vorgestellte Gleichrichter ist in der Lage, Eingangsspannungen mit kleiner Amplitude von circa 100 mV effektiv zu verarbeiten. Dies ist besonders im Anwendungsbereich des Energy-Harvestings von Interesse. ZusĂ€tzlich werden die zuvor etablierten KapazitĂ€tsmodelle auf diesen Schaltungen verifiziert. Ein Vergleich der Simulations- und Messdaten zeigt deren sehr gute Übereinstimmung und verifiziert die entwickelten KapazitĂ€tsmodelle

    Low Power Adaptive Circuits: An Adaptive Log Domain Filter and A Low Power Temperature Insensitive Oscillator Applied in Smart Dust Radio

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    This dissertation focuses on exploring two low power adaptive circuits. One is an adaptive filter at audio frequency for system identification. The other is a temperature insensitive oscillator for low power radio frequency communication. The adaptive filter is presented with integrated learning rules for model reference estimation. The system is a first order low pass filter with two parameters: gain and cut-off frequency. It is implemented using multiple input floating gate transistors to realize online learning of system parameters. Adaptive dynamical system theory is used to derive robust control laws in a system identification task. Simulation results show that convergence is slower using simplified control laws but still occurs within milliseconds. Experimental results confirm that the estimated gain and cut-off frequency track the corresponding parameters of the reference filter. During operation, deterministic errors are introduced by mismatch within the analog circuit implementation. An analysis is presented which attributes the errors to current mirror mismatch. The harmonic distortion of the filter operating in different inversion is analyzed using EKV model numerically. The temperature insensitive oscillator is designed for a low power wireless network. The system is based on a current starved ring oscillator implemented using CMOS transistors instead of LC tank for less chip area and power consumption. The frequency variance with temperature is compensated by the temperature adaptive circuits. Experimental results show that the frequency stability from 5°C to 65°C has been improved 10 times with automatic compensation and at least 1 order less power is consumed than published competitors. This oscillator is applied in a 2.2GHz OOK transmitter and a 2.2GHz phase locked loop based FM receiver. With the increasing needs of compact antenna, possible high data rate and wide unused frequency range of short distance communication, a higher frequency phase locked loop used for BFSK receiver is explored using an LC oscillator for its capability at 20GHz. The success of frequency demodulation is demonstrated in the simulation results that the PLL can lock in 0.5μs with 35MHz lock-in range and 2MHz detection resolution. The model of a phase locked loop used for BFSK receiver is analyzed using Matlab

    Study of a Symmetrical LLC Dual-Active Bridge Resonant Converter Topology for Battery Storage Systems

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    A symmetrical LLC resonant converter topology with a fixed-frequency quasi-triple phase-shift modulation method is proposed for battery-powered electric traction systems with extensions to other battery storage systems. Operation of the converter with these methods yields two unique transfer characteristics and is dependent on the switching frequency. The converter exhibits several desirable features: 1) load-independent buck-boost voltage conversion when operated at the low-impedance resonant frequency, allowing for dc-link voltage regulation, zero-voltage switching across a wide load range, and intrinsic load transient resilience; 2) power flow control when operated outside the low-impedance resonance for integrated battery charging; 3) and simple operational mode selection based on needed functionality with only a single control variable per mode. Derivation of the transfer characteristics for three operation cases using exponential Fourier series coefficients is presented. Pre-design evaluation of the S-LLC converter is presented using these analytical methods and corroborated through simulation. Furthermore, the construction of a rapid-prototyping magnetics design tool developed for high-frequency transformer designs inclusive of leakage inductance, which is leveraged to create the magnetic elements needed for this work. Two 2kW prototypes of the proposed topology are constructed to validate the analysis, with one prototype having a transformer incorporating the series resonant inductance and secondary clamp inductance into the transformer leakage and magnetizing inductance, respectively. A test bench is presented to validate the analysis methods and proposed multi-operational control scheme. Theoretical and experimental results are compared, thus demonstrating the feasibility of the new multi-mode operation scheme of the S-LLC converter topology
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