2,262 research outputs found

    Ultra-Efficient Cascaded Buck-Boost Converter

    Get PDF
    This thesis presents various techniques to achieve ultra-high-efficiency for Cascaded-Buck-Boost converter. A rigorous loss model with component non linearity is developed and validated experimentally. An adaptive-switching-frequency control is discussed to optimize weighted efficiency. Some soft-switching techniques are discussed. A low-profile planar-nanocrystalline inductor is developed and various design aspects of core and copper design are discussed. Finite-element-method is used to examine and visualize the inductor design. By implementing the above, a peak efficiency of over 99.2 % is achieved with a power density of 6 kW/L and a maximum profile height of 7 mm is reported. This converter finds many applications because of its versatility: allowing bidirectional power flow and the ability to step-up or step-down voltages in either direction

    Highly Integrated Dc-dc Converters

    Get PDF
    A monolithically integrated smart rectifier has been presented first in this work. The smart rectifier, which integrates a power MOSFET, gate driver and control circuitry, operates in a self-synchronized fashion based on its drain-source voltage, and does not need external control input. The analysis, simulation, and design considerations are described in detail. A 5V, 5-µm CMOS process was used to fabricate the prototype. Experimental results show that the proposed rectifier functions as expected in the design. Since no dead-time control needs to be used to switch the sync-FET and ctrl-FET, it is expected that the body diode losses can be reduced substantially, compared to the conventional synchronous rectifier. The proposed self-synchronized rectifier (SSR) can be operated at high frequencies and maintains high efficiency over a wide load range. As an example of the smart rectifier\u27s application in isolated DC-DC converter, a synchronous flyback converter with SSR is analyzed, designed and tested. Experimental results show that the operating frequency could be as high as 4MHz and the efficiency could be improved by more than 10% compared to that when a hyper fast diode rectifier is used. Based on a new current-source gate driver scheme, an integrated gate driver for buck converter is also developed in this work by using a 0.35µm CMOS process with optional high voltage (50V) power MOSFET. The integrated gate driver consists both the current-source driver for high-side power MOSFET and low-power driver for low-side power iv MOSFET. Compared with the conventional gate driver circuit, the current-source gate driver can recovery some gate charging energy and reduce switching loss. So the current-source driver (CSD) can be used to improve the efficiency performance in high frequency power converters. This work also presents a new implementation of a power supply in package (PSiP) 5MHz buck converter, which is different from all the prior-of-art PSiP solutions by using a high-Q bondwire inductor. The high-Q bondwire inductor can be manufactured by applying ferrite epoxy to the common bondwire during standard IC packaging process, so the new implementation of PSiP is expected to be a cost-effective way of power supply integration

    Improved Accuracy Area Efficient Hybrid CMOS/GaN DC-DC Buck Converterfor High Step-Down Ratio Applications

    Get PDF
    abstract: Point of Load (POL) DC-DC converters are increasingly used in space applications, data centres, electric vehicles, portable computers and devices and medical electronics. Heavy computing and processing capabilities of the modern devices have ushered the use of higher battery supply voltage to increase power storage. The need to address this consumer experience driven requirement has propelled the evolution of the next generation of small form-factor power converters which can operate with higher step down ratios while supplying heavy continuous load currents without sacrificing efficiency. Constant On-Time (COT) converter topology is capable of achieving stable operation at high conversion ratio with minimum off-chip components and small silicon area. This work proposes a Constant On-Time buck dc-dc converter for a wide dynamic input range and load currents from 100mA to 10A. Accuracy of this ripple based converter is improved by a unique voltage positioning technique which modulates the reference voltage to lower the average ripple profile close to the nominal output. Adaptive On-time block features a transient enhancement scheme to assist in faster voltage droop recovery when the output voltage dips below a defined threshold. UtilizingGallium Nitride (GaN) power switches enable the proposed converter to achieve very high efficiency while using smaller size inductor-capacitor (LC) power-stage. Use of novel Superjunction devices with higher drain-source blocking voltage simplifies the complex driver design and enables faster frequency of operation. It allows 1.8VComplementary Metal-Oxide Semiconductor (CMOS) devices to effectively drive GaNpower FETs which require 5V gate signal swing. The presented controller circuit uses internal ripple generation which reduces reliance on output cap equivalent series resistance (ESR) for loop stability and facilitates ripples reduction at the output. The ripple generation network is designed to provide ai optimally stable performance while maintaining load regulation and line regulation accuracy withing specified margin. The chip with ts external Power FET package is proposed to be integrated on a printed circuit board for testing. The designed power converter is expected to operate under 200 MRad of a total ionising dose of radiation enabling it to function within large hadron collider at CERN and space satellite and probe missions.Dissertation/ThesisMasters Thesis Electrical Engineering 201

    A novel high frequency current-driven synchronous rectifier applicable to most switching topologies

    Get PDF
    A novel current-driven synchronous rectifier is presented in this paper. With the help of current sensing energy recovery circuit, the proposed current-driven synchronous rectifier can operate at high switching frequency with high efficiency. Compared with those voltage-driven synchronous rectification solutions, this current-driven synchronous rectifier has several outstanding characteristics. It can be easily applied to most switching topologies like an ideal diode. Constant gate drive voltage can be obtained regardless of line and load fluctuation. This makes it desirable in high input range application. Converters designed with this synchronous rectifier are also capable of being connected in parallel without taking the risk of reverse power sinking. Principle of operation is given in the paper. A series of experiments verify the analysis and demonstrate the merits.published_or_final_versio

    Analysis And Design Optimization Of Multiphase Converter

    Get PDF
    Future microprocessors pose many challenges to the power conversion techniques. Multiphase synchronous buck converters have been widely used in high current low voltage microprocessor application. Design optimization needs to be carefully carried out with pushing the envelope specification and ever increasing concentration towards power saving features. In this work, attention has been focused on dynamic aspects of multiphase synchronous buck design. The power related issues and optimizations have been comprehensively investigated in this paper. In the first chapter, multiphase DC-DC conversion is presented with background application. Adaptive voltage positioning and various nonlinear control schemes are evaluated. Design optimization are presented to achieve best static efficiency over the entire load range. Power loss analysis from various operation modes and driver IC definition are studied thoroughly to better understand the loss terms and minimize the power loss. Load adaptive control is then proposed together with parametric optimization to achieve optimum efficiency figure. New nonlinear control schemes are proposed to improve the transient response, i.e. load engage and load release responses, of the multiphase VR in low frequency repetitive transient. Drop phase optimization and PWM transition from long tri-state phase are presented to improve the smoothness and robustness of the VR in mode transition. During high frequency repetitive transient, the control loop should be optimized and nonlinear loop should be turned off. Dynamic current sharing are thoroughly studied in chapter 4. The output impedance of the multiphase v synchronous buck are derived to assist the analysis. Beat frequency is studied and mitigated by proposing load frequency detection scheme by turning OFF the nonlinear loop and introducing current protection in the control loop. Dynamic voltage scaling (DVS) is now used in modern Multi-Core processor (MCP) and multiprocessor System-on-Chip (MPSoC) to reduce operational voltage under light load condition. With the aggressive motivation to boost dynamic power efficiency, the design specification of voltage transition (dv/dt) for the DVS is pushing the physical limitation of the multiphase converter design and the component stress as well. In this paper, the operation modes and modes transition during dynamic voltage transition are illustrated. Critical dead-times of driver IC design and system dynamics are first studied and then optimized. The excessive stress on the control MOSFET which increases the reliability concern is captured in boost mode operation. Feasible solutions are also proposed and verified by both simulation and experiment results. CdV/dt compensation for removing the AVP effect and novel nonlinear control scheme for smooth transition are proposed for dealing with fast voltage positioning. Optimum phase number control during dynamic voltage transition is also proposed and triggered by voltage identification (VID) delta to further reduce the dynamic loss. The proposed schemes are experimentally verified in a 200 W six phase synchronous buck converter. Finally, the work is concluded. The references are listed

    Design Optimization Of Llc Topology And Phase Skipping Control Of Three Phase Inverter For Pv Applications

    Get PDF
    The world is heading towards an energy crisis and desperate efforts are being made to find an alternative, reliable and clean source of energy. Solar Energy is one of the most clean and reliable source of renewable energy on earth. Conventionally, extraction of solar power for electricity generation was limited to PV farms, however lately Distributed Generation form of Solar Power has emerged in the form of residential and commercial Grid Tied Micro-Inverters. Grid Tied Micro-Inverters are costly when compared to their string type counterparts because one inverter module is required for every single or every two PV panels whereas a string type micro-inverter utilizes a single inverter module over a string of PV panels. Since in micro-inverter every panel has a dedicated inverter module, more power per panel can be extracted by performing optimal maximum power tracking over single panel rather than over an entire string of panels. Power per panel extracted by string inverters may be lower than its maximum value as few of the panels in the string may or may not be shaded and thereby forming the weaker links of the system. In order to justify the higher costs of Micro-Inverters, it is of utmost importance to convert the available power with maximum possible efficiency. Typically, a microinverter consists of two important blocks; a Front End DC-DC Converter and Output DCAC Inverter. This thesis proposes efficiency optimization techniques for both the blocks of the micro-inverter. iv Efficiency Optimization of Front End DC-DC Converter This thesis aims to optimize the efficiency of the front end stage by proposing optimal design procedure for resonant parameters of LLC Topology as a Front End DC-DC Converter for PV Applications. It exploits the I-V characteristics of a solar panel to design the resonant parameters such that resonant LLC topology operates near its resonant frequency operating point which is the highest efficiency operating point of LLC Converter. Efficiency Optimization of Output DC-AC Inverter Due to continuously variable irradiance levels of solar energy, available power for extraction is constantly varying which causes the PV Inverter operates at its peak load capacity for less than 15% of the day time. Every typical power converter suffers through poor light load efficiency performance because of the load independent losses present in a power converter. In order to improve the light load efficiency performance of Three Phase Inverters, this thesis proposes Phase Skipping Control technique for Three Phase Grid Tied Micro-Inverters. The proposed technique is a generic control technique and can be applied to any inverter topology, however, in order to establish the proof of concept this control technique has been implemented on Three Phase Half Bridge PWM Inverter and its analysis is provided. Improving light load efficiency helps to improve the CEC efficiency of the inverter

    High Frequency Power Converter with ZVT for Variable DC-link in Electric Vehicles

    Get PDF
    abstract: The most important metrics considered for electric vehicles are power density, efficiency, and reliability of the powertrain modules. The powertrain comprises of an Electric Machine (EM), power electronic converters, an Energy Management System (EMS), and an Energy Storage System (ESS). The power electronic converters are used to couple the motor with the battery stack. Including a DC/DC converter in the powertrain module is favored as it adds an additional degree of freedom to achieve flexibility in optimizing the battery module and inverter independently. However, it is essential that the converter is rated for high peak power and can maintain high efficiency while operating over a wide range of load conditions to not compromise on system efficiency. Additionally, the converter must strictly adhere to all automotive standards. Currently, several hard-switching topologies have been employed such as conventional boost DC/DC, interleaved step-up DC/DC, and full-bridge DC/DC converter. These converters face respective limitations in achieving high step-up conversion ratio, size and weight issues, or high component count. In this work, a bi-directional synchronous boost DC/DC converter with easy interleaving capability is proposed with a novel ZVT mechanism. This converter steps up the EV battery voltage of 200V-300V to a wide range of variable output voltages ranging from 310V-800V. High power density and efficiency are achieved through high switching frequency of 250kHz for each phase with effective frequency doubling through interleaving. Also, use of wide bandgap high voltage SiC switches allows high efficiency operation even at high temperatures. Comprehensive analysis, design details and extensive simulation results are presented. Incorporating ZVT branch with adaptive time delay results in converter efficiency close to 98%. Experimental results from a 2.5kW hardware prototype validate the performance of the proposed approach. A peak efficiency of 98.17% has been observed in hardware in the boost or motoring mode.Dissertation/ThesisMasters Thesis Electrical Engineering 201

    Advanced Control Techniques for Efficiency and Power Density Improvement of a Three-Phase Microinverter

    Get PDF
    Inverters are widely used in photovoltaic (PV) based power generation systems. Most of these systems have been based on medium to high power string inverters. Microinverters are gaining popularity over their string inverter counterparts in PV based power generation systems due to maximized energy harvesting, high system reliability, modularity, and simple installation. They can be deployed on commercial buildings, residential rooftops, electric poles, etc and have a huge potential market. Emerging trend in power electronics is to increase power density and efficiency while reducing cost. A powerful tool to achieve these objectives is the development of an advanced control system for power electronics. In low power applications such as solar microinverters, increasing the switching frequency can reduce the size of passive components resulting in higher power density. However, switching losses and electromagnetic interference (EMI) may increase as a consequence of higher switching frequency. Soft switching techniques have been proposed to overcome these issues. This dissertation presents several innovative control techniques which are used to increase efficiency and power density while reducing cost. Dynamic dead time optimization and dual zone modulation techniques have been proposed in this dissertation to significantly improve the microinverter efficiency. In dynamic dead time optimization technique, pulse width modulation (PWM) dead times are dynamically adjusted as a function of load current to minimize MOSFET body diode conduction time which reduces power dissipation. This control method also improves total harmonic distortion (THD) of the inverter output current. To further improve the microinverter efficiency, a dual-zone modulation has been proposed which introduces one more soft-switching transition and lower inductor peak current compared to the other boundary conduction mode (BCM) modulation methods. In addition, an advanced DC link voltage control has been proposed to increase the microinverter power density. This concept minimizes the storage capacitance by allowing greater voltage ripple on the DC link. Therefore, the microinverter reliability can be significantly increased by replacing electrolytic capacitors with film capacitors. These control techniques can be readily implemented on any inverter, motor controller, or switching power amplifier. Since there is no circuit modification involved in implementation of these control techniques and can be easily added to existing controller firmware, it will be very attractive to any potential licensees

    Soft-Switching Techniques of Power Conversion System in Automotive Chargers

    Get PDF
    abstract: This thesis investigates different unidirectional topologies for the on-board charger in an electric vehicle and proposes soft-switching solutions in both the AC/DC and DC/DC stage of the converter with a power rating of 3.3 kW. With an overview on different charger topologies and their applicability with respect to the target specification a soft-switching technique to reduce the switching losses of a single phase boost-type PFC is proposed. This work is followed by a modification to the popular soft-switching topology, the dual active bridge (DAB) converter for application requiring unidirectional power flow. The topology named as the semi-dual active bridge (S-DAB) is obtained by replacing the fully active (four switches) bridge on the load side of a DAB by a semi-active (two switches and two diodes) bridge. The operating principles, waveforms in different intervals and expression for power transfer, which differ significantly from the basic DAB topology, are presented in detail. The zero-voltage switching (ZVS) characteristics and requirements are analyzed in detail and compared to those of DAB. A small-signal model of the new configuration is also derived. The analysis and performance of S-DAB are validated through extensive simulation and experimental results from a hardware prototype. Secondly, a low-loss auxiliary circuit for a power factor correction (PFC) circuit to achieve zero voltage transition is also proposed to improve the efficiency and operating frequency of the converter. The high dynamic energy generated in the switching node during turn-on is diverted by providing a parallel path through an auxiliary inductor and a transistor placed across the main inductor. The paper discusses the operating principles, design, and merits of the proposed scheme with hardware validation on a 3.3 kW/ 500 kHz PFC prototype. Modifications to the proposed zero voltage transition (ZVT) circuit is also investigated by implementing two topological variations. Firstly, an integrated magnetic structure is built combining the main inductor and auxiliary inductor in a single core reducing the total footprint of the circuit board. This improvement also reduces the size of the auxiliary capacitor required in the ZVT operation. The second modification redirects the ZVT energy from the input end to the DC link through additional half-bridge circuit and inductor. The half-bridge operating at constant 50% duty cycle simulates a switching leg of the following DC/DC stage of the converter. A hardware prototype of the above-mentioned PFC and DC/DC stage was developed and the operating principles were verified using the same.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201
    • …
    corecore