Analysis And Simulation Tools For Solar Array Power Systems

This dissertation presents simulation tools developed specifically for the design of solar array power systems. Contributions are made in several aspects of the system design phases, including solar source modeling, system simulation, and controller verification. A tool to automate the study of solar array configurations using general purpose circuit simulators has been developed based on the modeling of individual solar cells. Hierarchical structure of solar cell elements, including semiconductor properties, allows simulation of electrical properties as well as the evaluation of the impact of environmental conditions. A second developed tool provides a co-simulation platform with the capability to verify the performance of an actual digital controller implemented in programmable hardware such as a DSP processor, while the entire solar array including the DC-DC power converter is modeled in software algorithms running on a computer. This virtual plant allows developing and debugging code for the digital controller, and also to improve the control algorithm. One important task in solar arrays is to track the maximum power point on the array in order to maximize the power that can be delivered. Digital controllers implemented with programmable processors are particularly attractive for this task because sophisticated tracking algorithms can be implemented and revised when needed to optimize their performance. The proposed co-simulation tools are thus very valuable in developing and optimizing the control algorithm, before the system is built. Examples that demonstrate the effectiveness of the proposed methodologies are presented. The proposed simulation tools are also valuable in the design of multi-channel arrays. In the specific system that we have designed and tested, the control algorithm is implemented on a single digital signal processor. In each of the channels the maximum power point is tracked individually. In the prototype we built, off-the-shelf commercial DC-DC converters were utilized. At the end, the overall performance of the entire system was evaluated using solar array simulators capable of simulating various I-V characteristics, and also by using an electronic load. Experimental results are presented

Custom Integrated Circuits

Contains reports on nine research projects.Analog Devices, Inc.International Business Machines, Inc.Joint Services Electronics Program (Contract DAALO03-86-K-0002)U.S. Air Force - Office of Scientific Research (Grant AFOSR 86-0164)Rockwell International CorporationOKI SemiconductorU.S. Navy - Office of Naval Research (Contract N00014-81-K-0742)Charles Stark Draper LaboratoryDARPA/U.S. Navy - Office of Naval Research (Contract N00014-80-C-0622)DARPA/U.S. Navy - Office of Naval Research (Contract N00014-87-K-0825)National Science Foundation (Grant ECS-83-10941)AT&T Bell Laboratorie

Modeling and Design of High-Performance DC-DC Converters

The goal of the research that was pursued during this PhD is to eventually facilitate the development of high-performance, fast-switching DC-DC converters. High-switching frequency in switching mode power supplies (SMPS) can be exploited by reducing the output voltage ripple for the same size of passives (mainly inductors and capacitors) and improve overall system performance by providing a voltage supply with less unwanted harmonics to the subsystems that they support. The opposite side of the trade-off is also attractive for designers as the same amount of ripple can be achieved with smaller values of inductance and/or capacitance which can result in a physically smaller and potentially cheaper end product. Another benefit is that the spectrum of the resulting switching noise is shifted to higher frequencies which in turn allows designers to push the corner frequency of the control loop of the system higher without the switching noise affecting the behavior of the system. This in turn, is translated to a system capable of responding faster to strong transients that are common in modern systems that may contain microprocessors or other electronics that tend to consume power in bursts and may even require the use of features like dynamic voltage scaling to minimize the overall consumption of the system. While the analysis of the open loop behavior of a DC-DC converter is relatively straightforward, it is of limited usefulness as they almost always operate in closed loop and therefore can suffer from degraded stability. Therefore, it is important to have a way to simulate their closed loop behavior in the most efficient manner possible. The first chapter is dedicated to a library of technology-agnostic high-level models that can be used to improve the efficiency of transient simulations without sacrificing the ability to model and localize the different losses. This work also focuses further in fixed-frequency converters that employ Peak Current Mode Control (PCM) schemes. PCM schemes are frequently used due to their simple implementation and their ability to respond quickly to line transients since any change of the battery voltage is reflected in the slope of the rising inductor current which in turn is monitored by a fast internal control loop that is closed with the help of a current sensor. Most existing models for current sensors assume that they behave in an ideal manner with infinite bandwidth and ideal constant gain. These assumptions tend to be in significant error as the minimum on-time of the sensor and therefore the settling time requirements of the sensor are reduced. Some sensing architectures, like the ones that approximate the inductor current with the high-side switch current, can be even more complex to analyze as they require the use of extended masking time to prevent spike currents caused by the switch commutation to be injected to the output of the sensor and therefore the signal processing blocks of the control loop. In order to solve this issue, this work also proposes a current sensor model that is compatible with time averaged models of DC-DC converters and is able to predict the effects of static and transient non-idealities of the block on the behavior of a PCM DC-DC converter. Lastly, this work proposes a new 40 V, 6 A, fully-integrated, high-side current sensing circuit with a response time of 51 . The proposed sensor is able to achieve this performance with the help of a feedback resistance emulation technique that prevents the sensor from debiasing during its masking phase which tends to extend the response time of similar fully integrated sensors

34th Midwest Symposium on Circuits and Systems-Final Program

Organized by the Naval Postgraduate School Monterey California. Cosponsored by the IEEE Circuits and Systems Society. Symposium Organizing Committee: General Chairman-Sherif Michael, Technical Program-Roberto Cristi, Publications-Michael Soderstrand, Special Sessions- Charles W. Therrien, Publicity: Jeffrey Burl, Finance: Ralph Hippenstiel, and Local Arrangements: Barbara Cristi

Custom Integrated Circuits

Contains reports on twelve research projects.Analog Devices, Inc.International Business Machines, Inc.Joint Services Electronics Program (Contract DAAL03-86-K-0002)Joint Services Electronics Program (Contract DAAL03-89-C-0001)U.S. Air Force - Office of Scientific Research (Grant AFOSR 86-0164)Rockwell International CorporationOKI Semiconductor, Inc.U.S. Navy - Office of Naval Research (Contract N00014-81-K-0742)Charles Stark Draper LaboratoryNational Science Foundation (Grant MIP 84-07285)National Science Foundation (Grant MIP 87-14969)Battelle LaboratoriesNational Science Foundation (Grant MIP 88-14612)DuPont CorporationDefense Advanced Research Projects Agency/U.S. Navy - Office of Naval Research (Contract N00014-87-K-0825)American Telephone and TelegraphDigital Equipment CorporationNational Science Foundation (Grant MIP-88-58764

Efficient and Robust Simulation, Modeling and Characterization of IC Power Delivery Circuits

As the Moore’s Law continues to drive IC technology, power delivery has become one of the most difficult design challenges. Two of the major components in power delivery are DC-DC converters and power distribution networks, both of which are time-consuming to simulate and characterize using traditional approaches. In this dissertation, we propose a complete set of solutions to efficiently analyze DC-DC converters and power distribution networks by finding a perfect balance between efficiency and accuracy. To tackle the problem, we first present a novel envelope following method based on a numerically robust time-delayed phase condition to track the envelopes of circuit states under a varying switching frequency. By adopting three fast simulation techniques, our proposed method achieves higher speedup without comprising the accuracy of the results. The robustness and efficiency of the proposed method are demonstrated using several DCDC converter and oscillator circuits modeled using the industrial standard BSIM4 transistor models. A significant runtime speedup of up to 30X with respect to the conventional transient analysis is achieved for several DC-DC converters with strong nonlinear switching characteristics. We then take another approach, average modeling, to enhance the efficiency of analyzing DC-DC converters. We proposed a multi-harmonic model that not only predicts the DC response but also captures the harmonics of arbitrary degrees. The proposed full-order model retains the inductor current as a state variable and accurately captures the circuit dynamics even in the transient state. Furthermore, by continuously monitoring state variables, our model seamlessly transitions between continuous conduction mode and discontinuous conduction mode. The proposed model, when tested with a system decoupling technique, obtains up to 10X runtime speedups over transistor-level simulations with a maximum output voltage error that never exceeds 4%. Based on the multi-harmonic averaged model, we further developed the small-signal model that provides a complete characterization of both DC averages and higher-order harmonic responses. The proposed model captures important high-frequency overshoots and undershoots of the converter response, which are otherwise unaccounted for by the existing techniques. In two converter examples, the proposed model corrects the misleading results of the existing models by providing the truthful characterization of the overall converter AC response and offers important guidance for converter design and closed-loop control. To address the problem of time-consuming simulation of power distribution networks, we present a partition-based iterative method by integrating block-Jacobi method with support graph method. The former enjoys the ease of parallelization, however, lacks a direct control of the numerical properties of the produced partitions. In contrast, the latter operates on the maximum spanning tree of the circuit graph, which is optimized for fast numerical convergence, but is bottlenecked by its difficulty of parallelization. In our proposed method, the circuit partitioning is guided by the maximum spanning tree of the underlying circuit graph, offering essential guidance for achieving fast convergence. The resulting block-Jacobi-like preconditioner maximizes the numerical benefit inherited from support graph theory while lending itself to straightforward parallelization as a partitionbased method. The experimental results on IBM power grid suite and synthetic power grid benchmarks show that our proposed method speeds up the DC simulation by up to 11.5X over a state-of-the-art direct solver

Efficient and Robust Simulation, Modeling and Characterization of IC Power Delivery Circuits

As the Moore’s Law continues to drive IC technology, power delivery has become one of the most difficult design challenges. Two of the major components in power delivery are DC-DC converters and power distribution networks, both of which are time-consuming to simulate and characterize using traditional approaches. In this dissertation, we propose a complete set of solutions to efficiently analyze DC-DC converters and power distribution networks by finding a perfect balance between efficiency and accuracy. To tackle the problem, we first present a novel envelope following method based on a numerically robust time-delayed phase condition to track the envelopes of circuit states under a varying switching frequency. By adopting three fast simulation techniques, our proposed method achieves higher speedup without comprising the accuracy of the results. The robustness and efficiency of the proposed method are demonstrated using several DCDC converter and oscillator circuits modeled using the industrial standard BSIM4 transistor models. A significant runtime speedup of up to 30X with respect to the conventional transient analysis is achieved for several DC-DC converters with strong nonlinear switching characteristics. We then take another approach, average modeling, to enhance the efficiency of analyzing DC-DC converters. We proposed a multi-harmonic model that not only predicts the DC response but also captures the harmonics of arbitrary degrees. The proposed full-order model retains the inductor current as a state variable and accurately captures the circuit dynamics even in the transient state. Furthermore, by continuously monitoring state variables, our model seamlessly transitions between continuous conduction mode and discontinuous conduction mode. The proposed model, when tested with a system decoupling technique, obtains up to 10X runtime speedups over transistor-level simulations with a maximum output voltage error that never exceeds 4%. Based on the multi-harmonic averaged model, we further developed the small-signal model that provides a complete characterization of both DC averages and higher-order harmonic responses. The proposed model captures important high-frequency overshoots and undershoots of the converter response, which are otherwise unaccounted for by the existing techniques. In two converter examples, the proposed model corrects the misleading results of the existing models by providing the truthful characterization of the overall converter AC response and offers important guidance for converter design and closed-loop control. To address the problem of time-consuming simulation of power distribution networks, we present a partition-based iterative method by integrating block-Jacobi method with support graph method. The former enjoys the ease of parallelization, however, lacks a direct control of the numerical properties of the produced partitions. In contrast, the latter operates on the maximum spanning tree of the circuit graph, which is optimized for fast numerical convergence, but is bottlenecked by its difficulty of parallelization. In our proposed method, the circuit partitioning is guided by the maximum spanning tree of the underlying circuit graph, offering essential guidance for achieving fast convergence. The resulting block-Jacobi-like preconditioner maximizes the numerical benefit inherited from support graph theory while lending itself to straightforward parallelization as a partitionbased method. The experimental results on IBM power grid suite and synthetic power grid benchmarks show that our proposed method speeds up the DC simulation by up to 11.5X over a state-of-the-art direct solver

Event-Driven Simulation Methodology for Analog/Mixed-Signal Systems

학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2015. 8. 김재하.Recent system-on-chip's (SoCs) are composed of tightly coupled analog and digital components. The resulting mixed-signal systems call for efficient system-level behavioral simulators for fast and systematic verifications. As the system-level verifications rely heavily on digital verification tools, it is desirable to build the mixed-signal simulator based on a digital simulator. However, the existing solutions in digital simulators suffer from a trade-off between simulation speed and accuracy. This work breaks down the trade-off and realizes a fast and accurate analog/mixed-signal behavior simulation in a digital simulator SystemVerilog. The main difference of the proposed methodology from existing ones is its way of representing continuous-time signals. Specifically, a clock signal expresses accurate timing information by carrying an additional real-value time offset, and an analog signal represents its continuous-time waveform in a functional form by employing a set of coefficients. With these signal representations, the proposed method accurately simulates mixed-signal behaviors independently of a simulator's time-step and achieves a purely event-driven simulation without involving any numerical iteration. The speed and accuracy of the proposed methodology are examined for various types of analog/mixed-signal systems. First, timing-sensitive circuits (a phase-locked loops and a clock and data recovery loop) and linear analog circuits (a channel and linear equalizers) are simulated in a high-speed I/O interface example. Second, a switched-linear-behavior simulation is demonstrated through switching power supplies, such as a boost converter and a switched-capacitor converter. Additionally, the proposed method is applied to weakly nonlinear behaviors modeled with a Volterra series for an RF power amplifier and a high-speed I/O linear equalizer. Furthermore, the nonlinear behavior simulation is extended to three different types of injection-locked oscillators exhibiting time-varying nonlinear behaviors. The experimental results show that the proposed simulation methodology achieved tens to hundreds of speed-ups while maintaining the same accuracy as commercial analog simulators.ABSTRACT I CONTENTS III LIST OF FIGURES V LIST OF TABLES XII CHAPTER 1 INTRODUCTION 1 1.1 BACKGROUND 1 1.2 MAIN CONTRIBUTION 6 1.3 THESIS ORGANIZATION 8 CHAPTER 2 EVENT-DRIVEN SIMULATION OF ANALOG/MIXED-SIGNAL BEHAVIORS 9 2.1 PROPOSED CLOCK AND ANALOG SIGNAL REPRESENTATIONS 10 2.2 SIGNAL TYPE DEFINITIONS IN SYSTEMVERILOG 14 2.3 EVENT-DRIVEN SIMULATION METHODOLOGY 16 CHAPTER 3 HIGH-SPEED I/O INTERFACE SIMULATION 21 3.1 CHARGE-PUMP PHASE-LOCKED LOOP 23 3.2 BANGBANG CLOCK AND DATA RECOVERY 37 3.3 CHANNEL AND EQUALIZERS 45 3.4 HIGH-SPEED I/O SYSTEM SIMULATION 52 CHAPTER 4 SWITCHING POWER SUPPLY SIMULATION 55 4.1 BOOST CONVERTER 57 4.2 TIME-INTERLEAVED SWITCHED-CAPACITOR CONVERTER 66 CHAPTER 5 VOLTERRA SERIES MODEL SIMULATION 72 5.1 VOLTERRA SERIES MODEL 74 5.2 CLASS-A POWER AMPLIFIER 79 5.3 CONTINUOUS-TIME EQUALIZER 84 CHAPTER 6 INJECTION-LOCKED OSCILLATOR SIMULATION 89 6.1 PPV-BASED ILO MODEL 91 6.2 LC OSCILLATOR 99 6.3 RING OSCILLATOR 104 6.4 BURST-MODE CLOCK AND DATA RECOVERY 109 CONCLUSION 116 BIBLIOGRAPHY 118 초 록 126Docto

Automated Behavioral Modeling of Switching Voltage Regulators

This work describes the development of a software tool that implements a novel method for automatically generating simulation ready behavioral models for switching circuits with an emphasis on power regulators. The work begins by examining the theory of operation of both linear and switching regulators. Then, the capability of two behavioral modeling languages (Verilog-A and PSPICE ABM) are examined in detail. Next, the languages previously discussed are used to develop and test a model of a commercial regulator (Texas Instruments TPS40305). Finally, the prospect of automating the process is discusse