2,212 research outputs found
Ultra Low-Power Analog Median Filters
The design and implementation of three analog median filter topologies, whose transistors operate in the deep weak-inversion region, is described. The first topology is a differential pairs array, in which drain currents are driven into two nodes in a differential fashion, while the second topology is based on a wide range OTA, which is used to maximize the dynamic range. Finally, the third topology uses three range-extended OTAs. The proposed weak-inversion filters were designed and fabricated in ON Semiconductor 0.5 micrometer technology through MOSIS. Experimental results of three-input fabricated prototypes for all three topologies are show, where power consumptions of 90nW in the first case, and 270nW in the other two cases can be noticed. A dual power supply +/-1.5 Volts were used
In-ADC, Rank-Order Filter for Digital Pixel Sensors
© 2023 The Author(s). Licensee MDPI, Basel, Switzerland. This is an open access article distributed under the terms of the Creative Commons Attribution License (CC BY), https://creativecommons.org/licenses/by/4.0/This paper presents a new implementation of the rank-order filter which is established on 10 a parallel-operated array of single-slope (SS) analogue-to-digital converters (ADCs). The SS ADCs 11 use âon-the-ramp processingâ technique i.e. filtration is performed along with analogue-to-digital 12 conversion, so the final states of the converters represent a filtered image. The proof-of-concept 13 64Ă64 array of SS ADCs, integrated with MOS photogates, was fabricated in a standard 180-nm 14 CMOS process. The measurement results demonstrate the full functionality of the novel filter 15 concept, with image acquisition in both single-sampling and correlated-double-sampling (CDS) 16 modes (the CDS is performed digitally by ADCs). The experimental, massively-parallel rank-order 17 filter can process 650 frames per second with a power consumption of 4.81 mW.Peer reviewe
A multi-view approach to cDNA micro-array analysis
The official published version can be obtained from the link below.Microarray has emerged as a powerful technology that enables biologists to study thousands of genes simultaneously, therefore, to obtain a better understanding of the gene interaction and regulation mechanisms. This paper is concerned with improving the processes involved in the analysis of microarray image data. The main focus is to clarify an image's feature space in an unsupervised manner. In this paper, the Image Transformation Engine (ITE), combined with different filters, is investigated. The proposed methods are applied to a set of real-world cDNA images. The MatCNN toolbox is used during the segmentation process. Quantitative comparisons between different filters are carried out. It is shown that the CLD filter is the best one to be applied with the ITE.This work was supported in part by the Engineering and Physical Sciences Research
Council (EPSRC) of the UK under Grant GR/S27658/01, the National Science Foundation of China under Innovative Grant 70621001, Chinese Academy of Sciences
under Innovative Group Overseas Partnership Grant, the BHP Billiton Cooperation of Australia Grant, the International Science and Technology Cooperation Project of China
under Grant 2009DFA32050 and the Alexander von Humboldt Foundation of Germany
Digital implementation of the cellular sensor-computers
Two different kinds of cellular sensor-processor architectures are used nowadays in various
applications. The first is the traditional sensor-processor architecture, where the sensor and the
processor arrays are mapped into each other. The second is the foveal architecture, in which a
small active fovea is navigating in a large sensor array. This second architecture is introduced
and compared here. Both of these architectures can be implemented with analog and digital
processor arrays. The efficiency of the different implementation types, depending on the used
CMOS technology, is analyzed. It turned out, that the finer the technology is, the better to use
digital implementation rather than analog
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