154 research outputs found

    Design of a Digital Temperature Sensor based on Thermal Diffusivity in a Nanoscale CMOS Technology

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    Temperature sensors are widely used in microprocessors to monitor on-chip temperature gradients and hot-spots, which are known to negatively impact reliability. Such sensors should be small to facilitate floor planning, fast to track millisecond thermal transients, and easy to trim to reduce the associated costs. Recently, it has been shown that thermal diffusivity (TD) sensors can meet these requirements. These sensors operate by digitalizing the temperature-dependent delay associated with the diffusion of heat pulses through an electro-thermal filter (ETF), which, in standard CMOS, can be readily implemented as a resistive heater surrounded by a thermopile. Unlike BJT-based temperature sensors, their accuracy actually improves with CMOS scaling, since it is mainly limited by the accuracy of the heather/thermopile spacing. In this work is presented the electrical design of an highly digital TD sensor in 0.13 µm CMOS with an accuracy better than 1 ºC resolution at with 1 kS/s sampling rate, and which compares favourably to state-of-the-art sensors with similar accuracy and sampling rates [1][2][3][4]. This advance is mainly enabled by the adoption of a highly digital CCO-based phasedomain ΔΣ ADC. The TD sensor presented consists of an ETF, a transconductance stage, a current-controlled oscillator (CCO) and a 6 bit digital counter. In order to be easily ported to nanoscale CMOS technologies, it is proposed to use a sigmadelta modulator based on a CCO as an alternative to traditional modulators. And since 70% of the sensor’s area is occupied by digital circuitry, porting the sensor to latest CMOS technologies process should reduce substantially the occupied die area, and thus reduce significantly the total sensor area

    Low Power Adaptive Circuits: An Adaptive Log Domain Filter and A Low Power Temperature Insensitive Oscillator Applied in Smart Dust Radio

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    This dissertation focuses on exploring two low power adaptive circuits. One is an adaptive filter at audio frequency for system identification. The other is a temperature insensitive oscillator for low power radio frequency communication. The adaptive filter is presented with integrated learning rules for model reference estimation. The system is a first order low pass filter with two parameters: gain and cut-off frequency. It is implemented using multiple input floating gate transistors to realize online learning of system parameters. Adaptive dynamical system theory is used to derive robust control laws in a system identification task. Simulation results show that convergence is slower using simplified control laws but still occurs within milliseconds. Experimental results confirm that the estimated gain and cut-off frequency track the corresponding parameters of the reference filter. During operation, deterministic errors are introduced by mismatch within the analog circuit implementation. An analysis is presented which attributes the errors to current mirror mismatch. The harmonic distortion of the filter operating in different inversion is analyzed using EKV model numerically. The temperature insensitive oscillator is designed for a low power wireless network. The system is based on a current starved ring oscillator implemented using CMOS transistors instead of LC tank for less chip area and power consumption. The frequency variance with temperature is compensated by the temperature adaptive circuits. Experimental results show that the frequency stability from 5°C to 65°C has been improved 10 times with automatic compensation and at least 1 order less power is consumed than published competitors. This oscillator is applied in a 2.2GHz OOK transmitter and a 2.2GHz phase locked loop based FM receiver. With the increasing needs of compact antenna, possible high data rate and wide unused frequency range of short distance communication, a higher frequency phase locked loop used for BFSK receiver is explored using an LC oscillator for its capability at 20GHz. The success of frequency demodulation is demonstrated in the simulation results that the PLL can lock in 0.5μs with 35MHz lock-in range and 2MHz detection resolution. The model of a phase locked loop used for BFSK receiver is analyzed using Matlab

    Two lateral RF MEMS varactors and an experimental switch made using a CMOS-MEMS process

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    An expanding wireless industry creates a demand for smaller and smarter devices, while maintaining the high performance requirements. Todays solutions often use off-chip components to meet these demands, which lead to additional area, cost and parasitic components. RF MEMS can beneficially replace a great number of these components, and in integration with CMOS offer small devices at low cost with on-chip signal processing. One important component in RF systems is the variable capacitor, or varactor. This thesis presents two varactor designs made using a CMOS-MEMS process that enable monolithic integration of MEMS and CMOS. The varactors are electrothermal actuated and based on interdigitated combs moving lateral, parallel to the substrate. A latch mechanism is used so that the varactors only require power when switching. Since the fabricated circuit did not arrive in time for measurements only calculated and simulated results are presented. Bimetal actuator theory is used for theoretical understanding of the actuator and the various design parameters are thoroughly analyzed and discussed. The capacitances of the varactors is in the range of 133-897fF, with tuning ranges of 440% and 489% and Q-factors of ~30 at 2GHz. In addition an experimental lateral DC series switch has been made. The purpose of this switch is to investigate how well defined the sidewalls of this CMOS-MEMS process are to determine if it is possible to obtain a good metal-to-metal connection. This work will be important for future work on CMOS-MEMS switches. All simulations have been done using Coventorware, while the layout of the chip has been made in Cadence. The chip has been fabricated in a 0.25um CMOS process from STMicroelectronics through the broker service Circuit Multi Projects (CMP), France. The post-process has been done at Carnegie Mellon University (CMU), USA and Sintef, Norway

    Current-mode processing based Temperature-to-Digital Converters for MEMS applications

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    This thesis presents novel Temperature-to-Digital Converters (TDCs) designed and fabricated in CMOS technology. These integrated smart temperature sensing circuits are widely employed in the Micro-Electro-Mechanical Systems (MEMS) field in order to mitigate the impact of the ambient temperature on their performance. In this framework, the increasingly stringent demands of the market have led the cost-effectiveness specification of these compensation solutions to an higher and higher level, directly translating into the requirement of more and more compact designs (< 0.1 mm²); in addition to this, considering that the great majority of the systems whose thermal drift needs to be compensated is battery supplied, ultra-low energy-per-conversion (< 10 nJ) is another requirement of primary importance. This thesis provides a detailed description of two different test-chips (mas fuerte and es posible) that have been designed with this orientation and that are the result of three years of research activity; for both devices, the conception, design, layout and testing phases are all described in detail and are supported by simulation and measurement results.This thesis presents novel Temperature-to-Digital Converters (TDCs) designed and fabricated in CMOS technology. These integrated smart temperature sensing circuits are widely employed in the Micro-Electro-Mechanical Systems (MEMS) field in order to mitigate the impact of the ambient temperature on their performance. In this framework, the increasingly stringent demands of the market have led the cost-effectiveness specification of these compensation solutions to an higher and higher level, directly translating into the requirement of more and more compact designs (< 0.1 mm²); in addition to this, considering that the great majority of the systems whose thermal drift needs to be compensated is battery supplied, ultra-low energy-per-conversion (< 10 nJ) is another requirement of primary importance. This thesis provides a detailed description of two different test-chips (mas fuerte and es posible) that have been designed with this orientation and that are the result of three years of research activity; for both devices, the conception, design, layout and testing phases are all described in detail and are supported by simulation and measurement results

    Bolometers

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    Infrared Detectors and technologies are very important for a wide range of applications, not only for Military but also for various civilian applications. Comparatively fast bolometers can provide large quantities of low cost devices opening up a new era in infrared technologies. This book deals with various aspects of bolometer developments. It covers bolometer material aspects, different types of bolometers, performance limitations, applications and future trends. The chapters in this book will be useful for senior researchers as well as beginning graduate students

    BPF-based thermal sensor circuit for on-chip testing of RF circuits

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    A new sensor topology meant to extract figures of merit of radio-frequency analog integrated circuits (RF-ICs) was experimentally validated. Implemented in a standard 0.35 µm complementary metal-oxide-semiconductor (CMOS) technology, it comprised two blocks: a single metaloxide-semiconductor (MOS) transistor acting as temperature transducer, which was placed near the circuit to monitor, and an active band-pass filter amplifier. For validation purposes, the temperature sensor was integrated with a tuned radio-frequency power amplifier (420 MHz) and MOS transistors acting as controllable dissipating devices. First, using the MOS dissipating devices, the performance and limitations of the different blocks that constitute the temperature sensor were characterized. Second, by using the heterodyne technique (applying two nearby tones) to the power amplifier (PA) and connecting the sensor output voltage to a low-cost AC voltmeter, the PA’s output power and its central frequency were monitored. As a result, this topology resulted in a low-cost approach, with high linearity and sensitivity, for RF-IC testing and variability monitoring.This research was funded by Spanish AEI–Agencia Estatal de Investigación–grant number PID2019-103869RB-C33. (X.P.) has also received founds from the Spanish Ministry of Science, Innovation and Universities through Agencia Estatal de Investigación (AEI) (projects: HIPERCELLS, RTI2018-098392B-I00, and “Fiabilidad Inteligente”, PCI2020-112028).Peer ReviewedPostprint (published version

    Design of an Integrated Electrostatic Atomic Force Microscope

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    The need for investigation and characterization of physical, chemical and structural properties of material surfaces at the micro and nano scales led to the invention of Atomic Force Microscopy (AFM) in 1986 as a successor to the well-known Scanning Tunneling Microscopy (STM) to overcome the main shortcoming of STM, which worked only on conducting or semiconducting materials. In fact, the idea of AFM is predicated on the measurement of inter-atomic interaction forces between the molecules of a sharp stylus at the end of a silicon probe and the molecules of a specimen, when the tip comes to close proximity (less than 100100nm) of the sample. It detects the height of the probe hovering above the specimen surface by measuring the tip deflection, or the amplitude and frequency of its vibration. In each case (mode), the interaction forces between the sharp tip and the specimen govern the measured parameter which is detected optically by a laser beam reflected of the probe back side. A piezoelectric actuator drives the probe vibrations and Z-axis motions. Optical detection and piezoelectric actuation contribute significantly to the price and complexity of traditional AFM systems. In this research effort, we use electrostatic actuation and capacitive motion detection of off-shelf AFM probes via electrodes printed on a Printed Circuit Board (PCB), thereby eliminating the optical and piezoelectric components of traditional AFMs, drastically reducing its cost, size and complexity as well as enabling new AFM operating modes. Two configurations for the probe-electrode system were modeled, simulated and demonstrated experimentally. The actuation voltage contains DC and AC components while the actuation frequency is set close to the probe natural frequency. Model and experimental results show that the DC component controls the operating point (static gap between the electrode and the probe) and the AC component controls the sensitivity of the AFM. The detector output current is first amplified using a low-noise transimpedance amplifier. Next, a lock-in amplifier measures the magnitude and phase of the current at the second harmonic of the actuation frequency which is directly related to the tip-sample separation. This detection method overcomes the effect of large parasitic capacitance. It enables us to sketch two-dimensional maps of the current's magnitude or phase representing the specimen's topography. To improve sensitivity, the static distance between the probe\textquoteright s tip and the specimen was set to operate the AFM in intermittent (tapping) mode. A nano-stage was developed for this purpose. It allows us to raster scan the specimen surface. In future work, automatic closed-loop feedback control should be deployed to manage the height of the AFM tip over the specimen. A resonant drive and detection scheme should also be used to miniaturize the footprint of the AFM system to a few centimeters

    Ultra Low Power Circuits for Internet of Things and Deep Learning Accelerator Design with In-Memory Computing

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    Collecting data from environment and converting gathered data into information is the key idea of Internet of Things (IoT). Miniaturized sensing devices enable the idea for many applications including health monitoring, industrial sensing, and so on. Sensing devices typically have small form factor and thus, low battery capacity, but at the same time, require long life time for continuous monitoring and least frequent battery replacement. This thesis introduces three analog circuit design techniques featuring ultra-low power consumption for such requirements: (1) An ultra-low power resistor-less current reference circuit, (2) A 110nW resistive frequency locked on-chip oscillator as a timing reference, (3) A resonant current-mode wireless power receiver and battery charger for implantable systems. Raw data can be efficiently transformed into useful information using deep learning. However deep learning requires tremendous amount of computation by its nature, and thus, an energy efficient deep learning hardware is highly demanded to fully utilize this algorithm in various applications. This thesis also presents a pulse-width based computation concept which utilizes in-memory computing of SRAM.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/144173/1/myungjun_1.pd

    Rf Power Amplifier And Oscillator Design For Reliability And Variability

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    CMOS RF circuit design has been an ever-lasting research field. It gained so much attention since RF circuits have high mobility and wide band efficiency, while CMOS technology has the advantage of low cost and better capability of integration. At the same time, IC circuits never stopped scaling down for the recent many decades. Reliability issues with RF circuits have become more and more severe with device scaling down: reliability effects such as gate oxide break down, hot carrier injection, negative bias temperature instability, have been amplified as the device size shrinks. Process variability issues also become more predominant as the feature size decreases. With these insights provided, reliability and variability evaluations on typical RF circuits and possible compensation techniques are highly desirable. In this work, a class E power amplifier is designed and laid out using TSMC 0.18 µm RF technology and the chip was fabricated. Oxide stress and hot electron tests were carried out at elevated supply voltage, fresh measurement results were compared with different stress conditions after 10 hours. Test results matched very well with mixed mode circuit simulations, proved that hot carrier effects degrades PA performances like output power, power efficiency, etc. Self- heating effects were examined on a class AB power amplifier since PA has high power operations. Device temperature simulation was done both in DC and mixed mode level. Different gate biasing techniques were analyzed and their abilities to compensate output power were compared. A simple gate biasing circuit turned out to be efficient to compensate selfheating effects under different localized heating situations. iv Process variation was studied on a classic Colpitts oscillator using Monte-Carlo simulation. Phase noise was examined since it is a key parameter in oscillator. Phase noise was modeled using analytical equations and supported by good match between MATLAB results and ADS simulation. An adaptive body biasing circuit was proposed to eliminate process variation. Results from probability density function simulation demonstrated its capability to relieve process variation on phase noise. Standard deviation of phase noise with adaptive body bias is much less than the one without compensation. Finally, a robust, adaptive design technique using PLL as on-chip sensor to reduce Process, Voltage, Temperature (P.V.T.) variations and other aging effects on RF PA was evaluated. The frequency and phase of ring oscillator need to be adjusted to follow the frequency and phase of input in PLL no matter how the working condition varies. As a result, the control signal of ring oscillator has to fluctuate according to the working condition, reflecting the P.V.T changes. RF circuits suffer from similar P.V.T. variations. The control signal of PLL is introduced to RF circuits and converted to the adaptive tuning voltage for substrate bias. Simulation results illustrate that the PA output power under different variations is more flat than the one with no compensation. Analytical equations show good support to what has been observed

    MEMS based catheter for endoscopic optical coherence tomography

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