205,918 research outputs found
Consciosusness in Cognitive Architectures. A Principled Analysis of RCS, Soar and ACT-R
This report analyses the aplicability of the principles of consciousness developed in the ASys project to three of the most relevant cognitive architectures. This is done in relation to their aplicability to build integrated control systems and studying their support for general mechanisms of real-time consciousness.\ud
To analyse these architectures the ASys Framework is employed. This is a conceptual framework based on an extension for cognitive autonomous systems of the General Systems Theory (GST).\ud
A general qualitative evaluation criteria for cognitive architectures is established based upon: a) requirements for a cognitive architecture, b) the theoretical framework based on the GST and c) core design principles for integrated cognitive conscious control systems
A nervousness regulator framework for dynamic hybrid control architectures
Dynamic hybrid control architectures are a powerful paradigm that addresses the challenges of achieving both performance optimality and operations reactivity in discrete systems. This approach presents a dynamic mechanism that changes the control solution subject to continuous environment changes. However, these changes might cause nervousness behaviour and the system might fail to reach a stabilized-state. This paper proposes a framework of a nervousness regulator that handles the nervousness behaviour based on the defined nervousness-state. An example of this regulator mechanism is applied to an emulation of a flexible manufacturing system located at the University of Valenciennes. The results show the need for a nervousness mechanism in dynamic hybrid control architectures and explore the idea of setting the regulator mechanism according to the nervousness behaviour state.info:eu-repo/semantics/publishedVersio
On properties of modeling control software for embedded control applications with CSP/CT framework
This PROGRESS project (TES.5224) traces a design framework for implementing embedded real-time software for control applications by exploiting its natural concurrency. The paper illustrates the stage of yielded automation in the process of structuring complex control software architectures, modeling controlled mechatronic systems and designing corresponding control laws, simulating them, generating control code out of simulated control strategy and implementing the software system on a (embedded) computer. The gap between the development of control strategies and the procedures of implementing them on chosen hardware targets is going to be overcome
Aircraft systems architecting: a functional-logical domain perspective
Presented is a novel framework for early systems architecture design. The framework defines data structures and algorithms that enable the systems architect to operate interactively and simultaneously in both the functional and logical domains. A prototype software tool, called AirCADia Architect, was implemented, which allowed the framework to be evaluated by practicing aircraft systems architects. The evaluation confirmed that, on the whole, the approach enables the architects to effectively express their creative ideas when synthesizing new architectures while still retaining control over the process
Concurrent Learning Adaptive Model Predictive Control with Pseudospectral Implementation
This paper presents a control architecture in which a direct adaptive control
technique is used within the model predictive control framework, using the
concurrent learning based approach, to compensate for model uncertainties. At
each time step, the control sequences and the parameter estimates are both used
as the optimization arguments, thereby undermining the need for switching
between the learning phase and the control phase, as is the case with
hybrid-direct-indirect control architectures. The state derivatives are
approximated using pseudospectral methods, which are vastly used for numerical
optimal control problems. Theoretical results and numerical simulation examples
are used to establish the effectiveness of the architecture.Comment: 21 pages, 13 figure
CAN Fieldbus Communication in the CSP-based CT Library
In closed-loop control systems several realworld entities are simultaneously communicated to through a multitude of spatially distributed sensors and actuators. This intrinsic parallelism and complexity motivates implementing control software in the form of concurrent processes deployed on distributed hardware architectures. A CSP based occam-like architecture seems to be the most convenient for such a purpose. Many, often conflicting, requirements make design and implementation of distributed real-time control systems an extremely difficult task. The scope of this paper is limited to achieving safe and real-time communication over a CAN fieldbus for an\ud
existing CSP-based framework
An Analytical Framework for Control Synthesis of Cyber-Physical Systems with Safety Guarantee
Cyber-physical systems (CPS) are required to operate safely under fault and
malicious attacks. The simplex architecture and the recently proposed cyber
resilient architectures, e.g., Byzantine fault tolerant++ (BFT++), provide
safety for CPS under faults and malicious cyber attacks, respectively. However,
these existing architectures make use of different timing parameters and
implementations to provide safety, and are seemingly unrelated. In this paper,
we propose an analytical framework to represent the simplex, BFT++ and other
practical cyber resilient architectures (CRAs). We construct a hybrid system
that models CPS adopting any of these architectures. We derive sufficient
conditions via our proposed framework under which a control policy is
guaranteed to be safe. We present an algorithm to synthesize the control
policy. We validate the proposed framework using a case study on lateral
control of a Boeing 747, and demonstrate that our proposed approach ensures
safety of the system
Tiramisu: A Polyhedral Compiler for Expressing Fast and Portable Code
This paper introduces Tiramisu, a polyhedral framework designed to generate
high performance code for multiple platforms including multicores, GPUs, and
distributed machines. Tiramisu introduces a scheduling language with novel
extensions to explicitly manage the complexities that arise when targeting
these systems. The framework is designed for the areas of image processing,
stencils, linear algebra and deep learning. Tiramisu has two main features: it
relies on a flexible representation based on the polyhedral model and it has a
rich scheduling language allowing fine-grained control of optimizations.
Tiramisu uses a four-level intermediate representation that allows full
separation between the algorithms, loop transformations, data layouts, and
communication. This separation simplifies targeting multiple hardware
architectures with the same algorithm. We evaluate Tiramisu by writing a set of
image processing, deep learning, and linear algebra benchmarks and compare them
with state-of-the-art compilers and hand-tuned libraries. We show that Tiramisu
matches or outperforms existing compilers and libraries on different hardware
architectures, including multicore CPUs, GPUs, and distributed machines.Comment: arXiv admin note: substantial text overlap with arXiv:1803.0041
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