Design, Extraction, and Optimization Tool Flows and Methodologies for Homogeneous and Heterogeneous Multi-Chip 2.5D Systems

Chip and packaging industries are making significant progress in 2.5D design as a result of increasing popularity of their application. In advanced high-density 2.5D packages, package redistribution layers become similar to chip Back-End-of-Line routing layers, and the gap between them scales down with pin density improvement. Chiplet-package interactions become significant and severely affect system performance and reliability. Moreover, 2.5D integration offers opportunities to apply novel design techniques. The traditional die-by-die design approach neither carefully considers these interactions nor fully exploits the cross-boundary design opportunities. This thesis presents chiplet-package cross-boundary design, extraction, analysis, and optimization tool flows and methodologies for high-density 2.5D packaging technologies. A holistic flow is presented that can capture all parasitics from chiplets and the package and improve system performance through iterative optimizations. Several design techniques are demonstrated for agile development and quick turn-around time. To validate the flow in silicon, a chip was taped out and studied in TSMC 65nm technology. As the holistic flow cannot handle heterogeneous technologies, in-context flows are presented. Three different flavors of the in-context flow are presented, which offer trade-offs between scalability and accuracy in heterogeneous 2.5D system designs. Inductance is an inseparable part of a package design. A holistic flow is presented that takes package inductance into account in timing analysis and optimization steps. Custom CAD tools are developed to make these flows compatible with the industry standard tools and the foundry model. To prove the effectiveness of the flows several design cases of an ARM Cortex-M0 are implemented for comparitive study

Real-Time Fault Detection and Diagnosis System for Analog and Mixed-Signal Circuits of Acousto-Magnetic EAS Devices

© 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.The paper discusses fault diagnosis of the electronic circuit board, part of acousto-magnetic electronic article surveillance detection devices. The aim is that the end-user can run the fault diagnosis in real time using a portable FPGA-based platform so as to gain insight into the failures that have occurred.Peer reviewe

Thermal Investigations Of Flip Chip Microelectronic Package With Non-Uniform Power Distribution [TK7874. G614 2004 f rb] [Microfiche 7607].

Arah aliran pempakejan sistem-sistem dan subsistem mikroelektronik adalah kearah pengurangan saiz dan peningkatan prestasi, di mana kedua-duanya menyumbang kepada peningkatan kadar penjanaan haba. The trend in packaging microelectronic systems and subsystems has been to reduce size and increase performance, both of which contribute to increase heat generation

Chiplet Actuary: A Quantitative Cost Model and Multi-Chiplet Architecture Exploration

Multi-chip integration is widely recognized as the extension of Moore's Law. Cost-saving is a frequently mentioned advantage, but previous works rarely present quantitative demonstrations on the cost superiority of multi-chip integration over monolithic SoC. In this paper, we build a quantitative cost model and put forward an analytical method for multi-chip systems based on three typical multi-chip integration technologies to analyze the cost benefits from yield improvement, chiplet and package reuse, and heterogeneity. We re-examine the actual cost of multi-chip systems from various perspectives and show how to reduce the total cost of the VLSI system through appropriate multi-chiplet architecture.Comment: Accepted by and to be presented at DAC 202

Design of LCOS microdisplay backplanes for projection applications

De evolutie van licht emitterende diodes (LED) heeft ervoor gezorgd dat het op dit moment interessant wordt om deze componenten als lichtbron te gebruiken in projectiesystemen. LED’s hebben belangrijke voordelen vergeleken met klassieke booglampen. Ze zijn compact, ze hebben een veel grotere levensduur en ogenblikkelijke schakeltijden, ze werken op lage spanningen, etc. LED’s zijn smalbandig en kunnen een groterekleurenbereik realiseren. Ze hebben momenteel echter een beperkte helderheid. Naast de lichtbron is het type van de lichtklep ook bepalend voor de kwaliteit van een projectiesysteem. Er bestaan verschillende lichtkleptechnologieën waaronder die van de reflectieve LCOS-panelen. Deze lichtkleppen kunnen zeer hoge resoluties hebben en wordenvaak gebruikt in kwalitatieve, professionele projectiesystemen. LED’s zijn echter totaal verschillend van booglampen. Ze hebben een andere vorm, package, stralingspatroon, aansturing, fysische en thermische eigenschappen, etc. Hoewel er een twintigtal optische architecturen bekend zijn voor reflectieve beeldschermen (met een booglamp als lichtbron), zijn ze niet geschikt voor LED-projectoren en moeten nieuwe optische architecturen en een elektronische aansturing ontwikkeld worden. In dit doctoraat werd er hieromtrent onderzoek gedaan. Er werd uiteindelijk een driekleurenprojector (R, G, B) met een efficiënt LED-belichtingssysteem gebouwd met twee LCOS-lichtkleppen. Deze LEDprojector heeft superieure eigenschappen (zeer lange levensduur, beeldkwaliteit, etc.) en een matige lichtopbrengst

High-frequency characterization of embedded components in printed circuit boards

The embedding of electronic components is a three-dimensional packaging technology, where chips are placed inside of the printed circuit board instead of on top. The advantage of this technology is the reduced electronic interconnection length between components. The shorter this connection, the faster the signal transmission can occur. Different high-frequency aspects of chip embedding are investigated within this dissertation: interconnections to the embedded chip, crosstalk between signals on the chip and on the board, and interconnections running on top of or underneath embedded components. The high-frequency behavior of tracks running near embedded components is described using a broadband model for multilayer microstrip transmission lines. The proposed model can be used to predict the characteristic impedance and the loss of the lines. The model is based on two similar approximations that reduce the multilayer substrate to an equivalent single-layer structure. The per-unit-length shunt impedance parameters are derived from the complex effective dielectric constant, which is obtained using a variational method. A complex image approach results in the calculation of a frequency-dependent effective height that can be used to determine the per-unit-length resistance and inductance. A deliberate choice was made for a simple but accurate model that could easily be implemented in current high-frequency circuit simulators. Next to quasi-static electromagnetic simulations, a dedicated test vehicle that allows for the direct extraction of the propagation constant of these multilayer microstrips is manufactured and used to verify the model. The verification of the model using simulation and measurements shows that the proposed model slightly overestimates the loss of the measured multilayer microstrips, but is more accurate than the simulations in predicting the characteristic impedance

Stepwise Design Methodology and Heterogeneous Integration Routine of Air-Cooled SiC Inverter for Electric Vehicle

Carrying on SiC devices, the air-cooled inverter of the electric vehicle (EV) can eliminate the traditional complicated liquid-cooling system in order to obtain a light and compact performance of the powertrain, which is considered as the trend of next-generation EV. However, the air-cooled SiC inverter lacks strategic design methodology and heterogeneous integration routine for critical components. In this article, a stepwise design methodology is proposed for the air-cooled SiC inverter in the power module, dc-link capacitor, and heat sink levels. In the power module level, an electrical-thermal-mechanical multiphysics model is proposed. The multidimension stress distribution principles in a six-in-one SiC power module are demonstrated. An improved power module is presented and confirmed by using the observed multiphysics design principles. In the dc-link capacitor level, ripple modeling of the inverter and capacitor are created. Considering the tradeoffs among ripple voltage, ripple current, and cost, optimal strategies to determine the material and minimize the capacitance of the dc-link capacitor are proposed. In the heat sink level, thermal resistance of air-cooled heat sink is modeled. Structure and material properties of the heat sink are optimally designed by using a comprehensive electro-thermal analysis. Based on the optimal design results, the prototypes of the customized SiC power module and heterogeneously integrated air-cooled inverter are fabricated. Experimental results are presented to demonstrate the feasibility of the designed and manufactured air-cooled SiC inverter.Ministry of Education (MOE)Nanyang Technological UniversityThis work was supported in part by the National Natural Science Foundation of China under Grant 51607016, in part by the National Key Research and Development Program of China under Grant 2017YFB0102303, and in part by the Singapore ACRF Tier 1 Grant RG 85/18. The work of X. Zhang was supported by the NTU Startup Grant (SCOPES)