Design and implementation of fuzzy-based PID controller

Conventional proportional integral derivative (PID) controller is widely used in many industrial applications due to its simplicity in StmctllIe and ease of design. However, it is difficult to achieve .the desired control performance in the presence of unknown nonlinearities, time delays, disturbances as well as changes in system parameters. Consequently several PID models have been suggested so at to alleviate these effects on the performance of the PID controllers. One such method is based on fuzzy logic technique which is considered much more appropri.ate when precise mathematical formulation is infeasible or difficult to achieve. Furthermore, some applications such as semiconductor packaging, computer disk drives, and ultra-precision machining require a fast and high precision processing. Consequently, there is the need to consider digital signal processor (DSI?)- based fuzzy PID for use in such applications. Design and implementation of such technique is proposed in this paper. Results of simulation studies haw demonstrated the feasibility of this controller since: it produces fast response with smooth motion control

Design and implementation of fuzzy-based PID controller

controller is widely used in many industrial applications due to its simplicity in StmctllIe and ease of design. However, it is difficult to achieve .the desired control performance in the presence of unknown nonlinearities, time delays, disturbances as well as changes in system parameters. Consequently several PID models have been suggested so at to alleviate these effects on the performance of the PID controllers. One such method is based on fuzzy logic technique which is considered much more appropri.ate when precise mathematical formulation is infeasible or difficult to achieve. Furthermore, some applications such as semiconductor packaging, computer disk drives, and ultra-precision machining require a fast and high precision processing. Consequently, there is the need to consider digital signal processor (DSI?)- based fuzzy PID for use in such applications. Design and implementation of such technique is proposed in this paper. Results of simulation studies haw demonstrated the feasibility of this controller since: it produces fast response with smooth motion control

AC voltage regulation of a bidirectional high-frequency link converter using a deadbeat controller

This paper presents a digital controller for AC voltage regulation of a bidirectional high-frequency link (BHFL) inverter using Deadbeat control. The proposed controller consists of inner current loop, outer voltage loop and a feed-forward controller, which imposes a gain scheduling effect according to the reference signal to compensate the steady-state error of the system. The main property of the proposed controller is that the current- and the voltage-loop controllers have the same structure, and use the same sampling period. This simplifies the design and implementation processes. To improve the overall performance of the system, additional disturbance decoupling networks are employed. This takes into account the model discretization effect. Therefore, accurate disturbance decoupling can be achieved, and the system robustness towards load variations is increased. To avoid transformer saturation due to low frequency voltage envelopes, an equalized pulse width modulation (PWM) technique has been introduced. The proposed controller has been realized using the DS1104 digital signal processor (DSP) from dSPACE. Its performances have been tested on a one kVA prototype inverter. Experimental results showed that the proposed controller has very fast dynamic and good steady-state responses even under highly nonlinear loads

Fuzzy memoization for floating-point multimedia applications

Instruction memoization is a promising technique to reduce the power consumption and increase the performance of future low-end/mobile multimedia systems. Power and performance efficiency can be improved by reusing instances of an already executed operation. Unfortunately, this technique may not always be worth the effort due to the power consumption and area impact of the tables required to leverage an adequate level of reuse. In this paper, we introduce and evaluate a novel way of understanding multimedia floating-point operations based on the fuzzy computation paradigm: performance and power consumption can be improved at the cost of small precision losses in computation. By exploiting this implicit characteristic of multimedia applications, we propose a new technique called tolerant memoization. This technique expands the capabilities of classic memoization by associating entries with similar inputs to the same output. We evaluate this new technique by measuring the effect of tolerant memoization for floating-point operations in a low-power multimedia processor and discuss the trade-offs between performance and quality of the media outputs. We report energy improvements of 12 percent for a set of key multimedia applications with small LUT of 6 Kbytes, compared to 3 percent obtained using previously proposed techniques.Peer ReviewedPostprint (published version

A basic building block approach to CMOS design of analog neuro/fuzzy systems

Outlines a systematic approach to design fuzzy inference systems using analog integrated circuits in standard CMOS VLSI technologies. The proposed circuit building blocks are arranged in a layered neuro/fuzzy architecture composed of 5 layers: fuzzification, T-norm, normalization, consequent, and output. Inference is performed by using Takagi and Sugeno's (1989) IF-THEN rules, particularly where the rule's output contains only a constant term-a singleton. A simple CMOS circuit with tunable bell-like transfer characteristics is used for the fuzzification. The inputs to this circuit are voltages while the outputs are currents. Circuit blocks proposed for the remaining layers operate in the current-mode domain. Innovative circuits are proposed for the T-norm and normalization layers. The other two layers use current mirrors and KCL. All the proposed circuits emphasize simplicity at the circuit level-a prerequisite to increasing system level complexity and operation speed. A 3-input, 4-rule controller has been designed for demonstration purposes in a 1.6 /spl mu/m CMOS single-poly, double-metal technology. We include measurements from prototypes of the membership function block and detailed HSPICE simulations of the whole controller. These results operation speed in the range of 5 MFLIPS (million fuzzy logic inferences per second) with systematic errors below 1%

To develop an efficient variable speed compressor motor system

This research presents a proposed new method of improving the energy efficiency of a Variable Speed Drive (VSD) for induction motors. The principles of VSD are reviewed with emphasis on the efficiency and power losses associated with the operation of the variable speed compressor motor drive, particularly at low speed operation.The efficiency of induction motor when operated at rated speed and load torque is high. However at low load operation, application of the induction motor at rated flux will cause the iron losses to increase excessively, hence its efficiency will reduce dramatically. To improve this efficiency, it is essential to obtain the flux level that minimizes the total motor losses. This technique is known as an efficiency or energy optimization control method. In practice, typical of the compressor load does not require high dynamic response, therefore improvement of the efficiency optimization control that is proposed in this research is based on scalar control model.In this research, development of a new neural network controller for efficiency optimization control is proposed. The controller is designed to generate both voltage and frequency reference signals imultaneously. To achieve a robust controller from variation of motor parameters, a real-time or on-line learning algorithm based on a second order optimization Levenberg-Marquardt is employed. The simulation of the proposed controller for variable speed compressor is presented. The results obtained clearly show that the efficiency at low speed is significant increased. Besides that the speed of the motor can be maintained. Furthermore, the controller is also robust to the motor parameters variation. The simulation results are also verified by experiment

Multiplexing architecture for mixed-signal CMOS fuzzy controllers

Limited precision imposes limits on the complexity of analogue circuits, and hence fuzzy analogue controllers are usually oriented to fast low-power systems with low-medium complexity. A strategy to preserve most of the advantages of an analogue implementation, while allowing a marked increment in system complexity, is presented.Comisión Interministerial de Ciencia y Tecnología TIC96-1392-C02-0