3,889 research outputs found

    Contactless measurement of electric current using magnetic sensors

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    We review recent advances in magnetic sensors for DC/AC current transducers, especially novel AMR sensors and integrated fluxgates, and we make critical comparison of their properties. Most contactless electric current transducers use magnetic cores to concentrate the flux generated by the measured current and to shield the sensor against external magnetic fields. In order to achieve this, the magnetic core should be massive. We present coreless current transducers which are lightweight, linear and free of hysteresis and remanence. We also show how to suppress their weak point: crosstalk from external currents and magnetic fields

    A review of advances in pixel detectors for experiments with high rate and radiation

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    The Large Hadron Collider (LHC) experiments ATLAS and CMS have established hybrid pixel detectors as the instrument of choice for particle tracking and vertexing in high rate and radiation environments, as they operate close to the LHC interaction points. With the High Luminosity-LHC upgrade now in sight, for which the tracking detectors will be completely replaced, new generations of pixel detectors are being devised. They have to address enormous challenges in terms of data throughput and radiation levels, ionizing and non-ionizing, that harm the sensing and readout parts of pixel detectors alike. Advances in microelectronics and microprocessing technologies now enable large scale detector designs with unprecedented performance in measurement precision (space and time), radiation hard sensors and readout chips, hybridization techniques, lightweight supports, and fully monolithic approaches to meet these challenges. This paper reviews the world-wide effort on these developments.Comment: 84 pages with 46 figures. Review article.For submission to Rep. Prog. Phy

    CMOS Closed-loop Control of MEMS Varactors

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    A closed-loop capacitance sensing and control mix-mode circuit with a dedicated sensor electrode and a proportional-integral controller was designed for MEMS varactors. The control was based on tuning the bias magnitude of the MEMS varactor according to

    DESIGN OF SMART SENSORS FOR DETECTION OF PHYSICAL QUANTITIES

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    Microsystems and integrated smart sensors represent a flourishing business thanks to the manifold benefits of these devices with respect to their respective macroscopic counterparts. Miniaturization to micrometric scale is a turning point to obtain high sensitive and reliable devices with enhanced spatial and temporal resolution. Power consumption compatible with battery operated systems, and reduced cost per device are also pivotal for their success. All these characteristics make investigation on this filed very active nowadays. This thesis work is focused on two main themes: (i) design and development of a single chip smart flow-meter; (ii) design and development of readout interfaces for capacitive micro-electro-mechanical-systems (MEMS) based on capacitance to pulse width modulation conversion. High sensitivity integrated smart sensors for detecting very small flow rates of both gases and liquids aiming to fulfil emerging demands for this kind of devices in the industrial to environmental and medical applications. On the other hand, the prototyping of such sensor is a multidisciplinary activity involving the study of thermal and fluid dynamic phenomenon that have to be considered to obtain a correct design. Design, assisted by finite elements CAD tools, and fabrication of the sensing structures using features of a standard CMOS process is discussed in the first chapter. The packaging of fluidic sensors issue is also illustrated as it has a great importance on the overall sensor performances. The package is charged to allow optimal interaction between fluids and the sensors and protecting the latter from the external environment. As miniaturized structures allows a great spatial resolution, it is extremely challenging to fabricate low cost packages for multiple flow rate measurements on the same chip. As a final point, a compact anemometer prototype, usable for wireless sensor network nodes, is described. The design of the full custom circuitry for signal extraction and conditioning is coped in the second chapter, where insights into the design methods are given for analog basic building blocks such as amplifiers, transconductors, filters, multipliers, current drivers. A big effort has been put to find reusable design guidelines and trade-offs applicable to different design cases. This kind of rational design enabled the implementation of complex and flexible functionalities making the interface circuits able to interact both with on chip sensors and external sensors. In the third chapter, the chip floor-plan designed in the STMicroelectronics BCD6s process of the entire smart flow sensor formed by the sensing structures and the readout electronics is presented. Some preliminary tests are also covered here. Finally design and implementation of very low power interfaces for typical MEMS capacitive sensors (accelerometers, gyroscopes, pressure sensors, angular displacement and chemical species sensors) is discussed. Very original circuital topologies, based on chopper modulation technique, will be illustrated. A prototype, designed within a joint research activity is presented. Measured performances spurred the investigation of new techniques to enhance precision and accuracy capabilities of the interface. A brief introduction to the design of active pixel sensors interface for hybrid CMOS imagers is sketched in the appendix as a preliminary study done during an internship in the CNM-IMB institute of Barcelona

    Digital CMOS ISFET architectures and algorithmic methods for point-of-care diagnostics

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    Over the past decade, the surge of infectious diseases outbreaks across the globe is redefining how healthcare is provided and delivered to patients, with a clear trend towards distributed diagnosis at the Point-of-Care (PoC). In this context, Ion-Sensitive Field Effect Transistors (ISFETs) fabricated on standard CMOS technology have emerged as a promising solution to achieve a precise, deliverable and inexpensive platform that could be deployed worldwide to provide a rapid diagnosis of infectious diseases. This thesis presents advancements for the future of ISFET-based PoC diagnostic platforms, proposing and implementing a set of hardware and software methodologies to overcome its main challenges and enhance its sensing capabilities. The first part of this thesis focuses on novel hardware architectures that enable direct integration with computational capabilities while providing pixel programmability and adaptability required to overcome pressing challenges on ISFET-based PoC platforms. This section explores oscillator-based ISFET architectures, a set of sensing front-ends that encodes the chemical information on the duty cycle of a PWM signal. Two initial architectures are proposed and fabricated in AMS 0.35um, confirming multiple degrees of programmability and potential for multi-sensing. One of these architectures is optimised to create a dual-sensing pixel capable of sensing both temperature and chemical information on the same spatial point while modulating this information simultaneously on a single waveform. This dual-sensing capability, verified in silico using TSMC 0.18um process, is vital for DNA-based diagnosis where protocols such as LAMP or PCR require precise thermal control. The COVID-19 pandemic highlighted the need for a deliverable diagnosis that perform nucleic acid amplification tests at the PoC, requiring minimal footprint by integrating sensing and computational capabilities. In response to this challenge, a paradigm shift is proposed, advocating for integrating all elements of the portable diagnostic platform under a single piece of silicon, realising a ``Diagnosis-on-a-Chip". This approach is enabled by a novel Digital ISFET Pixel that integrates both ADC and memory with sensing elements on each pixel, enhancing its parallelism. Furthermore, this architecture removes the need for external instrumentation or memories and facilitates its integration with computational capabilities on-chip, such as the proposed ARM Cortex M3 system. These computational capabilities need to be complemented with software methods that enable sensing enhancement and new applications using ISFET arrays. The second part of this thesis is devoted to these methods. Leveraging the programmability capabilities available on oscillator-based architectures, various digital signal processing algorithms are implemented to overcome the most urgent ISFET non-idealities, such as trapped charge, drift and chemical noise. These methods enable fast trapped charge cancellation and enhanced dynamic range through real-time drift compensation, achieving over 36 hours of continuous monitoring without pixel saturation. Furthermore, the recent development of data-driven models and software methods open a wide range of opportunities for ISFET sensing and beyond. In the last section of this thesis, two examples of these opportunities are explored: the optimisation of image compression algorithms on chemical images generated by an ultra-high frame-rate ISFET array; and a proposed paradigm shift on surface Electromyography (sEMG) signals, moving from data-harvesting to information-focused sensing. These examples represent an initial step forward on a journey towards a new generation of miniaturised, precise and efficient sensors for PoC diagnostics.Open Acces

    Test beam and simulation studies on High Resistivity CMOS pixel sensors

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    The Compact Linear Collider CLIC is an option for a future electron positron collider at CERN, with a centre of mass energy up to 3 TeV. The demanding physics goals at CLIC require a lightweight silicon vertex detector and a large area silicon tracker and impose challenging requirements on both, in view of a spatial resolution of a few micrometres, a timing resolution of a few nanoseconds and a material budget less than two percent of a radiation length per layer. To reach these requirements different silicon detector technologies are under investigation. Benefiting from the small fill factor design and the resulting low sensor capacitance, as well as from the possibility to implement the readout electronics in the sensor, High Resistivity CMOS sensors are attractive in view of fast timing, low material budget and large area production. In this context, High Resistivity CMOS test chips with pixels of the size of the square of 28 micrometres have been investigated using laboratory and test beam measurements and simulations. The setup used for the measurements allows for detailed studies of the full analogue response for different process variants, pixel layouts and operation conditions. Laboratory measurements show the advantage of the small fill factor design with a low noise down to approximately 20 electrons. Corrections applied during the analysis allow for a further noise reduction down to approximately 10 electrons. Test beam measurements show that the resulting low detection threshold allows for an improvement of the position resolution through charge interpolation, down to approximately 3 micrometres for a pixel size of 28 micrometres. A timing resolution of approximately 6 nanoseconds has been measured that is limited by the test setup. For low thresholds of less than 350 electrons an efficiency larger than 99 percent has been measured. In-pixel resolved measurements have been performed to gain a better understanding of the charge sharing and charge collection for different process variants and operation conditions. An even more detailed access to the technology could be reached with finite element simulations, showing the electric field distributions and the resulting charge propagation within the sensor. The finite element simulations have been further integrated in a simulation chain that has been developed to model the response measured in test beam experiments, including noise and energy fluctuations as well as the digitisation of the charge. The simulated response is in agreement with the test beam measurements and the simulation chain has been applied to predict the spatial resolution for different digitisation parameters. Overall, the performed studies give insights into various High Resistivity CMOS process variants and pixel designs that are relevant for CLIC and other applications
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