Low-Power Energy Efficient Circuit Techniques for Small IoT Systems

Although the improvement in circuit speed has been limited in recent years, there has been increased focus on the internet of things (IoT) as technology scaling has decreased circuit size, power usage and cost. This trend has led to the development of many small sensor systems with affordable costs and diverse functions, offering people convenient connection with and control over their surroundings. This dissertation discusses the major challenges and their solutions in realizing small IoT systems, focusing on non-digital blocks, such as power converters and analog sensing blocks, which have difficulty in following the traditional scaling trends of digital circuits. To accommodate the limited energy storage and harvesting capacity of small IoT systems, this dissertation presents an energy harvester and voltage regulators with low quiescent power and good efficiency in ultra-low power ranges. Switched-capacitor-based converters with wide-range energy-efficient voltage-controlled oscillators assisted by power-efficient self-oscillating voltage doublers and new cascaded converter topologies for more conversion ratio configurability achieve efficient power conversion down to several nanowatts. To further improve the power efficiency of these systems, analog circuits essential to most wireless IoT systems are also discussed and improved. A capacitance-to-digital sensor interface and a clocked comparator design are improved by their digital-like implementation and operation in phase and frequency domain. Thanks to the removal of large passive elements and complex analog blocks, both designs achieve excellent area reduction while maintaining state-of-art energy efficiencies. Finally, a technique for removing dynamic voltage and temperature variations is presented as smaller circuits in advanced technologies are more vulnerable to these variations. A 2-D simultaneous feedback control using an on-chip oven control locks the supply voltage and temperature of a small on-chip domain and protects circuits in this locked domain from external voltage and temperature changes, demonstrating 0.0066 V/V and 0.013 °C/°C sensitivities to external changes. Simple digital implementation of the sensors and most parts of the control loops allows robust operation within wide voltage and temperature ranges.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/138743/1/wanyeong_1.pd

Ultra Low Power Circuits for Internet of Things and Deep Learning Accelerator Design with In-Memory Computing

Collecting data from environment and converting gathered data into information is the key idea of Internet of Things (IoT). Miniaturized sensing devices enable the idea for many applications including health monitoring, industrial sensing, and so on. Sensing devices typically have small form factor and thus, low battery capacity, but at the same time, require long life time for continuous monitoring and least frequent battery replacement. This thesis introduces three analog circuit design techniques featuring ultra-low power consumption for such requirements: (1) An ultra-low power resistor-less current reference circuit, (2) A 110nW resistive frequency locked on-chip oscillator as a timing reference, (3) A resonant current-mode wireless power receiver and battery charger for implantable systems. Raw data can be efficiently transformed into useful information using deep learning. However deep learning requires tremendous amount of computation by its nature, and thus, an energy efficient deep learning hardware is highly demanded to fully utilize this algorithm in various applications. This thesis also presents a pulse-width based computation concept which utilizes in-memory computing of SRAM.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/144173/1/myungjun_1.pd

Energy efficient hybrid computing systems using spin devices

Emerging spin-devices like magnetic tunnel junctions (MTJ\u27s), spin-valves and domain wall magnets (DWM) have opened new avenues for spin-based logic design. This work explored potential computing applications which can exploit such devices for higher energy-efficiency and performance. The proposed applications involve hybrid design schemes, where charge-based devices supplement the spin-devices, to gain large benefits at the system level. As an example, lateral spin valves (LSV) involve switching of nanomagnets using spin-polarized current injection through a metallic channel such as Cu. Such spin-torque based devices possess several interesting properties that can be exploited for ultra-low power computation. Analog characteristic of spin current facilitate non-Boolean computation like majority evaluation that can be used to model a neuron. The magneto-metallic neurons can operate at ultra-low terminal voltage of ∼20mV, thereby resulting in small computation power. Moreover, since nano-magnets inherently act as memory elements, these devices can facilitate integration of logic and memory in interesting ways. The spin based neurons can be integrated with CMOS and other emerging devices leading to different classes of neuromorphic/non-Von-Neumann architectures. The spin-based designs involve `mixed-mode\u27 processing and hence can provide very compact and ultra-low energy solutions for complex computation blocks, both digital as well as analog. Such low-power, hybrid designs can be suitable for various data processing applications like cognitive computing, associative memory, and currentmode on-chip global interconnects. Simulation results for these applications based on device-circuit co-simulation framework predict more than ∼100x improvement in computation energy as compared to state of the art CMOS design, for optimal spin-device parameters

Circuit Design Techniques For Wideband Phased Arrays

University of Minnesota Ph.D. dissertation.June 2015. Major: Electrical Engineering. Advisor: Ramesh Harjani. 1 computer file (PDF); xii, 143 pages.This dissertation focuses on beam steering in wideband phased arrays and phase noise modeling in injection locked oscillators. Two different solutions, one in frequency and one in time, have been proposed to minimize beam squinting in phased arrays. Additionally, a differential current reuse frequency doubler for area and power savings has been proposed. Silicon measurement results are provided for the frequency domain solution (IBM 65nm RF CMOS), injection locked oscillator model verification (IBM 130nm RF-CMOS) and frequency doubler (IBM 65nm RF CMOS), while post extraction simulation results are provided for the time domain phased array solution (the chip is currently under fabrication, TSMC 65nm RF CMOS). In the frequency domain solution, a 4-point passive analog FFT based frequency tunable filter is used to channelize an incoming wideband signal into multiple narrowband signals, which are then processed through independent phase shifters. A two channel prototype has been developed at 8GHz RF frequency. Three discrete phase shifts (0 & +/- 90 degrees) are implemented through differential I-Q swapping with appropriate polarity. A minimum null-depth of 19dB while a maximum null-depth of 27dB is measured. In the time domain solution, a discrete time approach is undertaken with signals getting sampled in order of their arrival times. A two-channel prototype for a 2GHz instantaneous RF bandwidth (7GHz-9GHz) has been designed. A QVCO generates quadrature LO signals at 8GHz which are phase shifted through a 5-bit (2 extra bits from differential I-Q swapping with appropriate polarity) cartesian combiner. Baseband sampling clocks are generated from phase shifted LOs through a CMOS divide by 4 with independent resets. The design achieves an average time delay of 4.53ps with 31.5mW of power consumption (per channel, buffers excluded). An injection locked oscillator has been analyzed in s-domain using Paciorek's time domain transient equations. The simplified analysis leads to a phase noise model identical to that of a type-I PLL. The model is equally applicable to injection locked dividers and multipliers and has been extended to cover all injection locking scenarios. The model has been verified against a discrete 57MHz Colpitt's ILO, a 6.5GHz ILFD and a 24GHz ILFM with excellent matching between the model and measurements. Additionally, a differential current reuse frequency doubler, for frequency outputs between 7GHz to 14GHz, design has been developed to reduce passive area and dc power dissipation. A 3-bit capacitive tuning along with a tail current source is used to better conversion efficiency. The doubler shows FOM$_{T}$ values between 191dBc/Hz to 209dBc/Hz when driven by a 0.7GHz to 5.8GHz wide tuning VCO with a phase noise that ranges from -114dBc/Hz to -112dBc/Hz over the same bandwidth

Ultra-Low-Power Sensors and Receivers for IoT Applications

The combination of ultra-low power analog front-ends and CMOS-compatible transducers enable new applications, such as environmental monitors, household appliances, health trackers, etc. that are seamlessly integrated into our daily lives. Furthermore, wireless connectivity allows many of these sensors to operate both independently and collectively. These techniques collectively fulfil the recent surge of internet-of-things (IoT) applications that have the potential to fundamentally change daily life for millions of people.In this dissertation, the circuit and system design of wireless receivers and sensors is presented that explores the challenges of implementing long lifespan, high accuracy, and large coverage range IoT sensor networks. The first is a wake-up receiver (WuRX), which continuously monitors the RF environment to wake up a higher-power radio upon detection of a predetermined RF signature. This work both improves sensitivity and reduces power over prior art through a multi-faceted design featuring an impedance transformation network with large passive voltage gain, an active envelope detector with high input impedance to facilitate large passive voltage gain, a low-power precision comparator, and a low-leakage digital baseband correlator.Although pushing the prior WuRX performance boundary by orders of magnitude, the first work shows moderate sensitivity, inferior temperature robustness, and large area with external lumped components. Thus, the second work shows a miniaturized WuRX that is temperature-compensated, yet still consumes only nano-watt power and millimeter area while operating at 9 GHz. To further reduce the area, a global common-mode feedback is utilized across the envelope detector and baseband amplifier that eliminates the need for off-chip ac-coupling components. Multiple temperature-compensation techniques are proposed to maintain constant bandwidth of the signal path and constant clock frequency. Both WuRXs operate at 0.4 V supply, consume near-zero power and achieve ~-70 dBm sensitivity.Lastly, the first reported CMOS 2-in-1 relative humidity and temperature sensor is presented. A unified analog front-end interfaces on-chip transducers and converts the inputs into a frequency vis a high-linearity frequency-locked loop. An incomplete-settling switched-capacitor-based Wheatstone bridge is proposed to sense the inputs in a power-efficient fashion

Avalanche Photodiode Focal Plane Arrays and Their Application to Laser Detection and Ranging

Focal-plane avalanche photodiodes (APDs) are being more and more widely and deeply studied to satisfy the requirement in weak light and single photon imaging. The progresses of this worldwide study, especially the distinctive researches and achievements in Southwest Institute of Technical Physics and University of Electronic Science and Technology of China are reviewed in this chapter. We successfully fabricated up to 64 × 1 linear-mode Si APD arrays, and 32 × 32–64 × 64 Si single-photon avalanche detector (SPAD) arrays, and applied them in Laser Detection and Ranging (LADAR) platforms like driverless vehicles. Also, we developed 32 × 32–64 × 64 InGaAsP/InP SPAD arrays, and constructed three-dimensional imaging LADAR using them. Together with the progresses of other groups and other materials, we see a prospective future for the development and application of focal-plane APDs

Technology Development Roadmap: A Technology Development Roadmap for a Future Gravitational Wave Mission

Humankind will detect the first gravitational wave (GW) signals from the Universe in the current decade using ground-based detectors. But the richest trove of astrophysical information lies at lower frequencies in the spectrum only accessible from space. Signals are expected from merging massive black holes throughout cosmic history, from compact stellar remnants orbiting central galactic engines from thousands of close contact binary systems in the Milky Way, and possibly from exotic sources, some not yet imagined. These signals carry essential information not available from electromagnetic observations, and which can be extracted with extraordinary accuracy. For 20 years, NASA, the European Space Agency (ESA), and an international research community have put considerable effort into developing concepts and technologies for a GW mission. Both the 2000 and 2010 decadal surveys endorsed the science and mission concept of the Laser Interferometer Space Antenna (LISA). A partnership of the two agencies defined and analyzed the concept for a decade. The agencies partnered on LISA Pathfinder (LPF), and ESA-led technology demonstration mission, now preparing for a 2015 launch. Extensive technology development has been carried out on the ground. Currently, the evolved Laser Interferometer Space Antenna (eLISA) concept, a LISA-like concept with only two measurement arms, is competing for ESA's L2 opportunity. NASA's Astrophysics Division seeks to be a junior partner if eLISA is selected. If eLISA is not selected, then a LISA-like mission will be a strong contender in the 2020 decadal survey. This Technology Development Roadmap (TDR) builds on the LISA concept development, the LPF technology development, and the U.S. and European ground-based technology development. The eLISA architecture and the architecture of the Mid-sized Space-based Gravitational-wave Observatory (SGO Mid)-a competitive design with three measurement arms from the recent design study for a NASA-led mission after 2020-both use the same technologies. Further, NASA participation in an ESA-led mission would likely augment the eLISA architecture with a third arm to become the SGO Mid architecture. For these reasons, this TDR for a future GW mission applies to both designs and both programmatic paths forward. It is adaptable to the different timelines and roles for an ESA-led or a NASA-led mission, and it is adaptable to available resources. Based on a mature understanding of the interaction between technology and risk, the authors of this TDR have chosen a set of objectives that are more expansive than is usual. The objectives for this roadmap are: (1) reduce technical and development risks and costs; (2) understand and, where possible, relieve system requirements and consequences; (3) increase technical insight into critical technologies; and (4) validate the design at the subsystem level. The emphasis on these objectives, particularly the latter two, is driven by outstanding programmatic decisions, namely whether a future GW mission is ESA-led or NASA-led, and availability of resources. The relative emphasis is best understood in the context of prioritization

Laser-microwave synchronisation for ultrafast electron diffraction

Ultrafast electron diffraction is a pump--probe technique that allows the visualisation of molecular dynamics with atomic scale resolution. However, the fastest electronic and atomic dynamics in light-driven matter transformations are, as yet, unmeasureable with this technique. This is because the temporal resolution in ultrafast electron diffraction is limited by difficulties in producing the shortest electron pulses, caused by the electron charge, via Coulomb repulsion (space charge), and rest mass, via vacuum dispersion of the electron wavefunction. Space charge effects and a finite energy bandwidth both lead to temporal broadening of electron pulses. Methods to compress such pulses in microwave fields have been developed, but these are fundamentally limited by the achievable temporal synchronisation of the employed microwave with the excitation laser pulses. This work is aimed at breaking this limitation and thereby advancing ultrafast electron diffraction towards the ultimate temporal resolution of any realistic light--matter interaction. Firstly, a high-resolution optical-microwave phase detector based on optical interferometry is designed for operation around the 800-nm wavelength of Ti:sapphire lasers best suited for sample excitation. The phase detector provides a resolution of 3 fs and the capability of functioning as an integral component in a phase-locked loop for synchronising a low-noise dielectric resonator oscillator with the Ti:sapphire laser. Furthermore, we demonstrate a separate, novel, passive synchronisation technique through direct microwave extraction of a harmonic of the laser repetition rate by photodetection. A record-low residual phase noise over nine frequency decades (mHz--MHz) is achieved through implementation of an optical-mode filter which circumvents thermal noise problems at low pulses energies to simultaneously reduce detrimental amplitude-to-phase noise conversion in the photodetection process. An amplification chain is designed to achieve a microwave power suitable for electron compression while preserving this excellent phase noise. Rigorous out-of-loop characterisation of the synchronisation with the optical-microwave phase detector shows a root-mean-square (rms) timing stability of 4.8 fs. This superior synchronisation has allowed the generation of 12 fs (rms) electron pulses, the shortest to our knowledge. Lastly, stability of the laser--electron synchronisation over many hours is also demonstrated on a sub-five-femtosecond scale through in-situ measurement and subsequent compensation for the entire range of possible long-term drifts. This shows that incorporating these techniques can allow ultrafast electron diffraction experiments to observe the fastest reversible atomic-scale light--matter interaction dynamics