Electrical Test of Resistive and Capacitive Open Defects at Data Bus in 3D Memory IC

We propose an electrical test method of resistive and capacitive open defects occurring at data bus lines between dies, and between dies and I/O pins in 3D memory ICs. The test method is based on supply current of an IC. The number of test vectors for a 3D memory IC made of ND memory dies in the test method is 10∙ND and small. Also, defective interconnects are located by the test method. Feasibility of the tests is examined by some experiments for a circuit made of an SRAM IC on a printed circuit board. The experimental results show that capacitive open defects and resistive open ones whose resistance values are greater than 200Ω can be detected by the test method

Interconnect materials enabling IGBT modules to achieve stable short circuit failure behavior

Insulated gate bipolar transistor (IGBT) modules, which can fail to stable short-circuit mode, have major applications in electricity network-related fields. Sn-3.5Ag solder joints and sintered Ag joints for the die attachment and Mo, Cu, Sn-3.5Ag, Al, and Ag foils for the top side insert (TSI) material in press pack like single IGBT samples have been investigated using overcurrent and current passage tests. The results reveal that Sn-3.5Ag solder joints in combination with Sn-3.5Ag, Al, or Ag foils can be employed to achieve stable short-circuit failure mode, where the best results are achieved with Ag foils. This can be attributed to the formation of conductive networks/channels through the failed IGBT and good alignment between the residual TSI material and the failed IGBT

BiCMOS Millimetre-wave low-noise amplifier

Abstract: Please refer to full text to view abstract.D.Phil. (Electrical and Electronic Engineering

Dependence of overcurrent failure modes of IGBT modules on interconnect technologies

Insulated gate bipolar transistor (IGBT) modules which can fail to short circuit mode have great of applications in electricity network related fields. Single IGBT samples have been constructed with the standard Al wire bonding, flexible printed circuit board (PCB) interconnect and sandwich structure technologies. The overcurrent failure modes of the constructed IGBT samples have been tested under a range of energy levels, and the structures of the tested samples have been characterized with scanning electronic microscopy and three-dimensional X-ray computed tomography imaging. The results obtained indicate that the IGBT samples constructed with the three interconnect technologies can fail to both open circuit mode and short circuit mode. The sandwich structure IGBT sample can fail to short circuit mode under an energy level of 750 J which can meet realistic industrial applications. The networked conductive phases within the solidification structure and the Sn-3.5Ag filled in the cracks within the residual Si IGBT are responsible for forming the conducting paths in the tested samples. Both liquid phase and gas phase can be formed and the highest temperature can reach the boiling point of Si even if the sandwich structure IGBT sample is tested with short circuit failure mode

Thermal Investigations Of Flip Chip Microelectronic Package With Non-Uniform Power Distribution [TK7874. G614 2004 f rb] [Microfiche 7607].

Arah aliran pempakejan sistem-sistem dan subsistem mikroelektronik adalah kearah pengurangan saiz dan peningkatan prestasi, di mana kedua-duanya menyumbang kepada peningkatan kadar penjanaan haba. The trend in packaging microelectronic systems and subsystems has been to reduce size and increase performance, both of which contribute to increase heat generation