A wideband noise-canceling CMOS LNA exploiting a transformer

A broadband LNA incorporating single-ended to differential conversion, has been successfully implemented using a noise-canceling technique and a single on-chip transformer. The LNA achieves a high voltage gain of 19dB, a wideband input match (2.5-4.0 GHz), and a noise figure of 4-5.4 dB, while consuming only 8mW. The LNA is implemented in a 90nm CMOS process with 6 metal layers

Passive Mixer-based UWB Receiver with Low Loss, High Linearity and Noise-cancelling for Medical Applications

A double balanced passive mixer-based receiver operating in the 3-5 GHz UWB for medical applications is described in this paper. The receiver front-end circuit is composed of an inductorless low noise amplifier (LNA) followed by a fully differential voltage-driven double-balanced passive mixer. A duty cycle of 25% was chosen to eliminate overlap between LO signals, thereby improving receiver linearity. The LNA realizes a gain of 25.3 dB and a noise figure of 2.9 dB. The proposed receiver achieves an IIP3 of 3.14 dBm, an IIP2 of 17.5 dBm and an input return loss (S11) below -12.5dB. Designed in 0.18μm CMOS technology, the proposed mixer consumes 0.72pW from a 1.8V power supply. The designed receiver demonstrated a good ports isolation performance with LO_IF isolation of 60dB and RF_IF isolation of 78dB

The BLIXER, a Wideband Balun-LNA-I/Q-Mixer Topology

This paper proposes to merge an I/Q current-commutating mixer with a noise-canceling balun-LNA. To realize a high bandwidth, the real part of the impedance of all RF nodes is kept low, and the voltage gain is not created at RF but in baseband where capacitive loading is no problem. Thus a high RF bandwidth is achieved without using inductors for bandwidth extension. By using an I/Q mixer with 25% duty-cycle LO waveform the output IF currents have also 25% duty-cycle, causing 2 times smaller DC-voltage drop after IF filtering. This allows for a 2 times increase in the impedance level of the IF filter, rendering more voltage gain for the same supply headroom. The implemented balun-LNA-I/Q-mixer topology achieves > 18 dB conversion gain, a flat noise figure < 5.5 dB from 500 MHz to 7 GHz, IIP2 = +20 dBm and IIP3 = -3 dBm. The core circuit consumes only 16 mW from a 1.2 V supply voltage and occupies less than 0.01 mm2 in 65 nm CMOS

A 250-ps integrated ultra-wideband timed array beamforming receiver in 0.18 um CMOS

This paper presents a 4-channel ultra-wideband (UWB) timed array beamforming receiver designed in a standard 0.18-um CMOS technology. The proposed timed array receiver achieves a maximum delay of 250 ps at the maximum beam steering angle of +/-42o with 10.5o (8 steps) steering resolution and 2-cm antenna spacing. Each receiver channel provides gains ranging from 3.6 to -35 dB and less than 8% delay variation for all delay settings over a 3.1-10.6-GHz frequency range, while consuming a maximum of 58 mW power from a 1.8-V supply. The average -1-dB compression point P1dB is -9.9 dBm. The proposed architecture is modeled and simulated by using Virtuoso Cadence.This work has been partially supported by the Spanish Ministerio de Ciencia, Innovacion y Universidades (MICINN)- ´ Agencia Estatal de Investigacion (AEI) and the European ´ Regional Development Funds (FEDER), by project PGC2018- 098946-B-I00.Peer ReviewedPostprint (author's final draft

A Novel High Linearity and Low Power Folded CMOS LNA for UWB Receivers

© 2017 World Scientific Publishing Company. Electronic version of an article published as Journal of Circuits, Systems and Computers, Vol. 27, No. 03, 1850047, https://doi.org/10.1142/S0218126618500470.This paper presents a high linearity and low power Low-Noise Amplifier (LNA) for Ultra-Wideband (UWB) receivers based on CHRT 0.18μm CMOS technology. In this work, the folded topology is adopted in order to reduce the supply voltage and power consumption. Moreover, a band-pass LC filter is embedded in the folded-cascode circuit to extend bandwidth. The transconductance nonlinearity has a great impact on the whole LNA linearity performance under a low supply voltage. A post-distortion (PD) technique employing an auxiliary transistor is applied in the transconductance stage to improve the linearity. The post-layout simulation results indicate that the proposed LNA achieves a maximum power gain of 12.8dB. The input and output reflection coefficients both are lower than -10.0dB over 2.5~11.5GHz. The input third-order intercept point (IIP3) is 5.6dBm at 8GHz and the noise figure (NF) is lower than 4.0dB. The LNA consumes 5.4mW power under a 1V supply voltage.Peer reviewe

UWB Low Power RF System for Localization

Real time indoor positioning awareness systems aim to add localization capabilities to upcoming wireless technologies that are quickly becoming an important feature for indoor environment. RF-based impulse-radio ultra-wideband (IR-UWB) is a promising technology for in-door positioning systems due to obstacle penetration capabilities, immunity to multi-path and fading, and high resolution. Major challenge for IR-UWB systems is to achieve higher sensitivity, which puts high sampling demands on receivers, increasing the cost and power consumption. This research concentrates on the design of low power ultra-wideband transceivers and analyses different performance trade-offs. The first part focuses on the trade-off and benefits of UWB for indoor localization. It also discusses battery-less wirelessly-powered UWB transceivers tags, power scavenging for low power wireless sensor networks. In the second part, a low power indoor localization system is proposed and design of low power interference tolerant RF receiver front-end is also presented. Finally, a wide-band inductor-less balun low-noise amplifier (LNA) is demonstrated. To achieve good noise figure, linearity and low power consumption, it exploits a current reuse input common source (CS) stage with source follower (SF) feedback and admittance scaled CS stage for noise and distortion cancellation. By separating gain and input match with active feedback, a higher gain is achieved. This architecture significantly decreases required area and provides high RF gain allowing for higher sensitivity with non-coherent RF receiver architecture