Frequency Multipliers in SiGe BiCMOS for Local Oscillator Generation in D-band Wireless Transceivers

Communications at millimeter-wave (mm-Wave) have drawn a lot of attention in recent years due to the wide available bandwidth which translates directly to higher data transmission capacity. Generation of the transceivers local oscillation (LO) is critical because many contrasting requirements, i.e. tuning range (TR), phase noise (PN), output power, and level of spurious tones, affect the system performance. Differently from what is commonly pursued at Radio Frequency, LO generation with a PLL embedding a VCO at the desired output frequency is not viable at mm-wave. A more promising approach consists of a PLL in the 10-20GHz range, where silicon VCOs feature the best figure of merit, followed by a frequency multiplier. In this thesis, a frequency multiplication chain is investigated to up-convert an LO signal from X-band to D-band by a multiplication factor of 12. The multiplication is done in steps of 3, 2, and 2. A sextupler chip comprises the tripler and the first doubler and the last doubler stage which upconverts the LO signal from E- to D-band is realized in a separate chip, all in a 55nm SiGe BiCMOS technology. The frequency tripler circuit is based on a novel circuit topology which yields a remarkable improvement on the suppression of the driving signal frequency at the output, compared to conventional designs exploiting transistors in class-C. The active core of the circuit approximates the transfer characteristic of a third-order polynomial that ideally produces only a third-harmonic of the input signal. Implemented in a separate break-out chip and consuming 23mW of DC power, the tripler demonstrates ~40dB suppression of the input signal and its 5th harmonic over 16% fractional bandwidth and robustness to power variation of the driving signal over a 15dB range. Including the E-band doubler, the sextupler chip achieves a peak output power of 1.7dBm at 74.4GHz and remains within 2dB variation from 70GHz to 82GHz, corresponding to 16% fractional BW. In this frequency range, the leakages of all harmonics are suppressed by more than 40dBc. The design of the D-band doubler was aimed at delivering high output power with high efficiency and high conversion gain. Toward this end, the efficiency of a push-push pair was improved by a stacked Colpitts oscillator to boost the power conversion gain by 10dB. Moreover, the common-collector configuration keeps separate the oscillator tank from the load, allowing independent optimization of the harmonic conversion efficiency and the load impedance for maximum power delivery. The measured performance of the test chip demonstrated Pout up to 8dBm at 130GHz with 13dB conversion gain and 6.3% Power Added Efficiency

Design Exploration of mm-Wave Integrated Transceivers for Short-Range Mobile Communications Towards 5G

This paper presents a design exploration, at both system and circuit levels, of integrated transceivers for the upcoming fifth generation (5G) of wireless communications. First, a system level model for 5G communications is carried out to derive transceiver design specifications. Being 5G still in pre-standardization phase, a few currently used standards (ECMA-387, IEEE 802.15.3c, and LTE-A) are taken into account as the reference for the signal format. Following a top-down flow, this work presents the design in 65nm CMOS SOI and bulk technologies of the key blocks of a fully integrated transceiver: low noise amplifier (LNA), power amplifier (PA) and on-chip antenna. Different circuit topologies are presented and compared allowing for different trade-offs between gain, power consumption, noise figure, output power, linearity, integration cost and link performance. The best configuration of antenna and LNA co-design results in a peak gain higher than 27dB, a noise figure below 5dB and a power consumption of 35mW. A linear PA design is presented to face the high Peak to Average Power Ratio (PAPR) of multi-carrier transmissions envisaged for 5G, featuring a 1dB compression point output power (OP1dB) of 8.2dBm. The delivered output power in the linear region can be increased up to 13.2dBm by combining four basic PA blocks through a Wilkinson power combiner/divider circuit. The proposed circuits are shown to enable future 5G connections, operating in a mm-wave spectrum range (spanning 9GHz, from 57GHz to 66GHz), with a data-rate of several Gb/s in a short-range scenario, spanning from few centimeters to tens of meters

Millimetre-Wave Fibre-Wireless Technologies for 5G Mobile Fronthaul

The unprecedented growth in mobile data traffic, driven primarily by bandwidth rich applications and high definition video is accelerating the development of fifth generation (5G) mobile network. As mobile access network evolves towards centralisation, mobile fronthaul (MFH) architecture becomes essential in providing high capacity, ubiquitous and yet affordable services to subscribers. In order to meet the demand for high data rates in the access, Millimetre-wave (mmWave) has been highlighted as an essential technology in the development of 5G-new radio (5G-NR). In the present MFH architecture which is typically based on common public radio interface (CPRI) protocol, baseband signals are digitised before fibre transmission, featuring high overhead data and stringent synchronisation requirements. A direct application of mmWave 5G-NR to CPRI digital MFH, where signal bandwidth is expected to be up to 1GHz will be challenging, due to the increased complexity of the digitising interface and huge overhead data that will be required for such bandwidth. Alternatively, radio over fibre (RoF) technique can be employed in the transportation of mmWave wireless signals via the MFH link, thereby avoiding the expensive digitisation interface and excessive overhead associated with its implementation. Additionally, mmWave carrier can be realised with the aid of photonic components employed in the RoF link, further reducing the system complexity. However, noise and nonlinearities inherent to analog transmission presents implementation challenges, limiting the system dynamic range. Therefore, it is important to investigate the effects of these impairments in RoF based MFH architecture. This thesis presents extensive research on the impact of noise and nonlinearities on 5G candidate waveforms, in mmWave 5G fibre wireless MFH. Besides orthogonal frequency division multiplexing (OFDM), another radio access technology (RAT) that has received significant attention is filter bank multicarrier (FBMC), particularly due to its high spectral containment and excellent performance in asynchronous transmission. Hence, FBMC waveform is adopted in this work to study the impact of noise and nonlinearities on the mmWave fibre-wireless MFH architecture. Since OFDM is widely deployed and it has been adopted for 5G-NR, the performance of OFDM and FBMC based 5G mmWave RAT in fibre wireless MFH architecture is compared for several implementations and transmission scenarios. To this extent, an end to end transmission testbed is designed and implemented using industry standard VPI Transmission Maker® to investigate five mmWave upconversion techniques. Simulation results show that the impact of noise is higher in FBMC when the signal to-noise (SNR) is low, however, FBMC exhibits better performance compared to OFDM as the SNR improved. More importantly, an evaluation of the contribution of each noise component to the overall system SNR is carried out. It is observed in the investigation that noise contribution from the optical carriers employed in the heterodyne upconversion of intermediate frequency (IF) signals to mmWave frequency dominate the system noise. An adaptive modulation technique is employed to optimise the system throughput based on the received SNR. The throughput of FBMC based system reduced significantly compared to OFDM, due to laser phase noise and chromatic dispersion (CD). Additionally, it is shown that by employing frequency domain averaging technique to enhance the channel estimation (CE), the throughput of FBMC is significantly increased and consequently, a comparable performance is obtained for both waveforms. Furthermore, several coexistence scenarios for multi service transmission are studied, considering OFDM and FBMC based RATs to evaluate the impact inter band interference (IBI), due to power amplifier (PA) nonlinearity on the system performance. The low out of band (OOB) emission in FBMC plays an important role in minimising IBI to adjacent services. Therefore, FBMC requires less guardband in coexistence with multiple services in 5G fibre-wireless MFH. Conversely, OFDM introduced significant OOB to adjacent services requiring large guardband in multi-service coexistence transmission scenario. Finally, a novel transmission scheme is proposed and investigated to simultaneously generate multiple mmWave signals using laser heterodyning mmWave upconversion technique. With appropriate IF and optical frequency plan, several mmWave signals can be realised. Simulation results demonstrate successful simultaneous realisation of 28GHz, 38GHz, and 60GHz mmWave signals

MIMO RADIO-OVER-FIBRE DISTRIBUTED ANTENNA SYSTEM FOR NEXT GENERATION WIRELESS COMMUNICATION

This thesis introduces low-cost implementations for the next generation distributed antenna system (DAS) using analogue radio over fibre. A multiple-input-multiple-output (MIMO) enabled radio over fibre (RoF) system using double sideband (DSB) frequency translation system is proposed. In such a system, the 2x2 MIMO signals can be transmitted to the remote antenna units (RAUs) from the base station via a single optical link. By using the DSB frequency translation, the original single-input-single-output (SISO) DAS can be upgraded into the MIMO DAS without implementing parallel optical links. Experimentally, the DSB frequency translation 2x2 MIMO RoF system transmits 2x2 LTE MIMO signals with 20MHz bandwidth in each channel via a 300m MMF link. The condition number of the system is <10dB within the power equaliser bandwidth which means the MIMO system is well-conditioned and the crosstalk between the channels can be compensated by the MIMO signal processing. To install the DSB frequency translation system in a wideband service-agnostic DAS, the original MIMO signals need to be translated into unoccupied frequency bands over the DAS, which are usually occupied by specific applications that are not to be transmitted over the DAS. The frequency spectrum allocation of the wireless services is analysed showing that by choosing a particular LO frequency (2.2GHz in the UK), in the DSB frequency translation system, the original MIMO signals can always be translated into unoccupied frequency bands so that the same infrastructure can support multiple services. The idea of DSB frequency translation system can not only support MIMO radio over fibre but can also improve the SFDR of a general radio over fibre system. Because when the upper sideband and the lower sideband of the signal after translation are converted back to the original frequency band, the noise adds incoherently but the signals add-up coherently, this gives the system theoretically 2dB 3rd order SFDR improvement. If the idea of the DSB frequency translation is extended into a higher number of sidebands, the system SFDR can be further improved. Experimentally, the system 3rd order SFDR can be improved beyond the intrinsic optical link by 2.7dB by using quadruple sideband (QSB) frequency translation. It means the optical bandwidth in a general RoF system can be traded for the electrical SFDR. By integrating the analogue and the digital RoF systems, a hybrid DAS has been demonstrated, showing that the EVM dynamic range for the 4G LTE service (using digital RoF link) can be improved to be similar to the 3G UMTS service (using analogue RoF link), so that fewer number of RAUs for the LTE services are needed

Modulation, Coding, and Receiver Design for Gigabit mmWave Communication

While wireless communication has become an ubiquitous part of our daily life and the world around us, it has not been able yet to deliver the multi-gigabit throughput required for applications like high-definition video transmission or cellular backhaul communication. The throughput limitation of current wireless systems is mainly the result of a shortage of spectrum and the problem of congestion. Recent advancements in circuit design allow the realization of analog frontends for mmWave frequencies between 30GHz and 300GHz, making abundant unused spectrum accessible. However, the transition to mmWave carrier frequencies and GHz bandwidths comes with new challenges for wireless receiver design. Large variations of the channel conditions and high symbol rates require flexible but power-efficient receiver designs. This thesis investigates receiver algorithms and architectures that enable multi-gigabit mmWave communication. Using a system-level approach, the design options between low-power time-domain and power-hungry frequency-domain signal processing are explored. The system discussion is started with an analysis of the problem of parameter synchronization in mmWave systems and its impact on system design. The proposed synchronization architecture extends known synchronization techniques to provide greater flexibility regarding the operating environments and for system efficiency optimization. For frequency-selective environments, versatile single-carrier frequency domain equalization (SC-FDE) offers not only excellent channel equalization, but also the possibility to integrate additional baseband tasks without overhead. Hence, the high initial complexity of SC-FDE needs to be put in perspective to the complexity savings in the other parts of the baseband. Furthermore, an extension to the SC-FDE architecture is proposed that allows an adaptation of the equalization complexity by switching between a cyclic-prefix mode and a reduced block length overlap-save mode based on the delay spread. Approaching the problem of complexity adaptation from time-domain, a high-speed hardware architecture for the delayed decision feedback sequence estimation (DDFSE) algorithm is presented. DDFSE uses decision feedback to reduce the complexity of the sequence estimation and allows to set the system performance between the performance of full maximum-likelihood detection and pure decision feedback equalization. An implementation of the DDFSE architecture is demonstrated as part of an all-digital IEEE802.11ad baseband ASIC manufactured in 40nm CMOS. A flexible architecture for wideband mmWave receivers based on complex sub-sampling is presented. Complex sub-sampling combines the design advantages of sub-sampling receivers with the flexibility of direct-conversion receivers using a single passive component and a digital compensation scheme. Feasibility of the architecture is proven with a 16Gb/s hardware demonstrator. The demonstrator is used to explore the potential gain of non-equidistant constellations for high-throughput mmWave links. Specifically crafted amplitude phase-shift keying (APSK) modulation achieve 1dB average mutual information (AMI) advantage over quadrature amplitude modulation (QAM) in simulation and on the testbed hardware. The AMI advantage of APSK can be leveraged for a practical transmission using Polar codes which are trained specifically for the constellation

Multiservice Ethernet Digital Distributed Antenna Systems

Over 90% of wireless communications traffic occurs indoors and in-building wireless coverage is still one of the biggest obstacles for wireless users. As the growing demands on wireless capacity, coverage and connectivity have led to 4G and 5G standards, it has also become increasingly important to design and implement future-proof indoor wireless services in a cost effective manner. This thesis introduces a novel multi-service digital distributed antenna systems (DDAS) for indoor wireless coverage, which not only is able to transport multiple wireless carriers from different vendors and mobile operators, but also allows a converged architecture to integrate indoor wireless system with existing Ethernet infrastructures. The Cloud Radio Access Networks (C-RAN) has been suggested by major telecom vendors as the main architecture for last-mile coverage in 5G. However, the digital fronthaul interface defined in common public radio interface (CPRI), which is most widely adopted standard for C-RAN, requires very expensive infrastructures to be built due to the high data rate generated after digitisation. A solution has been introduced at the University of Cambridge previously to remove the digital redundancy by using a data compression technique which has shown 3-times higher transmission efficiency than CPRI. This thesis extends the concept to a more robust architecture allowing multiple wireless services to be transmitted simultaneously as well as being carried over standard Ethernet without losing the Quality of End-user Experience (QoE) and the Quality of Service (QoS) of in-building mobile network. A two-channel DDAS system with data compression algorithm is experimentally demonstrated, showing wide RF dynamic range for both 4G LTE service and 3G WCDMA service simultaneously carried over a single fibre-based infrastructure. The system leads to the design and implementation of full-service DDAS system allowing 14 channels (all 2/3/4G service from three major mobile operators) to be carried over single 10Gbps network. Typically, the system using CPRI will need over 30Gbps network to be installed for wireless coverage. Another key aspect covered in this thesis is the design and implementation of the multi-service DDAS over Ethernet (Eth-DDAS). Due to the stringent latency requirement in wireless services, mitigation of delays and errors in frame ordering has become a key challenge for putting DDAS over Ethernet. To overcome these problems, a special Eth-DDAS frame structure is proposed in this thesis. After digitisation, digital signal bearing RF information is packetised onto Ethernet-compatible frames with additional timestamps and sequence numbers before transported via fibre to the receiver. Three latency scenarios are tested with different payload sizes of the proposed frame structure and real-time RF performance is measured to prove the capability of implementation of such system in real-life using commercial off-the-shelf (COTS) ADC/DAC and FPGAs

CMOS Signal Synthesizers for Emerging RF-to-Optical Applications

The need for clean and powerful signal generation is ubiquitous, with applications spanning the spectrum from RF to mm-Wave, to into and beyond the terahertz-gap. RF applications including mobile telephony and microprocessors have effectively harnessed mixed-signal integration in CMOS to realize robust on-chip signal sources calibrated against adverse ambient conditions. Combined with low cost and high yield, the CMOS component of hand-held devices costs a few cents per part per million parts. This low cost, and integrated digital processing, make CMOS an attractive option for applications like high-resolution imaging and ranging, and the emerging 5-G communication space. RADAR techniques when expanded to optical frequencies can enable micrometers of resolution for 3D imaging. These applications, however, impose upto 100x more exacting specifications on power and spectral purity at much higher frequencies than conventional RF synthesizers. This generation of applications will present unconventional challenges for transistor technologies - whether it is to squeeze performance in the conventionally used spectrum, already wrung dry, or signal generation and system design in the relatively emptier mm-Wave to sub-mmWave spectrum, much of the latter falling in the ``Terahertz Gap". Indeed, transistor scaling and innovative device physics leading to new transistor topologies have yielded higher cut-off frequencies in CMOS, though still lagging well behind SiGe and III-V semiconductors. To avoid multimodule solutions with functionality partitioned across different technologies, CMOS must be pushed out of its comfort zone, and technology scaling has to have accompanying breakthroughs in design approaches not only at the system but also at the block level. In this thesis, while not targeting a specific application, we seek to formulate the obstacles in synthesizing high frequency, high power and low noise signals in CMOS and construct a coherent design methodology to address them. Based on this, three novel prototypes to overcome the limiting factors in each case are presented. The first half of this thesis deals with high frequency signal synthesis and power generation in CMOS. Outside the range of frequencies where the transistor has gain, frequency generation necessitates harmonic extraction either as harmonic oscillators or as frequency multipliers. We augment the traditional maximum oscillation frequency metric (fmax), which only accounts for transistor losses, with passive component loss to derive an effective fmax metric. We then present a methodology for building oscillators at this fmax, the Maximum Gain Ring Oscillator. Next, we explore generating large signals beyond fmax through harmonic extraction in multipliers. Applying concepts of waveform shaping, we demonstrate a Power Mixer that engineers transistor nonlinearity by manipulating the amplitudes and relative phase shifts of different device nodes to maximize performance at a specific harmonic beyond device cut-off. The second half proposes a new architecture for an ultra-low noise phase-locked loop (PLL), the Reference-Sampling PLL. In conventional PLLs, a noisy buffer converts the slow, low-noise sine-wave reference signal to a jittery square-wave clock against which the phase of a noisy voltage-controlled oscillator (VCO) is corrected. We eliminate this reference buffer, and measure phase error by sampling the reference sine-wave with the 50x faster VCO waveform already available on chip, and selecting the relevant sample with voltage proportional to phase error. By avoiding the N-squared multiplication of the high-power reference buffer noise, and directly using voltage-mode phase error to control the VCO, we eliminate several noisy components in the controlling loop for ultra-low integrated jitter for a given power consumption. Further, isolation of the VCO tank from any varying load, unlike other contemporary divider-less PLL architectures, results in an architecture with record performance in the low-noise and low-spur space. We conclude with work that brings together concepts developed for clean, high-power signal generation towards a hybrid CMOS-Optical approach to Frequency-Modulated Continuous-Wave (FMCW) Light-Detection-And-Ranging (LIDAR). Cost-effective tunable lasers are temperature-sensitive and have nonlinear tuning profiles, rendering precise frequency modulations or 'chirps' untenable. Locking them to an electronic reference through an electro-optic PLL, and electronically calibrating the control signal for nonlinearity and ambient sensitivity, can make such chirps possible. Approaches that build on the body of advances in electrical PLLs to control the performance, and ease the specification on the design of optical systems are proposed. Eventually, we seek to leverage the twin advantages of silicon-intensive integration and low-cost high-yield towards developing a single-chip solution that uses on-chip signal processing and phased arrays to generate precise and robust chirps for an electronically-steerable fine LIDAR beam