Programmable rate modem utilizing digital signal processing techniques

The engineering development study to follow was written to address the need for a Programmable Rate Digital Satellite Modem capable of supporting both burst and continuous transmission modes with either binary phase shift keying (BPSK) or quadrature phase shift keying (QPSK) modulation. The preferred implementation technique is an all digital one which utilizes as much digital signal processing (DSP) as possible. Here design tradeoffs in each portion of the modulator and demodulator subsystem are outlined, and viable circuit approaches which are easily repeatable, have low implementation losses and have low production costs are identified. The research involved for this study was divided into nine technical papers, each addressing a significant region of concern in a variable rate modem design. Trivial portions and basic support logic designs surrounding the nine major modem blocks were omitted. In brief, the nine topic areas were: (1) Transmit Data Filtering; (2) Transmit Clock Generation; (3) Carrier Synthesizer; (4) Receive AGC; (5) Receive Data Filtering; (6) RF Oscillator Phase Noise; (7) Receive Carrier Selectivity; (8) Carrier Recovery; and (9) Timing Recovery

Towards 'smart lasers': self-optimisation of an ultrafast pulse source using a genetic algorithm

Short-pulse fibre lasers are a complex dynamical system possessing a broad space of operating states that can be accessed through control of cavity parameters. Determination of target regimes is a multi-parameter global optimisation problem. Here, we report the implementation of a genetic algorithm to intelligently locate optimum parameters for stable single-pulse mode-locking in a Figure-8 fibre laser, and fully automate the system turn-on procedure. Stable ultrashort pulses are repeatably achieved by employing a compound fitness function that monitors both temporal and spectral output properties of the laser. Our method of encoding photonics expertise into an algorithm and applying machine-learning principles paves the way to self-optimising `smart' optical technologies

Special arod system studies seventh quarterly report

Phase lock loop advanced circuits, and technical summary for Airborne Range and Orbit Determination /AROD/ syste

Multipath signal model development

The development and use of mathematical models of signals received through the multipath environmental of a TDRS-to-user spacecraft link and vice versa are discussed. The TDRS (tracking and data relay satellite) will be in synchronous orbit. The user spacecraft will be in a low altitude orbit between 200 and 4000 km

Analysis and equalization of data-dependent jitter

Data-dependent jitter limits the bit-error rate (BER) performance of broadband communication systems and aggravates synchronization in phase- and delay-locked loops used for data recovery. A method for calculating the data-dependent jitter in broadband systems from the pulse response is discussed. The impact of jitter on conventional clock and data recovery circuits is studied in the time and frequency domain. The deterministic nature of data-dependent jitter suggests equalization techniques suitable for high-speed circuits. Two equalizer circuit implementations are presented. The first is a SiGe clock and data recovery circuit modified to incorporate a deterministic jitter equalizer. This circuit demonstrates the reduction of jitter in the recovered clock. The second circuit is a MOS implementation of a jitter equalizer with independent control of the rising and falling edge timing. This equalizer demonstrates improvement of the timing margins that achieve 10/sup -12/ BER from 30 to 52 ps at 10 Gb/s

A review of fade detection techniques

Several proposed propagation fade detection techniques are reviewed in light of general requirements presented for beacon fade characterization. The discussion includes an analysis of phase lock versus frequency lock beacon tracking loops and of excess noise injection type radiometers. The Advanced Communications Technology Satellite (ACTS) beacon fade detection schemes proposed by the Communications Satellite Corporation and the Jet Propulsion Laboratory are examined along with the fade detection technique used by Harris in the Advanced Communications Technology Satellite (ACTS) low burst rate (LBR) terminal

Advanced deep space communication systems study Final report

Deep space communication system requirements for period 1970 to 198

Frequency and fundamental signal measurement algorithms for distributed control and protection applications

Increasing penetration of distributed generation within electricity networks leads to the requirement for cheap, integrated, protection and control systems. To minimise cost, algorithms for the measurement of AC voltage and current waveforms can be implemented on a single microcontroller, which also carries out other protection and control tasks, including communication and data logging. This limits the frame rate of the major algorithms, although analogue to digital converters (ADCs) can be oversampled using peripheral control processors on suitable microcontrollers. Measurement algorithms also have to be tolerant of poor power quality, which may arise within grid-connected or islanded (e.g. emergency, battlefield or marine) power system scenarios. This study presents a 'Clarke-FLL hybrid' architecture, which combines a three-phase Clarke transformation measurement with a frequency-locked loop (FLL). This hybrid contains suitable algorithms for the measurement of frequency, amplitude and phase within dynamic three-phase AC power systems. The Clarke-FLL hybrid is shown to be robust and accurate, with harmonic content up to and above 28% total harmonic distortion (THD), and with the major algorithms executing at only 500 samples per second. This is achieved by careful optimisation and cascaded use of exact-time averaging techniques, which prove to be useful at all stages of the measurements: from DC bias removal through low-sample-rate Fourier analysis to sub-harmonic ripple removal. Platform-independent algorithms for three-phase nodal power flow analysis are benchmarked on three processors, including the Infineon TC1796 microcontroller, on which only 10% of the 2000 mus frame time is required, leaving the remainder free for other algorithms