Hardware Implementation of the Logarithm Function using Improved Parabolic Synthesis

This thesis presents a design that approximates the fractional part of the based two logarithm function by using Improved Parabolic Synthesis including its CMOS VLSI implementations. Improved Parabolic Synthesis is a novel methodology in favor of implementing unary functions e.g. trigonometric, logarithm, square root etc. in hardware. It is an evolved approach from Parabolic Synthesis by combining it with Second-Degree Interpolation. In the thesis, the design explores a simple and parallel architecture for fast timing and optimizes wordlengths in computing stages for a small design. The error behavior of the design is described and char- acterized to meet the desired error metrics. This implementation is compared to other approaches e.g. Parabolic Synthesis and CORDIC using 65nm standard cell libraries and it is proved to have better performance in terms of smaller chip area, lower dynamic power, and shorter critical path

NACU: A Non-Linear Arithmetic Unit for Neural Networks

Reconfigurable architectures targeting neural networks are an attractive option. They allow multiple neural networks of different types to be hosted on the same hardware, in parallel or sequence. Reconfigurability also grants the ability to morph into different micro-architectures to meet varying power-performance constraints. In this context, the need for a reconfigurable non-linear computational unit has not been widely researched. In this work, we present a formal and comprehensive method to select the optimal fixed-point representation to achieve the highest accuracy against the floating-point implementation benchmark. We also present a novel design of an optimised reconfigurable arithmetic unit for calculating non-linear functions. The unit can be dynamically configured to calculate the sigmoid, hyperbolic tangent, and exponential function using the same underlying hardware. We compare our work with the state-of-the-art and show that our unit can calculate all three functions without loss of accuracy

Algorithms and architectures for the multirate additive synthesis of musical tones

In classical Additive Synthesis (AS), the output signal is the sum of a large number of independently controllable sinusoidal partials. The advantages of AS for music synthesis are well known as is the high computational cost. This thesis is concerned with the computational optimisation of AS by multirate DSP techniques. In note-based music synthesis, the expected bounds of the frequency trajectory of each partial in a finite lifecycle tone determine critical time-invariant partial-specific sample rates which are lower than the conventional rate (in excess of 40kHz) resulting in computational savings. Scheduling and interpolation (to suppress quantisation noise) for many sample rates is required, leading to the concept of Multirate Additive Synthesis (MAS) where these overheads are minimised by synthesis filterbanks which quantise the set of available sample rates. Alternative AS optimisations are also appraised. It is shown that a hierarchical interpretation of the QMF filterbank preserves AS generality and permits efficient context-specific adaptation of computation to required note dynamics. Practical QMF implementation and the modifications necessary for MAS are discussed. QMF transition widths can be logically excluded from the MAS paradigm, at a cost. Therefore a novel filterbank is evaluated where transition widths are physically excluded. Benchmarking of a hypothetical orchestral synthesis application provides a tentative quantitative analysis of the performance improvement of MAS over AS. The mapping of MAS into VLSI is opened by a review of sine computation techniques. Then the functional specification and high-level design of a conceptual MAS Coprocessor (MASC) is developed which functions with high autonomy in a loosely-coupled master- slave configuration with a Host CPU which executes filterbanks in software. Standard hardware optimisation techniques are used, such as pipelining, based upon the principle of an application-specific memory hierarchy which maximises MASC throughput

The detection of unknown waveforms in ESM receivers: FFT-based real-time solutions

Radars and airborne electronic support measures (ESMs) systems are locked in a tactical battle to detect each other whilst remaining undetected. Traditionally, the ESM system has a range advantage. Low probability of intercept (LPI) waveform designers are, however, more heavily exploiting the matched filter radar advantage and hence degrading the range advantage. There have been literature and internal, SELEX Galileo proposals to regain some ESM processing gain of low probability of intercept (LPI) waveforms. This study, however, has sought digital signal processing (DSP) solutions which are: (1) computationally simple; (2) backward-compatible with existing SELEX Galileo digital receivers (DRxs) and (3) have low resource requirements. The two contributions are complementary and result in a detector which is suitable for detection of most radar waveforms. The first contribution is the application of spatially variant apodization (SVA) in a detection role. Compared to conventional window functions, SVA was found to be beneficial for the detection of sinusoidal radar waveforms as it surpassed the fixed window function detectors in all scenarios tested. The second contribution shows by simulation that simple spectral smoothing techniques improved DRx LPI detection capability to a level similar to more complicated non-parametric spectral estimators and far in excess of the conventional (modified) periodogram. The DSP algorithms were implemented using model-based design (MBD). The implication is that a detector with improved conventional and LPI waveform detection capability can be created from the intellectual property (IP). Estimates of the improvement in SELEX Galileo DRx system detection range are provided in the conclusion

Collective Communications and Computation Mechanisms on the RF Channel for Organic Printed Smart Labels and Resource-limited IoT Nodes

Radio Frequency IDentification (RFID) and Wireless Sensor Networks (WSN) are seen as enabler technologies for realizing the Internet of Things (IoT). Organic and printed Electronics (OE) has the potential to provide low cost and all-printable smart RFID labels in high volumes. With regard to WSN, power harvesting techniques and resource-efficient communications are promising key technologies to create sustainable and for the environment friendly sensing devices. However, the implementation of OE smart labels is only allowing printable devices of ultra-low hardware complexity, that cannot employ standard RFID communications. And, the deployment of current WSN technology is far away from offering battery-free and low-cost sensing technology. To this end, the steady growth of IoT is increasing the demand for more network capacity and computational power. With respect to wireless communications research, the state-of-the-art employs superimposed radio transmission in form of physical layer network coding and computation over the MAC to increase information flow and computational power, but lacks on practicability and robustness so far. With regard to these research challenges we developed in particular two approaches, i.e., code-based Collective Communications for dense sensing environments, and time-based Collective Communications (CC) for resource-limited WSNs. In respect to the code-based CC approach we exploit the principle of superimposed radio transmission to acquire highly scalable and robust communications obtaining with it at the same time as well minimalistic smart RFID labels, that can be manufactured in high volume with present-day OE. The implementation of our code-based CC relies on collaborative and simultaneous transmission of randomly drawn burst sequences encoding the data. Based on the framework of hyper-dimensional computing, statistical laws and the superposition principle of radio waves we obtained the communication of so called ensemble information, meaning the concurrent bulk reading of sensed values, ranges, quality rating, identifiers (IDs), and so on. With 21 transducers on a small-scale reader platform we tested the performance of our approach successfully proving the scalability and reliability. To this end, we implemented our code-based CC mechanism into an all-printable passive RFID label down to the logic gate level, indicating a circuit complexity of about 500 transistors. In respect to time-based CC approach we utilize the superimposed radio transmission to obtain resource-limited WSNs, that can be deployed in wide areas for establishing, e.g., smart environments. In our application scenario for resource-limited WSN, we utilize the superimposed radio transmission to calculate functions of interest, i.e., to accomplish data processing directly on the radio channel. To prove our concept in a case study, we created a WSN with 15 simple nodes measuring the environmental mean temperature. Based on our analysis about the wireless computation error we were able to minimize the stochastic error arbitrarily, and to remove the systematic error completely

A VLSI implementation of logarithmic and exponential functions using a novel parabolic synthesis methodology compared to the CORDIC algorithm

High performance implementations of unary functions are important in many applications e.g. in the wireless communication area. This paper shows the development and VLSI implementation of unary functions like the logarithmic and exponential function, by using a novel approximation methodology based on parabolic synthesis, which is compared to the well known CORDIC algorithm. Both designs are synthesized and implemented on an FPGA and as an ASIC. The results of such implementations are compared with metrics such as performance and area. The performance in the parabolic architecture is shown to exceed the CORDIC architecture by a factor 4.2, in a 65 nm Standard-VT ASIC implementation

Speech Recognition

Chapters in the first part of the book cover all the essential speech processing techniques for building robust, automatic speech recognition systems: the representation for speech signals and the methods for speech-features extraction, acoustic and language modeling, efficient algorithms for searching the hypothesis space, and multimodal approaches to speech recognition. The last part of the book is devoted to other speech processing applications that can use the information from automatic speech recognition for speaker identification and tracking, for prosody modeling in emotion-detection systems and in other speech processing applications that are able to operate in real-world environments, like mobile communication services and smart homes

Estimation and control of non-linear and hybrid systems with applications to air-to-air guidance

Issued as Progress report, and Final report, Project no. E-21-67