Synthesis and Optimization of Reversible Circuits - A Survey

Reversible logic circuits have been historically motivated by theoretical research in low-power electronics as well as practical improvement of bit-manipulation transforms in cryptography and computer graphics. Recently, reversible circuits have attracted interest as components of quantum algorithms, as well as in photonic and nano-computing technologies where some switching devices offer no signal gain. Research in generating reversible logic distinguishes between circuit synthesis, post-synthesis optimization, and technology mapping. In this survey, we review algorithmic paradigms --- search-based, cycle-based, transformation-based, and BDD-based --- as well as specific algorithms for reversible synthesis, both exact and heuristic. We conclude the survey by outlining key open challenges in synthesis of reversible and quantum logic, as well as most common misconceptions.Comment: 34 pages, 15 figures, 2 table

Research in the effective implementation of guidance computers with large scale arrays Interim report

Functional logic character implementation in breadboard design of NASA modular compute

Scalable, Time-Responsive, Digital, Energy-Efficient Molecular Circuits using DNA Strand Displacement

We propose a novel theoretical biomolecular design to implement any Boolean circuit using the mechanism of DNA strand displacement. The design is scalable: all species of DNA strands can in principle be mixed and prepared in a single test tube, rather than requiring separate purification of each species, which is a barrier to large-scale synthesis. The design is time-responsive: the concentration of output species changes in response to the concentration of input species, so that time-varying inputs may be continuously processed. The design is digital: Boolean values of wires in the circuit are represented as high or low concentrations of certain species, and we show how to construct a single-input, single-output signal restoration gate that amplifies the difference between high and low, which can be distributed to each wire in the circuit to overcome signal degradation. This means we can achieve a digital abstraction of the analog values of concentrations. Finally, the design is energy-efficient: if input species are specified ideally (meaning absolutely 0 concentration of unwanted species), then output species converge to their ideal concentrations at steady-state, and the system at steady-state is in (dynamic) equilibrium, meaning that no energy is consumed by irreversible reactions until the input again changes. Drawbacks of our design include the following. If input is provided non-ideally (small positive concentration of unwanted species), then energy must be continually expended to maintain correct output concentrations even at steady-state. In addition, our fuel species - those species that are permanently consumed in irreversible reactions - are not "generic"; each gate in the circuit is powered by its own specific type of fuel species. Hence different circuits must be powered by different types of fuel. Finally, we require input to be given according to the dual-rail convention, so that an input of 0 is specified not only by the absence of a certain species, but by the presence of another. That is, we do not construct a "true NOT gate" that sets its output to high concentration if and only if its input's concentration is low. It remains an open problem to design scalable, time-responsive, digital, energy-efficient molecular circuits that additionally solve one of these problems, or to prove that some subset of their resolutions are mutually incompatible.Comment: version 2: the paper itself is unchanged from version 1, but the arXiv software stripped some asterisk characters out of the abstract whose purpose was to highlight words. These characters have been replaced with underscores in version 2. The arXiv software also removed the second paragraph of the abstract, which has been (attempted to be) re-inserted. Also, although the secondary subject is "Soft Condensed Matter", this classification was chosen by the arXiv moderators after submission, not chosen by the authors. The authors consider this submission to be a theoretical computer science paper

Indicating Asynchronous Array Multipliers

Multiplication is an important arithmetic operation that is frequently encountered in microprocessing and digital signal processing applications, and multiplication is physically realized using a multiplier. This paper discusses the physical implementation of many indicating asynchronous array multipliers, which are inherently elastic and modular and are robust to timing, process and parametric variations. We consider the physical realization of many indicating asynchronous array multipliers using a 32/28nm CMOS technology. The weak-indication array multipliers comprise strong-indication or weak-indication full adders, and strong-indication 2-input AND functions to realize the partial products. The multipliers were synthesized in a semi-custom ASIC design style using standard library cells including a custom-designed 2-input C-element. 4x4 and 8x8 multiplication operations were considered for the physical implementations. The 4-phase return-to-zero (RTZ) and the 4-phase return-to-one (RTO) handshake protocols were utilized for data communication, and the delay-insensitive dual-rail code was used for data encoding. Among several weak-indication array multipliers, a weak-indication array multiplier utilizing a biased weak-indication full adder and the strong-indication 2-input AND function is found to have reduced cycle time and power-cycle time product with respect to RTZ and RTO handshaking for 4x4 and 8x8 multiplications. Further, the 4-phase RTO handshaking is found to be preferable to the 4-phase RTZ handshaking for achieving enhanced optimizations of the design metrics.Comment: arXiv admin note: text overlap with arXiv:1903.0943

Asynchronous design of a multi-dimensional logarithmic number system processor for digital hearing instruments.

This thesis presents an asynchronous Multi-Dimensional Logarithmic Number System (MDLNS) processor that exhibits very low power dissipation. The target application is for a hearing instrument DSP. The MDLNS is a newly developed number system that has the advantage of reducing hardware complexity compared to the classical Logarithmic Number System (LNS). A synchronous implementation of a 2-digit 2DLNS filterbank, using the MDLNS to construct a FIR filterbank, has successfully proved that this novel number representation can benefit this digital hearing instrument application in the requirement of small size and low power. In this thesis we demonstrate that the combination of using the MDLNS, along with an asynchronous design methodology, produces impressive power savings compared to the previous synchronous design. A 4-phase bundled-data full-handshaking protocol is applied to the asynchronous control design. We adopt the Differential Cascade Voltage Switch Logic (DCVSL) circuit family for the design of the computation cells in this asynchronous MDLNS processor. Besides the asynchronous design methodology, we also use finite ring calculations to reduce adder bit-width to provide improvements compared to the previous MDLNS filterbank architecture. Spectre power simulation results from simulations of this asynchronous MDLNS processor demonstrate that over 70 percent power savings have been achieved compared to the synchronous design. This full-custom asynchronous MDLNS processor has been submitted for fabrication in the TSMC 0.18mum CMOS technology. A further contribution in this thesis is the development of a novel synchronizing method of design for testability (DfT), which is offered as a possible solution for asynchronous DfT methods.Dept. of Electrical and Computer Engineering. Paper copy at Leddy Library: Theses & Major Papers - Basement, West Bldg. / Call Number: Thesis2004 .W85. Source: Masters Abstracts International, Volume: 43-01, page: 0288. Advisers: G. A. Jullien; W. C. Miller. Thesis (M.A.Sc.)--University of Windsor (Canada), 2004

Performance Comparison of Static CMOS and Domino Logic Style in VLSI Design: A Review

Of late, there is a steep rise in the usage of handheld gadgets and high speed applications. VLSI designers often choose static CMOS logic style for low power applications. This logic style provides low power dissipation and is free from signal noise integrity issues. However, designs based on this logic style often are slow and cannot be used in high performance circuits. On the other hand designs based on Domino logic style yield high performance and occupy less area. Yet, they have more power dissipation compared to their static CMOS counterparts. As a practice, designers during circuit synthesis, mix more than one logic style judiciously to obtain the advantages of each logic style. Carefully designing a mixed static Domino CMOS circuit can tap the advantages of both static and Domino logic styles overcoming their own short comings

Design Of Dna Strand Displacement Based Circuits

DNA is the basic building block of any living organism. DNA is considered a popular candidate for future biological devices and circuits for solving genetic disorders and several other medical problems. With this objective in mind, this research aims at developing novel approaches for the design of DNA based circuits. There are many recent developments in the medical field such as the development of biological nanorobots, SMART drugs, and CRISPR-Cas9 technologies. There is a strong need for circuits that can work with these technologies and devices. DNA is considered a suitable candidate for designing such circuits because of the programmability of the DNA strands, small size, lightweight, known thermodynamics, higher parallelism, and exponentially reducing the cost of synthesizing techniques. The DNA strand displacement operation is useful in developing circuits with DNA strands. The circuit can be either a digital circuit, in which the logic high and logic low states of the DNA strand concentrations are considered as the signal, or it can be an analog circuit in which the concentration of the DNA strands itself will act as the signal. We developed novel approaches in this research for the design of digital, as well as analog circuits keeping in view of the number of DNA strands required for the circuit design. Towards this goal in the digital domain, we developed spatially localized DNA majority logic gates and an inverter logic gate that can be used with the existing seesaw based logic gates. The majority logic gates proposed in this research can considerably reduce the number of strands required in the design. The introduction of the logic inverter operation can translate the dual rail circuit architecture into a monorail architecture for the seesaw based logic circuits. It can also reduce the number of unique strands required for the design into approximately half. The reduction in the number of unique strands will consequently reduce the leakage reactions, circuit complexity, and cost associated with the DNA circuits. The real world biological inputs are analog in nature. If we can use those analog signals directly in the circuits, it can considerably reduce the resources required. Even though analog circuits are highly prone to noise, they are a perfect candidate for performing computations in the resource-limited environments, such as inside the cell. In the analog domain, we are developing a novel fuzzy inference engine using analog circuits such as the minimum gate, maximum gate, and fan-out gates. All the circuits discussed in this research were designed and tested in the Visual DSD software. The biological inputs are inherently fuzzy in nature, hence a fuzzy based system can play a vital role in future decision-making circuits. We hope that our research will be the first step towards realizing these larger goals. The ultimate aim of our research is to develop novel approaches for the design of circuits which can be used with the future biological devices to tackle many medical problems such as genetic disorders