53,209 research outputs found

    ASYMPTOTYCZNIE OPTYMALNY ALGORYTM PRZETWARZANIA SYGNAŁÓW PROMIENIOWANIA BOCZNEGO Z EKRANÓW MONITORÓW LCD

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    An asymptotically optimal compatible algorithm for detecting side radiation signals from the monitor screen on liquid crystal structures and estimating the duration of image immutability on the monitor screen is found, which will better intercept information from monitor screens. The structure of a special technical intelligence tool is justified as a maximum likelihood algorithm for a finite number of unknown quadrature amplitudes of the information leakage signal from the monitor screen on liquid crystal structures.Znaleziono asymptotycznie optymalny wspólny algorytm wykrywania sygnałów promieniowania bocznego z ekranu monitora na strukturach ciekłokrystalicznych i szacowania czasu trwania niezmienności obrazu na ekranie monitora, który w najlepszy sposób przechwyci informacje z ekranów monitorów. Struktura specjalnego narzędzia wywiadu technicznego jest uzasadniona jako algorytm maksymalnego prawdopodobieństwa dla skończonej liczby nieznanych kwadraturowych amplitud sygnału wycieku informacji z ekranu monitora na strukturach ciekłokrystalicznych

    Which economic model for a water-efficient Europe? Report of a CEPS Task Force. CEPS Task Force Report, 27 November 2012

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    This CEPS Task Force Report focuses on how to improve water efficiency in Europe, notably in public supply, households, agriculture, energy and manufacturing as well as across sectors. It presents a number of recommendations on how to make better use of economic policy instruments to sustainably manage the EU’s water resources. Published in the run-up to the European Commission’s “Blueprint to Safeguard Europe’s Waters”, the report contributes to the policy deliberations in two ways. First, by assessing the viability of economic policy instruments, it addresses a major shortcoming that has so far prevented the 2000 EU Water Framework Directive (WFD) from becoming fully effective in practice: the lack of appropriate, coherent and effective instruments in (some) member states. Second, as the Task Force report is the result of an interactive process involving a variety of stakeholders, it is able to point to the key differences in interpreting and applying WFD principles that have led to a lack of policy coherence across the EU and to offer some pragmatic advice on moving forward

    Developing Poverty Assessment Tools Based on Principal Component Analysis: Results from Bangladesh, Kazakhstan, Uganda, and Peru

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    Developing accurate, yet operational poverty assessment tools to target the poorest households remains a challenge for applied policy research. This paper aims to develop poverty assessment tools for four countries: Bangladesh, Peru, Uganda, and Kazakhstan. The research applies the Principal Component Analysis (PCA) to seek the best set of variables that predict the household poverty status using easily measurable socio-economic indicators. Out of sample validations tests are performed to assess the prediction power of a tool. Finally, the PCA results are compared with those obtained from regressions models. In-sample estimation results suggest that the Quantile regression technique is the first best method in all four countries, except Kazakhstan. The PCA method is the second best technique for two of the countries. In comparison with regression techniques, PCA models accurately predict a large percentage of households. With regard to out-of sample validations, there is no clear trend; neither the PCA method nor the Quantile regression consistently yields the most robust results. The results highlight the need to assess the out-of-sample performance and thereby the robustness of a poverty assessment tool in estimating the poverty status of a new sample. We conclude that measures of relative poverty estimated with PCA method can yield fairly accurate, but not so robust predictions of absolute poverty as compared to more complex regression models.poverty assessment, targeting, principal component analysis, Bangladesh, Peru, Kazakhstan, Uganda, Food Security and Poverty, H5, Q14, I3,

    Cycle Accurate Energy and Throughput Estimation for Data Cache

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    Resource optimization in energy constrained real-time adaptive embedded systems highly depends on accurate energy and throughput estimates of processor peripherals. Such applications require lightweight, accurate mathematical models to profile energy and timing requirements on the go. This paper presents enhanced mathematical models for data cache energy and throughput estimation. The energy and throughput models were found to be within 95% accuracy of per instruction energy model of a processor, and a full system simulator?s timing model respectively. Furthermore, the possible application of these models in various scenarios is discussed in this paper

    Defending cache memory against cold-boot attacks boosted by power or EM radiation analysis

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    Some algorithms running with compromised data select cache memory as a type of secure memory where data is confined and not transferred to main memory. However, cold-boot attacks that target cache memories exploit the data remanence. Thus, a sudden power shutdown may not delete data entirely, giving the opportunity to steal data. The biggest challenge for any technique aiming to secure the cache memory is performance penalty. Techniques based on data scrambling have demonstrated that security can be improved with a limited reduction in performance. However, they still cannot resist side-channel attacks like power or electromagnetic analysis. This paper presents a review of known attacks on memories and countermeasures proposed so far and an improved scrambling technique named random masking interleaved scrambling technique (RM-ISTe). This method is designed to protect the cache memory against cold-boot attacks, even if these are boosted by side-channel techniques like power or electromagnetic analysis.Postprint (author's final draft

    Data Cache-Energy and Throughput Models: Design Exploration for Embedded Processors

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    Most modern 16-bit and 32-bit embedded processors contain cache memories to further increase instruction throughput of the device. Embedded processors that contain cache memories open an opportunity for the low-power research community to model the impact of cache energy consumption and throughput gains. For optimal cache memory configuration mathematical models have been proposed in the past. Most of these models are complex enough to be adapted for modern applications like run-time cache reconfiguration. This paper improves and validates previously proposed energy and throughput models for a data cache, which could be used for overhead analysis for various cache types with relatively small amount of inputs. These models analyze the energy and throughput of a data cache on an application basis, thus providing the hardware and software designer with the feedback vital to tune the cache or application for a given energy budget. The models are suitable for use at design time in the cache optimization process for embedded processors considering time and energy overhead or could be employed at runtime for reconfigurable architectures
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