7,504 research outputs found

    Emerging Technologies - NanoMagnets Logic (NML)

    Get PDF
    In the last decades CMOS technology has ruled the electronic scenario thanks to the constant scaling of transistor sizes. With the reduction of transistor sizes circuit area decreases, clock frequency increases and power consumption decreases accordingly. However CMOS scaling is now approaching its physical limits and many believe that CMOS technology will not be able to reach the end of the Roadmap. This is mainly due to increasing difficulties in the fabrication process, that is becoming very expensive, and to the unavoidable impact of leakage losses, particularly thanks to gate tunnel current. In this scenario many alternative technologies are studied to overcome the limitations of CMOS transistors. Among these possibilities, magnetic based technologies, like NanoMagnet Logic (NML) are among the most interesting. The reason of this interest lies in their magnetic nature, that opens up entire new possibilities in the design of logic circuits, like the possibility to mix logic and memory in the same device. Moreover they have no standby power consumption and potentially a much lower power consumption of CMOS transistors. In literature NML logic is well studied and theoretical and experimental proofs of concept were already found. However two important points are not enough considered in the analysis approach followed by most of the work in literature. First of all, no complex circuits are analyzed. NML logic is very different from CMOS technologies, so to completely understand the potential of this technology it is mandatory to investigate complex architectures. Secondly, most of the solutions proposed do not take into account the constraints derived from fabrication process, making them unrealistic and difficult to be fabricated experimentally. This thesis focuses therefore on NML logic keeping into account these two important limitations in the research approach followed in literature. The aim is to obtain a complete and accurate overview of NML logic, finding realistic circuital solutions and trying to improve at the same time their performance. After a brief and complete introduction (Chapter 1), the thesis is divided in two parts, which cover the two fundamental points followed in this three years of research: A circuits architecture analysis and a technological analysis. In the architecture analysis first an innovative VHDL model is described in Chapter 2. This model is extensively used in the analysis because it allows fast simulation of complex circuits, with, at the same time, the possibility to estimate circuit per- formance, like area and power consumption. In Chapter 3 the problem of signals synchronization in complex NML circuits is analyzed and solved, using as benchmark a simple but complete NML microprocessor. Different solutions based on asynchronous logic are studied and a new asynchronous solution, specifically designed to exploit the potential of NML logic, is developed. In Chapter 4 the layout of NML circuits is studied on a more physical level, considering the limitations of fabrication processes. The layout of NML circuits is therefore changed accordingly to these constraints. Secondly CMOS circuits architectures are compared to more simple architectures, evaluating therefore which one is more suited for NML logic. Finally the problem of interconnections in NML technology is analyzed and solutions to improve it are found. In Chapter 5 the problem of feedback signals in heavy pipelined technologies, like NML, is studied. Solutions to improve performances and synchronize signals are developed. Systolic arrays are then analyzed as possible candidate to exploit NML potential. Finally in Chapter 6 ToPoliNano, a simulator dedicated to NML and other emerging technologies, that we are developing, is described. This simulator allows to follow the same top-down approach followed for CMOS technology. The layout generator and the simulation engine are detailed described. In the first chapter of the technological analysis (Chapter 7), the performance of NML logic is explored throughout low level simulations. The aim is to understand if these circuits can be fabricated with optical lithography, allowing therefore the commercial development of NML logic. Basic logic gates and the clock system are there analyzed from a low level perspective. In Chapter 8 an innovative electric clock system for NML technology is shown and the first experimental results are reported. This clock system allows to achieve true low power for NML technology, obtaining a reduction of power consumption of 20 times considering the best CMOS transistors available. This power consumption takes into account all the losses, also the clock system losses. Moreover the solution presented can be fabricated with current technological processes. The research work behind this thesis represents an important breakthrough in NML logic. The solutions here presented allow the design and fabrication of complex NML circuits, considering the particular characteristics of this technology and considerably improving the performance. Moreover the technological solutions here presented allow the design and fabrication of circuits with available fabrication process with a considerable advantage over CMOS in terms of power consumption. This thesis represents therefore a considerable step froward in the study and development of NML technolog

    Energy Management Systems For Smart Active Residential Buildings

    Get PDF

    Protection and Control of Active Distribution Networks and Microgrids

    Get PDF
    This thesis is mainly focused on (i) modeling and control of Electronically Coupled Distributed Energy Resources (EC-DERs) under severe network imbalances and transient incidents, and (ii) protection of active distribution networks and microgrids against different types of faults. In the first part, an enhanced control strategy is proposed to improve the performance of EC-DERs under faults and transient disturbances, in a multi-unit microgrid setting. With the use of proposed control strategy, the host microgrid can ride through network faults, irrespective of whether they take place within the microgrid jurisdiction or impact the upstream grid, and quickly reclaim its pre-fault operating conditions to improve post-fault recovery. Further, the proposed control scheme enables the host microgrid to retain its power quality for the duration of the faults, in both modes of operation, which is a desirable property for detection of certain classes of faults, as well as for sensitive loads. In the second part of the thesis, appropriate strategies are proposed for protection of low- and medium-voltage microgrids in the islanded mode as well as the grid-connected mode of operation. The proposed protection strategies aim to detect and isolate the faults that impact the microgrid, in a selective manner. The proposed strategies can be implemented through programmable microprocessor-based relays which are commercially available; hence, the structure of new relays that enable the proposed protection strategies are also discussed in the thesis. In addition, the thesis investigates the operation of an existing distribution network as a microgrid. Thus, practical control and protection strategies that enable off-grid operation of the distribution network (considering the system constraints) are discussed. The effectiveness of the proposed control and protection strategies are demonstrated through time-domain simulation studies conducted in the PSCAD/EMTDC software environment

    Demonstration of visualization techniques for the control room engineer in 2030.:ELECTRA Deliverable D8.1. WP8: Future Control Room Functionality

    Get PDF
    Deliverable 8.1 reports results on analytics and visualizations of real time flexibility in support of voltage and frequency control in 2030+ power system. The investigation is carried out by means of relevant control room scenarios in order to derive the appropriate analytics needed for each specific network event

    Efficacy of Smart PV Inverter as a Strategic Mitigator of Network Harmonic Resonance and a Suppressor of Temporary Overvoltage Phenomenon in Distribution Systems

    Get PDF
    The research work explores the design of Smart PV inverters in terms of modelling and investigates the efficacy of a Smart PV inverter as a strategic mitigator of network harmonic resonance phenomenon and a suppressor of Temporary Overvoltage (TOV) in distribution systems. The new application and the control strategy of Smart PV inverters can also be extended to SmartPark-Plug in Electric Vehicles as the grid becomes smarter. As the grid is becoming smarter, more challenges are encountered with the integration of PV plants in distribution systems. Smart PV inverters nowadays are equipped with specialized controllers for exchanging reactive power with the grid based on the available capacity of the inverter, after the real power generation. Although present investigators are researching on several applications of Smart PV inverters, none of the research-work in real time and in documentation have addressed the benefits of employing Smart PV inverters to mitigate network resonances. U.S based standard IEEE 519 for power quality describes the network resonance as a major contributor that has an impact on the harmonic levels. This dissertation proposes a new application for the first time in utilizing a Smart PV inverter to act as a virtual detuner in mitigating network resonance. As a part of the Smart PV inverter design, the LCL filter plays a vital role on network harmonic resonance and further has a direct impact on the stability of the controller and rest of the distribution system. Temporary Overvoltage (TOV) phenomenon is more pronounced especially during unbalanced faults like single line to ground faults (SLGF) in the presence of PV. Such an abnormal incident can damage the customer loads. IEEE 142-“Effective grounding” technique is employed to design the grounding scheme for synchronous based generators. The utilities have been trying to make a PV system comply with IEEE 142 standard as well. Several utilities are still employing the same grounding schemes even now. The attempt has resulted in diminishing the efficacy of protection schemes. Further, millions of dollars and power has been wasted by the utilities. As a result, the concept of effective grounding for PV system has become a challenge when utilities try to mitigate TOV. With an intention of economical aspects in distribution systems planning, this dissertation also proposes a new application and a novel control scheme for utilizing Smart PV/Smart Park inverters to mitigate TOV in distribution systems for the first time. In other words, this novel application can serve as an effective and supporting schema towards ineffective grounding systems. PSCAD/EMTDC has been used throughout the course of research. The idea of Smart inverters serving as a virtual detuner in mitigating network harmonic resonance and as a TOV suppressor in distribution systems has been devised based on the basic principle of VAR injection and absorption with a new control strategy respectively. This research would further serve as a pioneering approach for researchers and planning engineers working in distribution systems

    A Multi-layer Fpga Framework Supporting Autonomous Runtime Partial Reconfiguration

    Get PDF
    Partial reconfiguration is a unique capability provided by several Field Programmable Gate Array (FPGA) vendors recently, which involves altering part of the programmed design within an SRAM-based FPGA at run-time. In this dissertation, a Multilayer Runtime Reconfiguration Architecture (MRRA) is developed, evaluated, and refined for Autonomous Runtime Partial Reconfiguration of FPGA devices. Under the proposed MRRA paradigm, FPGA configurations can be manipulated at runtime using on-chip resources. Operations are partitioned into Logic, Translation, and Reconfiguration layers along with a standardized set of Application Programming Interfaces (APIs). At each level, resource details are encapsulated and managed for efficiency and portability during operation. An MRRA mapping theory is developed to link the general logic function and area allocation information to the device related physical configuration level data by using mathematical data structure and physical constraints. In certain scenarios, configuration bit stream data can be read and modified directly for fast operations, relying on the use of similar logic functions and common interconnection resources for communication. A corresponding logic control flow is also developed to make the entire process autonomous. Several prototype MRRA systems are developed on a Xilinx Virtex II Pro platform. The Virtex II Pro on-chip PowerPC core and block RAM are employed to manage control operations while multiple physical interfaces establish and supplement autonomous reconfiguration capabilities. Area, speed and power optimization techniques are developed based on the developed Xilinx prototype. Evaluations and analysis of these prototype and techniques are performed on a number of benchmark and hashing algorithm case studies. The results indicate that based on a variety of test benches, up to 70% reduction in the resource utilization, up to 50% improvement in power consumption, and up to 10 times increase in run-time performance are achieved using the developed architecture and approaches compared with Xilinx baseline reconfiguration flow. Finally, a Genetic Algorithm (GA) for a FPGA fault tolerance case study is evaluated as a ultimate high-level application running on this architecture. It demonstrated that this is a hardware and software infrastructure that enables an FPGA to dynamically reconfigure itself efficiently under the control of a soft microprocessor core that is instantiated within the FPGA fabric. Such a system contributes to the observed benefits of intelligent control, fast reconfiguration, and low overhead

    Advanced Primary Controllers for Inverter Based Power Sources: Microgrids and Wind Power Plants

    Get PDF
    The aim of this doctoral thesis is to present the research activity fulfilled during the Ph.D. studies. The research project of the candidate was focused on two main cores. The first core is centred in the microgrid area; in particular in islanded microgrid modelling and control. Firstly, the model was compared with experimental results collected in some facilities available at University of Genoa. Then traditional controllers for islanded microgrid are analysed and explored, proposing a new stability estimation procedure for droop controlled microgrid. Finally, a new control strategy based on Model Predictive Control (MPC) is proposed in order to collect many functionalities in just one control layer. MPC is widely used in MG environment, but just for power and energy management at tertiary level; instead here it is here proposed with an inedited use. Some experimental validations about this new methodology are obtained during a research period in Serbia and Denmark. The second core is related with synthetic inertia for wind turbine connected to the main grid, i.e. frequency support during under-frequency transients. This aspect is very important today because it represents a way to increase grid stability in low inertia power systems. The importance of this feature is shared by all the most important Transmitter System Operators (TSO) all over the world

    Computational structures for application specific VLSI processors

    Get PDF
    • 

    corecore