2 research outputs found
CarRing IV- Real-time Computer Network
Ob in der Automobil-, Avionik- oder Automatisierungstechnik, die Fortschritte in der
Echtzeitkommunikation richten sich auf weitere Verbesserungen bereits existierender
Lösungen. Im Kfz-Bereich führen die steigenden Zahlen computerbasierter Systeme,
Anwendungen und Anschlüsse sowie die Verwendung mehrerer proprietärer Kommunikationsstandards zu einem immer komplexeren Kabelbaum. Ursächlich hierfür sind
inkompatible Standards, wodurch nicht nur die Kosten, sondern auch das Gewicht
und damit der Kraftstoffverbrauch negativ beeinflusst werden.
Im ersten Teil der Dissertation wird das Echtzeitprotokoll von CarRing IV (CRIV) vorgestellt. Es bietet isochrone und harte Echtzeitgarantien, ohne dass eine netzwerkweite Synchronisation erforderlich ist. Mit bis zu 16 Knoten pro Ring kann
ein CR-IV-Netz aus bis zu 256 Ringen bestehen, die durch Router miteinander verbunden sind. CR-IV verwendet ein reduziertes OSI-Modell (Schichten 1-3, 7), das
fĂĽr seine Anwendungsbereiche sowohl typisch als auch vorteilhaft ist. AuĂźerdem
unterstĂĽtzt es sowohl ereignis- als auch zeitgesteuerte Kommunikationsparadigmen.
Der Transparent-Modus ermöglicht es CR-IV, als Backbone für bestehende Netze
zu verwenden, wodurch Inkompatibilitätsprobleme beseitigt werden und der Wechsel zu einer einheitlicheren Netzlösung erleichtert wird. Mit dieser Funktionalität
können Nutzergeräte über ein CR-IV-Netz miteinander verbunden werden, ohne dass
der Nutzer eingreifen oder etwas ändern muss. Durch Multicast unterstützt CRIV auch die Emulation von Feldbussen. Der zweite Teil der Dissertation stellt den
anderen wichtigen Aspekt von CR-IV vor. Alle Schichten des OSI-Modells sind in
einem FPGA mit Hardware Description Languages (HDLs) ohne Hard- oder Softprozessoren implementiert. Das Register-Transfer-Level (RTL)-Hardwaredesign von
CR-IV wird mit einem neuen Ansatz erstellt, der am besten als tokenbasierter Datenfluss beschrieben werden kann. Der Ansatz ist sowohl vertikal als auch horizontal
skalierbar. Er verwendet lose gekoppelte Processing Elements (PEs), die stateless arbeiten, sowie Arbiter/Speicherzuordnungspaare. Durch die granulare Kontrolle und
die Aufteilung aller Aspekte einer Lösung eignet sich der Ansatz für die Implementierung anderer Software-Level-Lösungen in Hardware.
Viele Testszenarios werden durchgefĂĽhrt, um die in CR-IV erzielten Ergebnisse zu
verdeutlichen und zu überprüfen. Diese Szenarien reichen von direkten Leistungsmessungen bis hin zu verhaltensspezifischen Tests. Zusätzlich wird eine Labor-Demo
erstellt, die grundsätzlich auf ein Proof of Concept zielt. Die Demo stellt einen
praktischen Test anstelle szenariospezifischer Tests dar. Alle Testszenarien und die
Labor-Demo werden mit den Prototyp-Boards des Projekts durchgef¨uhrt, d.h. es sind
keine Simulationstests. Die Ergebnisse stellen die realistischen Leistungen von CR-IV
mit bis zu 13,61 Gbit/s dar.Whether be it automotive, avionics or automation, advances in their respective real-time communication technology focus on further improving preexisting solutions. For
in-vehicle communication, the ever-increasing number of computer-based systems,
applications and connections as well as the use of multiple proprietary communication
standards results in an increasingly complex wiring harness. This is in-part due to
those standards being incompatible with one another. In addition to cost, this also
impacts weight, which in turn affects fuel consumption.
The work presented in this thesis is in-part theoretical and in-part applied. The
former is represented by a new protocol, while the latter corresponds to the protocol’s
hardware implementation. In the first part of the thesis, the real-time communication protocol of CarRing IV (CR-IV) is presented. It provides isochronous and hard
real-time guarantees without requiring network-wide clock synchronization. With up
to 16 nodes per ring, a CR-IV network can consist of as many as 256 rings interconnected by routers. CR-IV uses a reduced OSI model (layers 1-3, 7), which is both
typical of and preferable for its application areas. Moreover, it supports both event- and time-triggered communication paradigms. The transparent mode feature allows
CR-IV to act as a backbone for existing networks, thereby addressing incompatibility
concerns and easing the transition into a more unified network solution. Using this
feature, user devices can communicate with one another via a CR-IV network without
requiring user interference, or any user device or application changes. Combined with
the protocol’s reliable multicast, the feature extends CR-IV’s capabilities to include
field bus emulation. The second part of the thesis presents the other important aspect
of CR-IV. All of its OSI model layers are implemented in a FPGA using Hardware
Description Languages (HDLs) without relying-on or including any hard or soft processors. CR-IV’s Register-Transfer Level (RTL) hardware design is created using a new
approach that can best be described as token-based data-flow. The approach is both
vertically and horizontally scalable. It uses stateless and loosely coupled Processing
Elements (PEs) as well as arbiter/memory allocation pairs. By having granular control and compartmentalizing every aspect of a solution, the approach lends itself to
being used for implementing other software-level solutions in hardware.
Many test scenarios are conducted to both highlight and examine the results
achieved in CR-IV. Those scenarios range from direct performance measurements to
behavior-specific tests. Moreover, a lab-demo is created that essentially amounts to
a proof of concept. The demo represents a practical test as opposed to a scenariospecific one. Whether be it test scenarios or the lab-demo, all are carried-out using the
project’s prototype boards, i.e. no simulation tests. The results obtained represent
CR-IV’s real-world realistic outcomes with up to 13.61 Gbps
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Transmission capacity improvement for high speed multimode waveguide links using advanced optical launch and multilevel modulation schemes
This dissertation investigates the potential technologies in both optical and electrical domains for transmission capacity improvement in multimode waveguide links.
The first half of the dissertation focuses on the multimode waveguide made from glass, the multimode glass fibre. A new optical launch scheme is developed, namely low-loss Hermite-Gaussian launch, to achieve single mode group excitation in the multimode glass fibre. Novel implementations using elliptical Gaussian beam and square-shaped launching profiles are developed, achieving a coupling loss at least 2.5 dB lower than the previously reported line launch scheme. Theoretical calculations show that these launches provide 50% bandwidth-distance product improvement over the dual launch scheme for a 99% yield of the entire OM1 fibre installed base. It is also found experimentally that the low-loss Hermite-Gaussian launches outperform dual launch for fibres favouring either centre launch or offset launch. Misalignment tolerance measurements reveal that the bandwidth improvements over a perfectly aligned centre launch using these launches are maintained within a radial offset range of ≤ 8 μm. Error free transmissions at 10 Gbit/s are demonstrated for different orders of low-loss Hermite-Gaussian launches over 250 m worst case OM1 fibre without the use of equalisation.
The second half of the dissertation concentrates on another type of multimode waveguide which is made from plastic, namely step-index plastic optical fibre (SI-POF). Both baseband and passband multilevel modulation schemes are investigated to provide over gigabit/s transmissions using LEDs. For the first time, fractionally-spaced equalisers are thoroughly examined in multilevel modulation systems for LED-based SI-POF links. Based on the link budget analysis, it is found that PAM-8 and CAP-64 are the best baseband and passband solutions respectively. For 25 m links, calculations show that PAM-8 and CAP-64 can achieve data rate up to 3 Gbit/s with system margins of 2.2 dB and 1.3 dB. Meanwhile for 50 m links, they achieve data rate up to 1.5 Gbit/s with system margins of 1.9 dB and 1.2 dB respectively. A new FPGA system is developed to experimentally evaluate the PAM-8 and CAP-64 schemes. Error free transmissions are achieved at 3 Gbit/s using PAM-8 for 25 m SI-POF and 1.5 Gbit/s using CAP-64 for 50 m SI-POF. These results record the highest bit-rate-distance-product achieved in LED-based SI-POF links without the use of forward error correction