A Versatile Hermetically Sealed Microelectronic Implant for Peripheral Nerve Stimulation Applications

This article presents a versatile neurostimulation platform featuring a fully implantable multi-channel neural stimulator for chronic experimental studies with freely moving large animal models involving peripheral nerves. The implant is hermetically sealed in a ceramic enclosure and encapsulated in medical grade silicone rubber, and then underwent active tests at accelerated aging conditions at 100°C for 15 consecutive days. The stimulator microelectronics are implemented in a 0.6-μm CMOS technology, with a crosstalk reduction scheme to minimize cross-channel interference, and high-speed power and data telemetry for battery-less operation. A wearable transmitter equipped with a Bluetooth Low Energy radio link, and a custom graphical user interface provide real-time, remotely controlled stimulation. Three parallel stimulators provide independent stimulation on three channels, where each stimulator supports six stimulating sites and two return sites through multiplexing, hence the implant can facilitate stimulation at up to 36 different electrode pairs. The design of the electronics, method of hermetic packaging and electrical performance as well as in vitro testing with electrodes in saline are presented

A vestibular prosthesis with highly-isolated parallel multichannel stimulation.

This paper presents an implantable vestibular stimulation system capable of providing high flexibility independent parallel stimulation to the semicircular canals in the inner ear for restoring three-dimensional sensation of head movements. To minimize channel interaction during parallel stimulation, the system is implemented with a power isolation method for crosstalk reduction. Experimental results demonstrate that, with this method, electrodes for different stimulation channels located in close proximity ( mm) can deliver current pulses simultaneously with minimum inter-channel crosstalk. The design features a memory-based scheme that manages stimulation to the three canals in parallel. A vestibular evoked potential (VEP) recording unit is included for closed-loop adaptive stimulation control. The main components of the prototype vestibular prosthesis are three ASICs, all implemented in a 0.6- μm high-voltage CMOS technology. The measured performance was verified using vestibular electrodes in vitro

An integrated bidirectional multi-channel opto-electro arbitrary waveform stimulator for treating motor neurone disease

This paper presents a prototype integrated bidirectional stimulator ASIC capable of mixed opto-electro stimulation and electrophysiological signal recording. The development is part of the research into a fully implantable device for treating motor neurone disease using optogenetics and stem cell technology. The ASIC consists of 4 stimulator units, each featuring 16-channel optical and electrical stimulation using arbitrary current waveforms with an amplitude up to 16 mA and a frequency from 1.5 Hz to 50 kHz, and a recording front-end with a programmable bandwidth of 1 Hz to 4 kHz, and a programmable amplifier gain up to 74 dB. The ASIC was implemented in a 0.18μm CMOS technology. Simulated performance in stimulation and recording is presented

An Integrated Passive Phase-Shift Keying Modulator for Biomedical Implants With Power Telemetry Over a Single Inductive Link

This paper presents a passive phase-shift keying (PPSK) modulator for uplink data transmission for biomedical implants with simultaneous power and data transmission over a single 13.56 MHz inductive link. The PPSK modulator provides a data rate up to 1.35 Mbps with a modulation index between 3% and 38% for a variation of the coupling coefficient between 0.05 and 0.26. This modulation scheme is particularly suited for biomedical implants that have high power demand and low coupling coefficients. The PPSK modulator operates in conjunction with on-off-keying downlink communication. The same inductive link is used to provide up to 100 mW of power to a multi-channel stimulator. The majority of the system on the implant side was implemented as an application specific integrated circuit (ASIC), fabricated in 0.6-[Formula: see text] high voltage CMOS technology. The theory of PPSK modulation, simulated and measured performance evaluation, and comparison with other state-of-the-art impedance modulation techniques is presented. The measured bit error rate around critical coupling at 1.35 Mbps is below 6 ×10(-8)

Advances in Scalable Implantable Systems for Neurostimulation Using Networked ASICs

Neurostimulation is a known method for restoring lost functions to neurologically impaired patients. This paper describes recent advances in scalable implantable stimulation systems using networked application specific integrated circuits (ASICs). It discusses how they can meet the ever-growing demand for high-density neural interfacing and long-term reliability. A detailed design example of an implantable (inductively linked) scalable stimulation system for restoring lower limb functions in paraplegics after spinal cord injury is presented. It comprises a central hub implanted at the costal margin and multiple Active Books which provide the interface for stimulating nerve roots in the cauda equina. A 16-channel stimulation system using four Active Books is demonstrated. Each Active Book has an embedded ASIC, which is responsible for initiating stimulus current to the electrodes. It also ensures device safety by monitoring temperature, humidity, and peak electrode voltage during stimulation. The implant hub was implemented using a microcontroller-based circuit. The ASIC in the Active Book was fabricated using XFAB’s 0.6-µm high-voltage CMOS process. The stimulation system does not require an accurate reference clock in the implant. Measured results are provided

A Multichannel High-Frequency Power-Isolated Neural Stimulator With Crosstalk Reduction

In neuroprostheses applications requiring simultaneous stimulations on a multielectrode array, electric crosstalk, the spatial interaction between electric fields from various electrodes is a major limitation to the performance of multichannel stimulation. This paper presents a multichannel stimulator design that combines high-frequency current stimulation (using biphasic charge-balanced chopped pulse profile) with a switched-capacitor power isolation method. The approach minimizes crosstalk and is particularly suitable for fully integrated realization. A stimulator fabricated in a 0.6 & #x03BC;m CMOS high-voltage technology is presented. It is used to implement a multichannel, high-frequency, power-isolated stimulator. Crosstalk reduction is demonstrated with electrodes in physiological media while the efficacy of the high-frequency stimulator chip is proven in vivo. The stimulator provides fully independent operation on multiple channels and full flexibility in the design of neural modulation protocols

A power efficient time-to-current stimulator for vagal-cardiac connection after heart transplantation

This paper presents a stimulator for a cardiac neuroprosthesis aiming to restore the parasympathetic control after heart transplantation. The stimulator is based on time-to-current conversion, instead of the conventional current mode digital-to-analog converter (DAC) that drives the output current mirrors. It uses a DAC based on capacitor charging to drive a power efficient voltage-to-current converter for output. The stimulator uses 1.8 V for system operation and 10 V for stimulation. The total power consumption is Istim × 10 V +18. u μW during the biphasic current output, with a maximum Istim of 512 μA. The stimulator was designed in CMOS 0.18 μm technology and post-layout simulations are presented

Advances in Microelectronics for Implantable Medical Devices

Implantable medical devices provide therapy to treat numerous health conditions as well as monitoring and diagnosis. Over the years, the development of these devices has seen remarkable progress thanks to tremendous advances in microelectronics, electrode technology, packaging and signal processing techniques. Many of today’s implantable devices use wireless technology to supply power and provide communication. There are many challenges when creating an implantable device. Issues such as reliable and fast bidirectional data communication, efficient power delivery to the implantable circuits, low noise and low power for the recording part of the system, and delivery of safe stimulation to avoid tissue and electrode damage are some of the challenges faced by the microelectronics circuit designer. This paper provides a review of advances in microelectronics over the last decade or so for implantable medical devices and systems. The focus is on neural recording and stimulation circuits suitable for fabrication in modern silicon process technologies and biotelemetry methods for power and data transfer, with particular emphasis on methods employing radio frequency inductive coupling. The paper concludes by highlighting some of the issues that will drive future research in the field

A Multi-Channel Stimulator With High-Resolution Time-to-Current Conversion for Vagal-Cardiac Neuromodulation

This paper presents an integrated stimulator for a cardiac neuroprosthesis aiming to restore the parasympathetic control after heart transplantation. The stimulator is based on time-to-current conversion. Instead of the conventional current mode digital-to-analog converter (DAC) that uses ten of microamp for biasing, the proposed design uses a novel capacitor time-based DAC offering close to 10 bit of current amplitude resolution while using only a bias current 250 nA. The stimulator chip was design in a 0.18 m CMOS high-voltage (HV) technology. It consists of 16 independent channels, each capable of delivering 550 A stimulus current under a HV output stage that can be operated up to 30 V. Featuring both power efficiency and high-resolution current amplitude stimulation, the design is suitable for multi-channel neural simulation applications

An ASIC for Recording and Stimulation in Stacked Microchannel Neural Interfaces

This paper presents an active microchannel neural interface (MNI) using seven stacked application specific integrated circuits (ASIC). The approach provides a solution to the present problem of interconnect density in 3-dimensional MNIs. The 4 mm2 ASIC is implemented in 0.35 μm high-voltage CMOS technology. Each ASIC is the base for seven microchannels each with three electrodes in a pseudo-tripolar arrangement. Multiplexing allows stimulating or recording from any one of 49 channels, across 7 ASICs. Connections to the ASICs are made with a 5-line parallel bus. Current controlled biphasic stimulation from 5 μA to 500 μA has been demonstrated with switching between channels and ASICs. The high-voltage technology gives a compliance of 40 V for stimulation, appropriate for the high impedances within microchannels. High frequency biphasic stimulation, up to 40 kHz is achieved, suitable for reversible high frequency nerve blocks. Recording has been demonstrated with mV level signals; common-mode inputs are differentially distorted and limit the CMRR to 40dB. The ASIC has been used in vitro in conjunction with an oversize (2 mm diameter) microchannel in phosphate buffered saline, demonstrating attenuation of interference from outside the microchannel and tripolar recording of signals from within the microchannel. By using 5-lines for 49 active microchannels the device overcomes limitations with connecting many electrodes in a 3-dimensional miniaturised nerve interface