1,738 research outputs found

    An Advanced Three-Level Active Neutral-Point-Clamped Converter With Improved Fault-Tolerant Capabilities

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    A resilient fault-tolerant silicon carbide (SiC) three-level power converter topology is introduced based on the traditional active neutral-point-clamped converter. This novel converter topology incorporates a redundant leg to provide fault tolerance during switch open-circuit faults and short-circuit faults. Additionally, the topology is capable of maintaining full output voltage and maximum modulation index in the presence of switch open and short-circuit faults. Moreover, the redundant leg can be employed to share load current with other phase legs to balance thermal stress among semiconductor switches during normal operation. A 25-kW prototype of the novel topology was designed and constructed utilizing 1.2-kV SiC metal-oxide-semiconductor field-effect transistors. Experimental results confirm the anticipated theoretical capabilities of this new three-level converter topology

    Open-circuit fault resilient ability multi level inverter with reduced switch count for off grid applications

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    In a multi-level inverter (MLI), the switching component number effect on volume and reliability is a major concern in on-grid and off-grid applications. The recent trend in MLI, reduced component number of power switches, and capacitors in multi-level inverter topologies have been driven for power conversion. The concept of fault tolerance is not considered in many such configurations; due to this the reliability of the MLI is very low. So now it is a major research concern, to develop a strong fault resilient ability power electronic converter. In this work, a novel configuration of a multilevel inverter with a lower switch count is proposed and analyzed with fault tolerance operation for improvement of reliability. Generally, the fault-tolerant operation is analyzed in only any one of the switches in MLI. But the proposed topology is concerned with multiple switch fault tolerance. Further, the phase disposition pulse width modulation (PDPWM) control scheme is utilized for the operation of the proposed inverter topology. The proposed inverter topology is simulated in MATLAB/Simulink environment under normal and faulty condition; the results are obtained and validated

    Investigations of New Fault-Tolerant Methods for Multilevel Inverters

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    The demands of power electronics with high power capability have increased in the last decades. These needs have driven the expansion of existing power electronics topologies and developing new power electronics generations. Multilevel inverters (MLI) are one of the most promising power electronics circuits that have been implemented and commercialized in high-voltage direct current (HVDC), motor drives, and battery energy storage systems (BESS). The expanding uses of the MLI have lead to creation of new topologies for different applications. However, one of the disadvantages of using MLIs is their complexity. MLIs consist of a large number of switching devices, which can result in a reduction of system reliability. There are significant challenges to the design of a reliable system that has the MLI’s capability with integrated fault-tolerance. In other words, design a system that can handle the fault, totally or partially, while maintaining high power capabilities and efficiency. This aim of this dissertation is to investigate the fault-tolerance of MLIs from two different points of view: 1- Develop new solutions for existing MLI topologies. In other words, add some features to existing MLIs to improve their reliability when a fault occurs. 2- Design new MLIs that have a fault-tolerant capability. A new open-circuit fault detection is proposed in this dissertation. The new fault detection method is based on monitoring the output voltage of each cell and leg voltage polarity along with each switch state. By monitoring each cell output voltage and leg voltage, the faulty cell can be detected and isolated. A novel circuit to maintain system operation under the condition of one (or more) components suffering from a faulted condition is also proposed in this dissertation. This results in a topology that continues to operate at full capability. Additionally, a new topology is proposed that offers reducing the number of batteries by 50%. Also, it has the ability to operate under non-unity power factor, which enables it to be suitable for battery energy storage systems, and static compensator (STATCOM) applications. Another novel hybrid cascaded H-bridge (CHB), known as the X-CHB, for a fault-tolerant operation is proposed in this dissertation. It ensures seamless operation of the system under an open/short circuit switching fault or dc supply fault

    Switching-Cell Arrays - An Alternative Design Approach in Power Conversion

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    © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other worksThe conventional design of voltage-source power converters is based on a two-level half-bridge configuration and the selection of power devices designed to meet the full application specifications (voltage, current, etc.). This leads to the need to design and optimize a large number of different devices and their ancillary circuitry and prevents taking advantage from scale economies. This paper proposes a paradigm shift in the design of power converters through the use of a novel configurable device consisting on a matrix arrangement of highly-optimized switching cells at a single voltage class. Each switching cell consists of a controlled switch with antiparallel diode together with a self-powered gate driver. By properly interconnecting the switching cells, the switching cell array (SCA) can be configured as a multilevel active-clamped leg with different number of levels. Thus, the SCA presents adjustable voltage and current ratings, according to the selected configuration. For maximum compactness, the SCA can be conceived to be only configurable by the device manufacturer upon the customer needs. For minimum cost, it can also be conceived to be configurable by the customer, leading to field-configurable SCAs. Experimental results of a 6x3 field-configurable SCA are provided to illustrate and validate this design approach.Peer ReviewedPostprint (author's final draft

    Review of Five-Level Front-End Converters for Renewable Energy Applications

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    Provisional fileWith the objective of minimizing environment and energy issues, distributed renewable energy sources have reached remarkable advancements along the last decades, with special emphasis on wind and solar photovoltaic installations, which are deemed as the future of power generation in modern power systems. The integration of renewable energy sources into the power system requires the use of advanced power electronics converters, representing a challenge within the paradigm of smart grids, e.g., to improve efficiency, to obtain high power density, to guarantee fault-tolerance, to reduce the control complexity and to mitigate power quality problems. This paper presents a specific review about front-end converters for renewable energy applications (more specifically the power inverter that interfaces the renewable energy source with the power grid). It is important to note that the objective of this paper is not to cover all types of front-end converters; the focus is only on single-phase multilevel structures limited to five voltage levels, based on a voltage-source arrangement and allowing current or voltage feedback control. The established review is presented considering the following main classifications: (a) Number of passive and active power semiconductors; (b) Fault tolerance features; (c) Control complexity; (d) Requirements of specific passive components as capacitor or inductors; (e) Number of independent or split dc-link voltages. Throughout the paper, several specific five-level front-end topologies are presented and comparisons are made between them, highlighting the pros and cons of each one of them as a candidate for the interface of renewable energy sources with the power grid.Fundação para a Ciência e Tecnologia (FCT

    Fault diagnosis in a five-level multilevel inverter using an artificial neural network approach

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    Introduction. Cascaded H-bridge multilevel inverters (CHB-MLI) are becoming increasingly used in applications such as distribution systems, electrical traction systems, high voltage direct conversion systems, and many others. Despite the fact that multilevel inverters contain a large number of control switches, detecting a malfunction takes a significant amount of time. In the fault switch configurations diode included for freewheeling operation during open-fault condition. During short circuit fault conditions are carried out by the fuse, which can reveal the freewheeling current direction. The fault category can be identified independently and also failure of power switches harmed by the functioning and reliability of CHB-MLI. This paper investigates the effects and performance of open and short switching faults of multilevel inverters. Output voltage characteristics of 5 level MLI are frequently determined from distinctive switch faults with modulation index value of 0.85 is used during simulation analysis. In the simulation experiment for the modulation index value of 0.85, one second open and short circuit faults are created for the place of faulty switch. Fault is identified automatically by means of artificial neural network (ANN) technique using sinusoidal pulse width modulation based on distorted total harmonic distortion (THD) and managed by its own. The novelty of the proposed work consists of a fast Fourier transform (FFT) and ANN to identify faulty switch. Purpose. The proposed architecture is to identify faulty switch during open and short failures, which has to be reduced THD and make the system in reliable operation. Methods. The proposed topology is to be design and evaluate using MATLAB/Simulink platform. Results. Using the FFT and ANN approaches, the normal and faulty conditions of the MLI are explored, and the faulty switch is detected based on voltage changing patterns in the output. Practical value. The proposed topology has been very supportive for implementing non-conventional energy sources based multilevel inverter, which is connected to large demand in grid.Вступ. Каскадні багаторівневі інвертори H-bridge все частіше використовуються в таких пристроях, як розподільні системи, електричні тягові системи, системи прямого перетворення високої напруги та багато інших. Незважаючи на те, що багаторівневі інвертори містять велику кількість перемикачів, що управляють, виявлення несправності займає значний час. У конфігурації аварійного вимикача увімкнено діод для роботи в режимі вільного ходу в умовах обриву несправності. При короткому замиканні аварійні стани виконуються запобіжником, який може визначити напрямок струму вільного ходу. Категорія несправності може бути визначена самостійно, а також відмова силових вимикачів, що порушує функціонування та надійність каскадних багаторівневих інверторів H-bridge. У цій статті досліджуються наслідки та характеристики обривів та коротких замикань багаторівневих інверторів. Характеристики вихідної напруги 5-рівневого інвертору часто визначаються характерними несправностями перемикача, при цьому при аналізі моделювання використовується значення індексу модуляції 0,85. В імітаційному експерименті значення індексу модуляції 0,85 в місці несправного перемикача створюються односекундні обриви і коротке замикання. Несправність ідентифікується автоматично за допомогою методу штучної нейронної мережі з використанням синусоїдальної широтно-імпульсної модуляції на основі спотвореного повного гармонійного спотворення та керується самостійно. Новизна запропонованої роботи полягає у застосуванні швидкого перетворення Фур’є та штучної нейронної мережі для ідентифікації несправного перемикача. Мета. Пропонована архітектура призначена для виявлення несправного комутатора при розмиканні та короткочасних відмовах, що має знизити повне гармонійне спотворення та забезпечити надійну роботу системи. методи. Запропонована топологія має бути спроектована та оцінена з використанням платформи MATLAB/Simulink. Результати. Використовуючи підходи швидкого перетворення Фур’є та штучної нейронної мережі, досліджуються нормальні та несправні стани багаторівневих інверторів, і несправний перемикач виявляється на основі моделей зміни напруги на виході. Практична цінність. Запропонована топологія дуже сприятлива для реалізації нетрадиційних джерел енергії на основі багаторівневого інвертора, пов'язаного з великим попитом у мережі

    A Robust Multilevel Inverter Topology for Operation under Fault Conditions

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    Multilevel inverters (MLIs) are new demanding topologies that have low total harmonic distortion (THD) and low voltage stress across the switches make them ideal for medium and high-power applications. The authenticity of semiconductor devices is one of the main concerns for these MLIs to operate properly. With an increment in the number of switches in multilevel inverters, the pos-sibility of the fault also arises. Hence, a reliable 5- level inverter topology with fault-tolerant ability has been proposed. The proposed topology can withstand against of Open Circuit (OC) fault caused when any single switch fails. The proposed configuration is fault-tolerant and reliable as compared to the conventional multilevel inverters. Simulation of the proposed topology is done in MATLAB-Simulink and PLECS software packages, and the results obtained for normal (pre-fault), during the fault, and post-fault conditions are discussed. Experimental results also prove the proposed cell topology's robustness and effectiveness in tolerating OC faults across the switches. Furthermore, a thorough comparison is provided to demonstrate the superiority of the proposed topology in comparison to recently published topologies that have fault-tolerant featurespublishedVersio

    Advanced Silicon Carbide Based Fault-Tolerant Multilevel Converters

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    The number of safety-critical loads in electric power areas have been increasing drastically in the last two decades. These loads include the emerging more-electric aircraft (MEA), uninterruptible power supplies (UPS), high-power medical instruments, electric and hybrid electric vehicles (EV/HEV) and ships for military use, electric space rovers for space exploration and the like. This dissertation introduces two novel fault-tolerant three-level power converter topologies, named advanced three-level active neutral point clamped converter (A3L-ANPC) and advanced three-level active T-Type (A3L-ATT) converter. The goal of these converters is to increase the reliability of multilevel power converters used in safety-critical applications.These new fault-tolerant multilevel power converters are derived from the conventional ANPC and T-Type converter topologies. The topologies has significantly improved the fault-tolerant capability under any open circuit or certain short-circuit faults in the power semiconductor devices. In addition, under healthy conditions, the redundant phase leg can be utilized to share overload current with other main legs, which enhances the overload capability of the converter. The conduction losses in the power devices can be reduced by sharing the load current with the redundant leg. Moreover, unlike other existing fault-tolerant power converters in the literature, full output voltages can be always obtained during fault-tolerant operation. Experimental prototypes of both the A3L-ANPC and A3L-ATT converters were built based on Silicon Carbide (SiC) MOSFETs. Experimental results confirmed the anticipated performance of the novel three-level converter topologies.SiC MOSFET technology is at the forefront of significant advances in electric power conversion. SiC MOSFETs switch significantly faster than the conventional Silicon counterparts resulting in power converters with higher efficiency and increased switching frequencies. Low switching losses are one of the key characteristics of SiC technology. In this dissertation, hard and soft switching losses of a high power SiC MOSFET module are measured and characterized at different voltage and current operating points to determine the maximum operating frequency of the module. The purpose of characterizing the SiC MOSFET module is to determine the feasibility of very high frequency (200kHz-1MHz) power conversion which may not be possible to be implemented in the conventional Silicon based high power conversion. The results show that higher switching frequencies are achievable with soft switching techniques in high power converters
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