6,827 research outputs found

    A silicon model of auditory localization

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    The barn owl accurately localizes sounds in the azimuthal plane, using interaural time difference as a cue. The time-coding pathway in the owl's brainstem encodes a neural map of azimuth, by processing interaural timing information. We have built a silicon model of the time-coding pathway of the owl. The integrated circuit models the structure as well as the function of the pathway; most subcircuits in the chip have an anatomical correlate. The chip computes all outputs in real time, using analog, continuous-time processing

    Neuroelectronic interfacing with cultured multielectrode arrays toward a cultured probe

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    Efficient and selective electrical stimulation and recording of neural activity in peripheral, spinal, or central pathways requires multielectrode arrays at micrometer scale. ÂżCultured probeÂż devices are being developed, i.e., cell-cultured planar multielectrode arrays (MEAs). They may enhance efficiency and selectivity because neural cells have been grown over and around each electrode site as electrode-specific local networks. If, after implantation, collateral sprouts branch from a motor fiber (ventral horn area) and if they can be guided and contacted to each ÂżhostÂż network, a very selective and efficient interface will result. Four basic aspects of the design and development of a cultured probe, coated with rat cortical or dorsal root ganglion neurons, are described. First, the importance of optimization of the cell-electrode contact is presented. It turns out that impedance spectroscopy, and detailed modeling of the electrode-cell interface, is a very helpful technique, which shows whether a cell is covering an electrode and how strong the sealing is. Second, the dielectrophoretic trapping method directs cells efficiently to desired spots on the substrate, and cells remain viable after the treatment. The number of cells trapped is dependent on the electric field parameters and the occurrence of a secondary force, a fluid flow (as a result of field-induced heating). It was found that the viability of trapped cortical cells was not influenced by the electric field. Third, cells must adhere to the surface of the substrate and form networks, which are locally confined, to one electrode site. For that, chemical modification of the substrate and electrode areas with various coatings, such as polyethyleneimine (PEI) and fluorocarbon monolayers promotes or inhibits adhesion of cells. Finally, it is shown how PEI patterning, by a stamping technique, successfully guides outgrowth of collaterals from a neonatal rat lumbar spinal cord explant, after six days in cultur

    Nanoscale surface topography reshapes neuronal growth in culture

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    International audienceNeurons are sensitive to topographical cues provided either by in vivo or in vitro environments on the micrometric scale. We have explored the role of randomly distributed silicon nanopillars on primary hippocampal neurite elongation and axonal differentiation. We observed that neurons adhere on the upper part of nanopillars with a typical distance between adhesion points of about 500 nm. These neurons produce fewer neurites, elongate faster, and differentiate an axon earlier than those grown on flat silicon surfaces. Moreover, when confronted with a differential surface topography, neurons specify an axon preferentially on nanopillars. As a whole, these results highlight the influence of the physical environment in many aspects of neuronal growth

    Microdevices for studies of cultured neural networks

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    A cultured network has the advantages that the network is two-dimensional and easily observed, that the biochemical environment can be controlled, and that conventional electrodes as well as extracellular electrodes incorporated into the cultured substrate can be used to selectively stimulate and record from individual neurons in the network. It is possible to study small numbers of connected neurons, from a few to hundreds. This talk will describe two techniques, the multielectrode array and the silicon neurochip, and their application to long-term communication with a network by means of simultaneous recording or stimulation of many neurons

    DeSyRe: on-Demand System Reliability

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    The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fabrication technology scales down, chips are becoming less reliable, thereby incurring increased power and performance costs for fault tolerance. To make matters worse, power density is becoming a significant limiting factor in SoC design, in general. In the face of such changes in the technological landscape, current solutions for fault tolerance are expected to introduce excessive overheads in future systems. Moreover, attempting to design and manufacture a totally defect and fault-free system, would impact heavily, even prohibitively, the design, manufacturing, and testing costs, as well as the system performance and power consumption. In this context, DeSyRe delivers a new generation of systems that are reliable by design at well-balanced power, performance, and design costs. In our attempt to reduce the overheads of fault-tolerance, only a small fraction of the chip is built to be fault-free. This fault-free part is then employed to manage the remaining fault-prone resources of the SoC. The DeSyRe framework is applied to two medical systems with high safety requirements (measured using the IEC 61508 functional safety standard) and tight power and performance constraints

    Synthesis of neural networks for spatio-temporal spike pattern recognition and processing

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    The advent of large scale neural computational platforms has highlighted the lack of algorithms for synthesis of neural structures to perform predefined cognitive tasks. The Neural Engineering Framework offers one such synthesis, but it is most effective for a spike rate representation of neural information, and it requires a large number of neurons to implement simple functions. We describe a neural network synthesis method that generates synaptic connectivity for neurons which process time-encoded neural signals, and which makes very sparse use of neurons. The method allows the user to specify, arbitrarily, neuronal characteristics such as axonal and dendritic delays, and synaptic transfer functions, and then solves for the optimal input-output relationship using computed dendritic weights. The method may be used for batch or online learning and has an extremely fast optimization process. We demonstrate its use in generating a network to recognize speech which is sparsely encoded as spike times.Comment: In submission to Frontiers in Neuromorphic Engineerin
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