Four-element phased-array beamformers and a self-interference canceling full-duplex transciver in 130-nm SiGe for 5G applications at 26 GHz

This thesis is on the design of radio-frequency (RF) integrated front-end circuits for next generation 5G communication systems. The demand for higher data rates and lower latency in 5G networks can only be met using several new technologies including, but not limited to, mm-waves, massive-MIMO, and full-duplex. Use of mm-waves provides more bandwidth that is necessary for high data rates at the cost of increased attenuation in air. Massive-MIMO arrays are required to compensate for this increased path loss by providing beam steering and array gain. Furthermore, full duplex operation is desirable for improved spectrum efficiency and reduced latency. The difficulty of full duplex operation is the self-interference (SI) between transmit (TX) and receive (RX) paths. Conventional methods to suppress this interference utilize either bulky circulators, isolators, couplers or two separate antennas. These methods are not suitable for fully-integrated full-duplex massive-MIMO arrays. This thesis presents circuit and system level solutions to the issues summarized above, in the form of SiGe integrated circuits for 5G applications at 26 GHz. First, a full-duplex RF front-end architecture is proposed that is scalable to massive-MIMO arrays. It is based on blind, RF self-interference cancellation that is applicable to single/shared antenna front-ends. A high resolution RF vector modulator is developed, which is the key building block that empowers the full-duplex frontend architecture by achieving better than state-of-the-art 10-b monotonic phase control. This vector modulator is combined with linear-in-dB variable gain amplifiers and attenuators to realize a precision self-interference cancellation circuitry. Further, adaptive control of this SI canceler is made possible by including an on-chip low-power IQ downconverter. It correlates copies of transmitted and received signals and provides baseband/dc outputs that can be used to adaptively control the SI canceler. The solution comes at the cost of minimal additional circuitry, yet significantly eases linearity requirements of critical receiver blocks at RF/IF such as mixers and ADCs. Second, to complement the proposed full-duplex front-end architecture and to provide a more complete solution, high-performance beamformer ICs with 5-/6- b phase and 3-/4-b amplitude control capabilities are designed. Single-channel, separate transmitter and receiver beamformers are implemented targeting massive- MIMO mode of operation, and their four-channel versions are developed for phasedarray communication systems. Better than state-of-the-art noise performance is obtained in the RX beamformer channel, with a full-channel noise figure of 3.3 d

SiGe BiCMOS RF front-ends for adaptive wideband receivers

The pursuit of dense monolithic integration and higher operating speed continues to push the integrated circuit (IC) fabrication technologies to their limits. The increasing process variation, associated with aggressive technology scaling, is having a negative impact on circuit yield in current IC technologies, and the problem is likely to become worse in the future. Circuit solutions that are more tolerant of the process variations are needed to fully utilize the benefits of technology scaling. The primary goal of this research is to develop high-frequency circuits that can deliver consistent performance even under the threat of increasing process variation. These circuits can be used to build ``self-healing" systems, which can detect process imperfections and compensate accordingly to optimize performance. In addition to improving yield, such adaptive circuits and systems can provide more robust and efficient solutions for a wide range of applications under varying operational and environmental conditions.Silicon-germanium (SiGe) BiCMOS technology is an ideal platform for highly integrated systems requiring both high-performance analog and radio-frequency (RF) circuits as well as large-scale digital functionality. This research is focused on designing circuit components for a high-frequency wideband self-healing receiver in SiGe BiCMOS technology. An adaptive image-reject mixer, low insertion-loss switches, a wideband low-noise amplifier (LNA), and a SiGe complementary LC oscillator were designed. Healing algorithms were developed, and automated self-healing of multiple parameters of the mixer was demonstrated in measurement. A monte-carlo simulation based methodology was developed to verify the effectiveness of the healing procedure. In summary, this research developed circuits, algorithms, simulation tools, and methods that are useful for building "self-healing" systems.Ph.D

A Fully-Integrated Reconfigurable Dual-Band Transceiver for Short Range Wireless Communications in 180 nm CMOS

© 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other users, including reprinting/ republishing this material for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works.A fully-integrated reconfigurable dual-band (760-960 MHz and 2.4-2.5 GHz) transceiver (TRX) for short range wireless communications is presented. The TRX consists of two individually-optimized RF front-ends for each band and one shared power-scalable analog baseband. The sub-GHz receiver has achieved the maximum 75 dBc 3rd-order harmonic rejection ratio (HRR3) by inserting a Q-enhanced notch filtering RF amplifier (RFA). In 2.4 GHz band, a single-ended-to-differential RFA with gain/phase imbalance compensation is proposed in the receiver. A ΣΔ fractional-N PLL frequency synthesizer with two switchable Class-C VCOs is employed to provide the LOs. Moreover, the integrated multi-mode PAs achieve the output P1dB (OP1dB) of 16.3 dBm and 14.1 dBm with both 25% PAE for sub-GHz and 2.4 GHz bands, respectively. A power-control loop is proposed to detect the input signal PAPR in real-time and flexibly reconfigure the PA's operation modes to enhance the back-off efficiency. With this proposed technique, the PAE of the sub-GHz PA is improved by x3.24 and x1.41 at 9 dB and 3 dB back-off powers, respectively, and the PAE of the 2.4 GHz PA is improved by x2.17 at 6 dB back-off power. The presented transceiver has achieved comparable or even better performance in terms of noise figure, HRR, OP1dB and power efficiency compared with the state-of-the-art.Peer reviewe

Millimeter-Wave Concurrent Dual-Band BiCMOS RFICs for Radar and Communication RF Front-End

The recent advancement in silicon-based technologies has offered the opportunity for the development of highly-integrated circuits and systems in the millimeter-wave frequency regime. In particular, the demand for high performance multi-band multi-mode radar and communication systems built on silicon-based technologies has been increased dramatically for both military and commercial applications. This dissertation presents the design and implementation of advanced millimeter-wave front-end circuits in SiGe BiCMOS process including a transmit/receive switch module with integrated calibration function, low noise amplifier, and power amplifier for millimeter-wave concurrent dual-band dual-polarization radars and communication systems. The proposed circuits designed for the concurrent dual-band dual-polarization radars and communication systems were fabricated using 0.18-μm BiCMOS process resulting in novel circuit architectures for concurrent multi-band operation. The developed concurrent dual-band circuits fabricated on 0.18-μm BiCMOS process include the T/R/Calibration switch module for digital beam forming array system at 24.5/35 GHz, concurrent dual-band low noise amplifiers at 44/60 GHz, and concurrent dual-band power amplifier at 44/60 GHz. With having all the design frequencies closely spaced to each other showing the frequency ratio below 1.43, the designed circuits provided the integrated dual-band filtering function with Q-enhanced frequency responses. Inspired by the composite right/left- handed metamaterial transmission line approaches, the integrated Q-enhanced filtering sub-circuits provided unprecedented dual-band filtering capability. The new concurrent dual-band dual-mode circuits and system architecture can provide enhanced radar and communication system performance with extended coverage, better image synthesis and target locating by the enhanced diversity. The circuit level hardware research conducted in this dissertation is expected to contribute to enhance the performance of multi-band multi-mode imaging, sensing, and communication array systems

Fully-Integrated Millimeter-Wave Duplexer Modules with Internal Power Amplifier and Low Noise Amplifier on 0.18-µm Bicmos Process For FDD 5g and Other Millimeter-Wave Applications

This research demonstrates two novel millimeter-wave (mm-wave) fully-integrated frequency-division duplexing (FDD) transmitting-receiving (TX-RX) front-end modules, including duplexer (DUX), power amplifier (PA), and low noise amplifier (LNA) on TowerJazz 0.18-µm SiGe BiCMOS. Additionally, two new proposed structures of BiCMOS PAs operating at mm-wave ranges are presented. These new contributions would benefit the developments of next generation wireless communications as well as other mm-wave wireless systems. First, for the proposed structures of BiCMOS PAs, we adopt both advantages of hetero-junction bipolar transistor (HBT) and metal-oxide-semiconductor field-effect transistor (MOSFET, NMOS) to improve PA performances such as larger maximum output power (Psat), higher gain, and better output 1-dB compression point (OP1dB). A detail investigation about cascode amplifiers of the HBT and NMOS combinations is presented. Ultimately, HBT with body-floating NMOS structure can provide medium gain with higher linear output power. The other new structure PA is three transistors stacked-amplifier, which is two stacked HBT and cascoded with a body-floating NMOS, leading to decent gain, larger Psat, and OP1dB. A SAW-less high-isolation fully-integrated 23.5–36.2-GHz FDD TX-RX front-end module, containing a DUX, PA, and differential LNA, is demonstrated on a single Si substrate to facilitate the development of system with DUX on a chip (SoC). The isolation between PA output and LNA input is better than 42 dB in 13 GHz bandwidth (BW). For the RX path, LNA has better than 19 dB gain with the minimum 13.8 dB noise figure (NF) at 28 GHz. On the TX path, PA provides about 12.9 dB gain with better than 12.5 dBm Psat in BW. TX signals leakage through Si-substrate is also considered and suppressed, using PA with deep-N-well structure and p-type/n-type grounding guard ring. This module only occupies 2.1-mm2 without dc and RF pads. In order to overcome the antenna imbalance issue of electrical balanced DUXs (EBDs) and high power consumption issue of active DUXs, a new power-efficient 28 GHz TXRX front-end module with more than 60-dB TX-RX isolation, including DUX, PA, and LNA, is designed, which combines the advantage of passive microwave circuit and active cancellation technique to achieve higher TX-RX isolation, low NF, and being power-efficient. The cancellation path consists of a variable gain amplifier (VGA) and reflection-type phase-shifter (RT-PS) to control the feedback signal amplitude and phase. A detailed analysis and design methodology are also proposed. This narrow-band TX-RX module also occupies small area with 2-mm2 without dc and RF pads

A 250 MHz 14 dB-NF 73 dB-Gain 82 dB-DR Analog Baseband Chain with Digital-Assisted DC-Offset Calibration for Ultra-Wideband

[[abstract]]A 250 MHz analog baseband chain for ultra-wideband was implemented in a 1.2 V 0.13 ¿ m CMOS process. The chip has an active area of 0.8 mm2. In the analog baseband, PGAs and filters are carried out by current-mode amplifiers to achieve wide bandwidth and wide dynamic range of gain, as well as low noise and high linearity. Besides, a current-mode Sallen-Key low-pass filter is adopted for effective rejection of out-of-band interferers. A 6 th-order Chebyshev low-pass filter realized in Gm-C topology is designed in the baseband chain for channel selection. Digitally-assisted DC-offset calibration improves second-order distortion of the entire chain. The design achieves a maximum gain of 73 dB and a dynamic range of 82 dB. Measured noise figure is 14 dB, an IIP3 of -6 dBV, and IIP2 of -5 dBV at the maximum gain mode. The analog baseband chain consumes 56.4 mA under supply of 1.2 V.[[incitationindex]]SCI[[incitationindex]]E

17-21 GHz Low-Noise Amplifier with Embedded Interference Rejection

The ever-growing demand for high performance wireless connectivity has led to the development of fifth-generation (5G) wireless communication standards as well as satellite communication (Satcom). Both 5G wireless communications and Satcom use higher carrier frequencies than traditional standards such as 4G and WiFi. While the higher carrier frequencies allow for larger bandwidths and faster data rates, they come with the cost of high free-space path loss. This high loss necessitates the use of active phased array antennas, which can require hundreds of integrated circuits (ICs) designed in Complimentary Metal-Oxide Semiconductor (CMOS) processes. Furthermore, in a future world with ubiquitous 5G wireless base stations and Satcom users, it is conceivable that Satcom receivers can be jammed by high-power Satcom transmitters and 5G signals. Therefore, Satcom phased arrays must be designed for resilience against these sources of interference while supporting high data rates. One of the key components in a Satcom receiver is the low-noise amplifier (LNA). It is responsible for amplifying the weak, noisy signal received from the satellite into a signal with sufficiently high signal-to-noise ratio for demodulation. One possible solution for making the phased array resilient to sources of interference is to embed filtering in the LNA. This thesis presents two LNA designs that employ embedded filtering for resiliency to interference from 5G wireless signals and Satcom transmitters. First, the circuit-level specifications of a 17.7 - 21.2 GHz (K-band) LNA for satellite communication phased array beamformers are derived from the system requirements. Next, the LNA designs are presented. The first LNA is designed to have out-of-band filtering at 24-30 GHz, which corresponds to the bands containing both 5G and Satcom transmitter interferers. The second LNA is designed to have out-of-band filtering at 27-30 GHz, which addresses a different scenario where the Satcom transmitter is the sole source of interference. Both LNAs are implemented in the Global Foundries 130nm 8XP Silicon-Germanium Bipolar CMOS (SiGe BiCMOS) process. A novel transformer feedback notch is introduced that enhances the filtering capabilities of the amplifier. The full electromagnetic simulation of the first LNA shows a peak gain of 28.8 dB, a minimum noise figure of 1.85 dB, and and input 1 dB compression point (IP1dB) greater than -17 dBm between 24 and 30 GHz. The second LNA shows a peak gain of 27.9 dB, a minimum noise figure of 1.78 dB, and an IP1dB greater than -15 dBm between 27 and 30 GHz. Both LNAs meet specifications sufficient for a Satcom receiver at the same time as having resiliency to out-of-band interference sources