Printed Circuit Board (PCB) design process and fabrication

This module describes main characteristics of Printed Circuit Boards (PCBs). A brief history of PCBs is introduced in the first chapter. Then, the design processes and the fabrication of PCBs are addressed and finally a study case is presented in the last chapter of the module.Peer ReviewedPostprint (published version

Thermosonic flip chip interconnection using electroplated copper column arrays

Published versio

Processor Modules for the Classroom Development of Physical Computers

Processors are present in almost all the electronic components available in the market now. As they perform trillions of operations per second and are complex internally. This project is to build building modules for students, who will be able to develop their own processor. The main idea is that this will help students to experience the detailed workflow of a processor and focus on design and development instead of spending time on wiring and soldering. Different components such as Program Counter, Instruction Register, Memory, Multiplexer, Adder and transceivers are designed and printed as individual modules on printed circuit boards (PCB’s). Eagle tool is used to design the individual circuit modules and after physically testing the design using electronic hardware, the designs are sent to the PCB manufacturer. After they are received, boards are soldered with the appropriate electronic components and tested again as a block. These building blocks are given to a group of both computer science and non-computer science students for feedback. This will be a productive teaching approach for Computer Architecture and related courses

Power simulator upgrade for smart grid algorithm development and testing

This thesis describes the conversion of WVU\u27s analog power simulator into a micro-grid of the future test bed by installing digital relays and intelligent electronic switches. The simulator is a hardware representation of the grid which contains traditional hardware, both digital and analog as well as the recent addition of highly connected, via Ethernet and potentially wireless communication, smart switching and monitoring devices. These new devices were chosen specifically for their cyber security capability to explore that facet of smart grid development. It is important to note that this simulator is a hardware implementation and as such is capable of testing smart grid ideas in the most realistic setting available without affecting real customers. This simulator also has the potential to have renewable resources like wind and solar as well as fuel cell and battery storage distributed resources tied in to test smart grid adaptability to these next generation ideas.;New digital relays were installed. Micro controller units and energy meter integrated circuits were investigated based on the desire to provide many modes of communication and as much processing power as was available in a small package. Solid state switches were designed and implemented for speed, compactness and reduced power consumption

Development of convective reflow-projection moire warpage measurement system and prediction of solder bump reliability on board assemblies affected by warpage

Out-of-plane displacement (warpage) is one of the major thermomechanical reliability concerns for board-level electronic packaging. Printed wiring board (PWB) and component warpage results from CTE mismatch among the materials that make up the PWB assembly (PWBA). Warpage occurring during surface-mount assembly reflow processes and normal operations may cause serious reliability problems. In this research, a convective reflow and projection moire warpage measurement system was developed. The system is the first real-time, non-contact, and full-field measurement system capable of measuring PWB/PWBA/chip package warpage with the projection moire technique during different thermal reflow processes. In order to accurately simulate the reflow process and to achieve the ideal heating rate, a convective heating system was designed and integrated with the projection moire system. An advanced feedback controller was implemented to obtain the optimum heating responses. The developed system has the advantages of simulating different types of reflow processes, and reducing the temperature gradients through the PWBA thickness to ensure that the projection moire system can provide more accurate measurements. Automatic package detection and segmentation algorithms were developed for the projection moire system. The algorithms are used for automatic segmentation of the PWB and assembled packages so that the warpage of the PWB and chip packages can be determined individually. The effect of initial PWB warpage on the fatigue reliability of solder bumps on board assemblies was investigated using finite element modeling (FEM) and the projection moire system. The 3-D models of PWBAs with varying board warpage were used to estimate the solder bump fatigue life for different chip packages mounted on PWBs. The simulation results were validated and correlated with the experimental results obtained using the projection moire system and accelerated thermal cycling tests. Design of experiments and an advanced prediction model were generated to predict solder bump fatigue life based on the initial PWB warpage, package dimensions and locations, and solder bump materials. This study led to a better understanding of the correlation between PWB warpage and solder bump thermomechanical reliability on board assemblies.Ph.D.Committee Chair: Dr. Ume, I. Charles; Committee Member: Dr. Book, Wayne; Committee Member: Dr. Kim, Yeong; Committee Member: Dr. Pan, Jiahui; Committee Member: Dr. Sitaraman, Suresh; Committee Member: Dr. Wu, C. F. Jef

Introduction to Surface-Mount Technology

In chapter 1, the surface-mount technology and reflow soldering technology are overviewed. A brief introduction is presented into the type of electronic components, including through-hole- and surface-mounted ones. Steps of reflow soldering technology are outlined, and details are given regarding the properties of solder material in this technology. The rheological behavior of solder pastes is detailed, and some recent advancements in addressing the thixotropic behavior of this material are summarized. The process of stencil printing is detailed next, which is the most crucial step in reflow soldering technology; since even 60–70% of the soldering failures can be traced back to this process. The topic includes the structures of stencils, discussion of the primary process parameters, and process optimization possibilities by numerical modeling. Process issues of component placement are presented. The critical parameter (process and machines capability), which is used extensively for characterizing the placement process is studied. In connection with the measurement of process capability, the method of Gage R&R (repeatability and reproducibility) is detailed, including the estimation of respective variances. Process of the reflow soldering itself is detailed, including the two main phenomena taking place when the solder is in the molten state, namely: wetting of the liquid solder due to surface tension, and intermetallic compound formation due to diffusion. Solder profile calculation and component movements during the soldering (e.g., self-alignment of passive components) are presented too. Lastly, the pin-in-paste technology (reflow solder of through-hole components) is detailed, including some recent advancements in the optimization of this technology by utilizing machine learning techniques

Printed wiring board system programmer's manual

The printed wiring board system provides automated techniques for the design of printed circuit boards and hybrid circuit boards. The system consists of four programs: (1) the preprocessor program combines user supplied data and pre-defined library data to produce the detailed circuit description data; (2) the placement program assigns circuit components to specific areas of the board in a manner that optimizes the total interconnection length of the circuit; (3) the organizer program assigns pin interconnections to specific board levels and determines the optimal order in which the router program should attempt to layout the paths connecting the pins; and (4) the router program determines the wire paths which are to be used to connect each input pin pair on the circuit board. This document is intended to serve as a programmer's reference manual for the printed wiring board system. A detailed description of the internal logic and flow of the printed wiring board programs is included