Evaluation and implementation of a 5-level hybrid DC-DC converter

In this work, a hybrid voltage regulator topology is analyzed, implemented, and evaluated. The common topologies of DC-DC converters have proven to be lacking in some aspects, such as integrability for buck converters, or maximum efficiency for switched-capacitor regulators. The hybrid topology tackles these shortcomings by combining the advantages of switched-capacitor and inductor-based voltage regulators. A 5-level buck converter is evaluated, implemented, and compared to other converter implementations using the same components. The 5-Level Buck converter can achieve 5 different levels, allowing it to cover 4 operation regions, each between 2 levels. Accordingly, it covers a wide range of output voltages. By reducing the voltage difference at the inductor input, the 5-level buck converter can use smaller inductor compared to both 3-level and conventional buck converters which makes it cheaper, smaller in size, and much more efficient. Simulations show proper functionality of the 5-Level topology, while putting restrictions on the inductor size, efficiency, and component footprint (or total converter area). A test PCB is implemented for verification of the functionality and experimental measurements show that for the same switching frequency and inductor size, the 5-level buck converter achieves up to 15% efficiency improvement over a conventional buck converter and a 3-level buck converter at certain output voltage ranges. Peak efficiency of 94% has been achieved by the 5-Level hybrid converter, which includes all external switching and conduction losses. The proposed hybrid topology proved to yield high conversion efficiency even in the face of component size limitations, which indicates potential benefit in using multilevel converters for several off-chip as well as on-chip applications

An Overview of Fully Integrated Switching Power Converters Based on Switched-Capacitor versus Inductive Approach and Their Advanced Control Aspects

This paper reviews and discusses the state of the art of integrated switched-capacitor and integrated inductive power converters and provides a perspective on progress towards the realization of efficient and fully integrated DC–DC power conversion. A comparative assessment has been presented to review the salient features in the utilization of transistor technology between the switched-capacitor and switched inductor converter-based approaches. First, applications that drive the need for integrated switching power converters are introduced, and further implementation issues to be addressed also are discussed. Second, different control and modulation strategies applied to integrated switched-capacitor (voltage conversion ratio control, duty cycle control, switching frequency modulation, Ron modulation, and series low drop out) and inductive converters (pulse width modulation and pulse frequency modulation) are then discussed. Finally, a complete set of integrated power converters are related in terms of their conditions and operation metrics, thereby allowing a categorization to provide the suitability of converter technologies

Input current shaped ac-to-dc converters

Input current shaping techniques for ac-to-dc converters were investigated. Input frequencies much higher than normal, up to 20 kHz were emphasized. Several methods of shaping the input current waveform in ac-to-dc converters were reviewed. The simplest method is the LC filter following the rectifier. The next simplest method is the resistor emulation approach in which the inductor size is determined by the converter switching frequency and not by the line input frequency. Other methods require complicated switch drive algorithms to construct the input current waveshape. For a high-frequency line input, on the order of 20 kHz, the simple LC cannot be discarded so peremptorily, since the inductor size can be compared with that for the resistor emulation method. In fact, since a dc regulator will normally be required after the filter anyway, the total component count is almost the same as for the resistor emulation method, in which the filter is effectively incorporated into the regulator

A novel control mechanism for hybrid 5-level DC-DC converter for higher switching frequency and lower voltage ripple

The introduction and development of hybrid DC-DC converters present a valuable opportunity in on-chip power management, as they combine the advantages of buck and switched-capacitor converters while alleviating shortcomings such as conversion efficiency and sizing requirements. In this paper, a new control methodology is presented for the recently developed 5-level hybrid DC-DC converter, which utilizes the Virtex 5 LX50T FPGA to drive the converter. This control method allows for a higher switching frequency of 1MHz and an improved conversion efficiency while also allowing for dynamic voltage control based on the desired output voltage. Simulations as well as a test circuit are used to illustrate the proper control functionality, with tabulated results that showcase the efficiency advantage over prior control methods as well as the buck and 3-level hybrid converters

Pushing the Boundary of the 48 V Data Center Power Conversion in the AI and IoT Era

openThe increasing interest in cloud-based services, the Internet-of-Things and the take-over of artificial intelligence computing require constant improvement of the power distribution network. Electricity consumption of data centers, which drains a consistent slice of modern world energy production, is projected to increase tremendously during the next decade. Data centers are the backbone of modern economy; as a consequence, energy-aware resource allocation heuristics are constantly researched, leading the major IT services providers to develop new power conversion architectures to increase the overall webfarm distribution efficiency, together reducing the resulting carbon footprint and maximizing their investments. As higher voltage distribution yields lower conduction losses, vendors are moving from the 12 V rack bus to 48 V solutions together with research centers and especially data center developers. As mentioned, efficiency is crucial to address in this scenario and the whole conversion chain, i.e. from the 48 V bus to the CPU/GPU/ASIC voltage, must be optimized to decrease wasted energy inside the server rack. Power density for this converters family is also paramount to consider, as the overall system must occupy as less area and volume as possible. LLC resonant converters are commonly used as IBCs (intermediate bus converters), together with their GaN implementations because of their multiple advantages in efficiency and size, while multiphase-buck-derived topologies are the most common solution to step-down-to and regulate the final processor voltage as they're well-know, easy to scale and design. This dissertation proposes a family of non-isolated, innovative converters capable of increasing the power density and the efficiency of the state-of-the-art 48 V to 1.8/0.9 V conversion. In this work three solutions are proposed, which can be combined or used as stand-alone converters: an ASIC on-chip switched-capacitor resonant voltage divider, two unregulated Google-STC-derived topologies for the IBC stage (48 V to 12 V and 48 V to 4.8 V + 10.6 V dual-output) and a complete 48 V to 1.8 V ultra-dense PoL converter. Each block has been thoroughly tested and researched, therefore mathematical and experimental results are provided for each solution, together with state-of-the-art comparisons and contextualization.The increasing interest in cloud-based services, the Internet-of-Things and the take-over of artificial intelligence computing require constant improvement of the power distribution network. Electricity consumption of data centers, which drains a consistent slice of modern world energy production, is projected to increase tremendously during the next decade. Data centers are the backbone of modern economy; as a consequence, energy-aware resource allocation heuristics are constantly researched, leading the major IT services providers to develop new power conversion architectures to increase the overall webfarm distribution efficiency, together reducing the resulting carbon footprint and maximizing their investments. As higher voltage distribution yields lower conduction losses, vendors are moving from the 12 V rack bus to 48 V solutions together with research centers and especially data center developers. As mentioned, efficiency is crucial to address in this scenario and the whole conversion chain, i.e. from the 48 V bus to the CPU/GPU/ASIC voltage, must be optimized to decrease wasted energy inside the server rack. Power density for this converters family is also paramount to consider, as the overall system must occupy as less area and volume as possible. LLC resonant converters are commonly used as IBCs (intermediate bus converters), together with their GaN implementations because of their multiple advantages in efficiency and size, while multiphase-buck-derived topologies are the most common solution to step-down-to and regulate the final processor voltage as they're well-know, easy to scale and design. This dissertation proposes a family of non-isolated, innovative converters capable of increasing the power density and the efficiency of the state-of-the-art 48 V to 1.8/0.9 V conversion. In this work three solutions are proposed, which can be combined or used as stand-alone converters: an ASIC on-chip switched-capacitor resonant voltage divider, two unregulated Google-STC-derived topologies for the IBC stage (48 V to 12 V and 48 V to 4.8 V + 10.6 V dual-output) and a complete 48 V to 1.8 V ultra-dense PoL converter. Each block has been thoroughly tested and researched, therefore mathematical and experimental results are provided for each solution, together with state-of-the-art comparisons and contextualization.Dottorato di ricerca in Ingegneria industriale e dell'informazioneopenUrsino, Mari

Single-Chip Isolated DC-DC Converter with Self-Tuned Maximum Power Transfer Frequency

abstract: There is an increasing demand for fully integrated point-of-load (POL) isolated DC-DC converters that can provide an isolation barrier between the primary and the secondary side, while delivering a low ripple, low noise regulated voltage at their isolated sides to a high dynamic range, sensitive mixed signal devices, such as sensors, current-shunt-monitors and ADCs. For these applications, smaller system size and integration level is important because the whole system may need to fit to limited space. Traditional methods for providing isolated power are discrete solutions using bulky transformers. Miniaturization of isolated POL regulators is becoming highly desirable for low power applications. A fully integrated, low noise isolated point-of-load DC-DC converter for supply regulation of high dynamic range analog and mixed signal sensor signal-chains is presented. The isolated DC-DC converter utilizes an integrated planar air-core micro-transformer as a coupled resonator and isolation barrier and enables direct connection of low-voltage mixed signal circuits to higher supply rails. The air core transformer is driven at its primary resonant frequency of 100 MHz to achieve maximum power transfer. A mixed-signal perturb-and-observe based frequency search algorithm is developed to improve maximum power transfer efficiency by 60% across the isolation barrier compared to fixed driving frequency method. The isolated converter’s output ripple is reduced by utilizing spread spectrum clocking in the driver. An isolated PMOS LDO in the secondary side is used to suppress switching noise and ripple by 21dB. Conducted and radiated EMI distribution on the IC is measured by a set of integrated ring oscillator based noise sensors with -68dBm noise sensitivity. The proposed isolated converter achieves highest level of integration with respect to earlier reported integrated isolated converters, while providing 50V on-chip junction isolation without the need for extra silicon post-processing steps.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

Efficiency Comparison of Inductor-, Capacitor- and Resonant-based Converters Fully Integrated in CMOS Technology

International audienceThe full integration of DC-DC converters offers great promise for dramatic reduction in power consumption and the number of board-level components in complex systems on chip. Some papers compare the numerous published on-chip and on-die converter structures, but there is the need for an approach to accurately compare the main basic DC-DC conversion topologies. Therefore, this paper presents a method to compare the efficiencies of CMOS integrated capacitive-, inductive-and resonant-based switching converters. The loss mechanism of each structure in hard-switching conditions is detailed and the analytical equations of the power loss and output voltage are given as a function of few CMOS technology parameters. The resulting models can be used to accurately predict converter efficiency in the early design phase, to compare the basic structure in particular the technology node or to orient the passive choice. The proposed method is then applied to design, optimize and compare fully-integrated power delivery requirements on a 1mm 2 on-die area in 65nm CMOS technology over three decades of power density. The results also underline the high efficiency of the promising resonant-based converter. Index Terms—integrated switching power supply, on-chip voltage regulator, switched-capacitor converter, inductive power converter, resonant converte