Reconfigurable Receiver Front-Ends for Advanced Telecommunication Technologies

The exponential growth of converging technologies, including augmented reality, autonomous vehicles, machine-to-machine and machine-to-human interactions, biomedical and environmental sensory systems, and artificial intelligence, is driving the need for robust infrastructural systems capable of handling vast data volumes between end users and service providers. This demand has prompted a significant evolution in wireless communication, with 5G and subsequent generations requiring exponentially improved spectral and energy efficiency compared to their predecessors. Achieving this entails intricate strategies such as advanced digital modulations, broader channel bandwidths, complex spectrum sharing, and carrier aggregation scenarios. A particularly challenging aspect arises in the form of non-contiguous aggregation of up to six carrier components across the frequency range 1 (FR1). This necessitates receiver front-ends to effectively reject out-of-band (OOB) interferences while maintaining high-performance in-band (IB) operation. Reconfigurability becomes pivotal in such dynamic environments, where frequency resource allocation, signal strength, and interference levels continuously change. Software-defined radios (SDRs) and cognitive radios (CRs) emerge as solutions, with direct RF-sampling receivers offering a suitable architecture in which the frequency translation is entirely performed in digital domain to avoid analog mixing issues. Moreover, direct RF- sampling receivers facilitate spectrum observation, which is crucial to identify free zones, and detect interferences. Acoustic and distributed filters offer impressive dynamic range and sharp roll off characteristics, but their bulkiness and lack of electronic adjustment capabilities limit their practicality. Active filters, on the other hand, present opportunities for integration in advanced CMOS technology, addressing size constraints and providing versatile programmability. However, concerns about power consumption, noise generation, and linearity in active filters require careful consideration.This thesis primarily focuses on the design and implementation of a low-voltage, low-power RFFE tailored for direct sampling receivers in 5G FR1 applications. The RFFE consists of a balun low-noise amplifier (LNA), a Q-enhanced filter, and a programmable gain amplifier (PGA). The balun-LNA employs noise cancellation, current reuse, and gm boosting for wideband gain and input impedance matching. Leveraging FD-SOI technology allows for programmable gain and linearity via body biasing. The LNA's operational state ranges between high-performance and high-tolerance modes, which are apt for sensitivityand blocking tests, respectively. The Q-enhanced filter adopts noise-cancelling, current-reuse, and programmable Gm-cells to realize a fourth-order response using two resonators. The fourth-order filter response is achieved by subtracting the individual response of these resonators. Compared to cascaded and magnetically coupled fourth-order filters, this technique maintains the large dynamic range of second-order resonators. Fabricated in 22-nm FD-SOI technology, the RFFE achieves 1%-40% fractional bandwidth (FBW) adjustability from 1.7 GHz to 6.4 GHz, 4.6 dB noise figure (NF) and an OOB third-order intermodulation intercept point (IIP3) of 22 dBm. Furthermore, concerning the implementation uncertainties and potential variations of temperature and supply voltage, design margins have been considered and a hybrid calibration scheme is introduced. A combination of on-chip and off-chip calibration based on noise response is employed to effectively adjust the quality factors, Gm-cells, and resonance frequencies, ensuring desired bandpass response. To optimize and accelerate the calibration process, a reinforcement learning (RL) agent is used.Anticipating future trends, the concept of the Q-enhanced filter extends to a multiple-mode filter for 6G upper mid-band applications. Covering the frequency range from 8 to 20 GHz, this RFFE can be configured as a fourth-order dual-band filter, two bandpass filters (BPFs) with an OOB notch, or a BPF with an IB notch. In cognitive radios, the filter’s transmission zeros can be positioned with respect to the carrier frequencies of interfering signals to yield over 50 dB blocker rejection

Towards a Universal Multi-Standard RF Receiver

Future wireless communication market calls for the need of an extreme compact wireless device that can easily access to all the available services at any time and at any location with minimum power consumption and cost. The key is to find a multi-standard wireless receiver that can cover all the service specifications while keeping redundant components to minimum. Reconfigurable concept is right fit the need. In this thesis, a fully integrated universal multi-standard receiver using low-cost CMOS technology has been proposed based on the survey for different wireless receiver specifications and optimum architectures. Tunable receiver building blocks such as filters, LNAs, Mixers, VCOs, gain blocks are the main factor to approach this novel receiver. In order to realize frequency agility, low cost as well as low power consumption, a good switch is a must. In this thesis, MEMS switches are preferred rather than active switches or active tuning elements based on their performance comparisons. In the feasibility study, as an example, first, a reconfigurable LNA and a reconfigurable oscillator using hard wires as switches have been developed, and then a LNA and an oscillator have been designed using a MEMS switch. The effect of hard-wire connection and MEMS to the circuits has been evaluated. No performance degradation has been found when using hard-wire connections, while some has been observed when using MEMS. However, MEMS could be integrated with other circuits on the same die if it could be built on low resistive silicon substrate without performance degradation

Integrated Self-Interference Cancellation for Full-Duplex and Frequency-Division Duplexing Wireless Communication Systems

From wirelessly connected robots to car-to-car communications, and to smart cities, almost every aspect of our lives will benefit from future wireless communications. While promise an exciting future world, next-generation wireless communications impose requirements on the data rate, spectral efficiency, and latency (among others) that are higher than those for today's systems by several orders of magnitude. Full-duplex wireless, an emergent wireless communications paradigm, breaks the long-held assumption that it is impossible for a wireless device to transmit and receive simultaneously at the same frequency, and has the potential to immediately double network capacity at the physical (PHY) layer and offers many other benefits (such as reduced latency) at the higher layers. Recently, discrete-component-based demonstrations have established the feasibility of full-duplex wireless. However, the realization of integrated full duplex radios, compact radios that can fit into smartphones, is fraught with fundamental challenges. In addition, to unleash the full potential of full-duplex communication, a careful redesign of the PHY layer and the medium access control (MAC) layer using a cross-layer approach is required. The biggest challenge associated with full duplex wireless is the tremendous amount of transmitter self-interference right on top of the desired signal. In this dissertation, new self-interference-cancellation approaches at both system and circuit levels are presented, contributing towards the realization of full-duplex radios using integrated circuit technology. Specifically, these new approaches involve elimination of the noise and distortion of the cancellation circuitry, enhancing the integrated cancellation bandwidth, and performing joint radio frequency, analog, and digital cancellation to achieve cancellation with nearly one part-per-billion accuracy. In collaboration with researchers at higher layers of the stack, a cross-layer approach has been used in our full-duplex research and has allowed us to derive power allocation algorithms and to characterize rate-gain improvements for full-duplex wireless networks. To enable experimental characterization of full-duplex MAC layer algorithms, a cross-layered software-defined full-duplex radio testbed has been developed. In collaboration with researchers from the field of micro-electro-mechanical systems, we demonstrate a multi-band frequency-division duplexing system using a cavity-filter-based tunable duplexer and our integrated widely-tunable self-interference-cancelling receiver

Flexible Receivers in CMOS for Wireless Communication

Consumers are pushing for higher data rates to support more services that are introduced in mobile applications. As an example, a few years ago video-on-demand was only accessed through landlines, but today wireless devices are frequently used to stream video. To support this, more flexible network solutions have merged in 4G, introducing new technical problems to the mobile terminal. New techniques are thus needed, and this dissertation explores five different ideas for receiver front-ends, that are cost-efficient and flexible both in performance and operating frequency. All ideas have been implemented in chips fabricated in 65 nm CMOS technology and verified by measurements. Paper I explores a voltage-mode receiver front-end where sub-threshold positive feedback transistors are introduced to increase the linearity in combination with a bootstrapped passive mixer. Paper II builds on the idea of 8-phase harmonic rejection, but simplifies it to a 6-phase solution that can reject noise and interferers at the 3rd order harmonic of the local oscillator frequency. This provides a good trade-off between the traditional quadrature mixer and the 8- phase harmonic rejection mixer. Furthermore, a very compact inductor-less low noise amplifier is introduced. Paper III investigates the use of global negative feedback in a receiver front-end, and also introduces an auxiliary path that can cancel noise from the main path. In paper IV, another global feedback based receiver front-end is designed, but with positive feedback instead of negative. By introducing global positive feedback, the resistance of the transistors in a passive mixer-first receiver front-end can be reduced to achieve a lower noise figure, while still maintaining input matching. Finally, paper V introduces a full receiver chain with a single-ended to differential LNA, current-mode downconversion mixers, and a baseband circuity that merges the functionalities of the transimpedance amplifier, channel-select filter, and analog-to-digital converter into one single power-efficient block

A 25% Tuning Range 7.5-9.4 GHz Oscillator With 194 FoM_Tand 400 kHz 1/f Corner in 40nm CMOS Technology

An 8-GHz VCO with class-F23 operation was realized in a 40 nm CMOS technology without ultra-thick metals. The class-F23 operation was enabled in a transformer-based LC tank to allow multiple impedance peaks in the common mode (CM) and the differential mode (DM) excitation. With the additional resonance at $2^{nd}$ and $3^{rd}$ harmonic frequency, the circuit noise to phase-noise conversion and 1/f noise up-conversion are reduced significantly. In a 40 nm CMOS technology without ultra-thick metal, a patterned shielding structure was proposed to improve the inductor quality factor. A combined varactor and capacitor array is proposed to provide accurate matching for a desired resonance frequency ratio, reducing AM-FM conversion and it achieves a broad tuning range. With the proposed transformer-based LC bank and class-F23 operation, the oscillator achieves a phase noise of -150.8 dBc/Hz at 10 MHz offset from a 1.85 GHz carrier after an on-chip /4 divider, and the measured 1/f3 flicker noise corner is around 400 kHz. The oscillator core covers a 7.5-9.4 GHz frequency range for a 25% tuning range.</p

Scalable Array Transceivers with Wide Frequency Tuning Range for Next Generation Radios

Scalable array transceivers with wide frequency tuning range are attractive for next-generationradios. Key challenges for such radios include generation of LO signals with widefrequency tuning range, scalable synchronization between multiple array unit cells andtolerance to in-band and out-of-band interferers. This thesis presents approaches toaddress these challenges in commercial CMOS technologies.The first part focuses on a series resonant mode-switching VCO architecture thatachieves both state-of-art area and power efficiency with an octave frequency tuningrange from 6.4-14 GHz achieved 186-dB-188-dB Figure-of-Merit (FoM) in 65 nm CMOStechnology. The scalability of this approach towards achieving even larger FTR is alsodemonstrated by a triple-mode 2.2 GHz to 8.7 GHz (119% FTR) CMOS VCO.In the second part a scalable, single-wire coupled-PLL architecture for RF mm-wavearrays is presented. The proposed architecture preserves the simplicity of a daisy-chained LO distribution, compensates for phase offset due to interconnect, and provides phasenoise improvement commensurate to the number of coupled PLLs. Measurements on a28 GHz CMOS prototype demonstrate the feasibility of this scheme.The third part of this thesis presents filtering techniques for in-band blocker suppression.A spatial spectral notch filter design for MIMO digital beam forming arrays is proposedto relax the ADC dynamic range requirement. Orthogonal properties of Walsh functionsincorporated into passive N-path approach enables reconfigurable notches at multiplefrequencies and angles-of-incidence. A 0.3 GHz-1.4 GHz four-element array prototypeimplemented in 65 nm CMOS achieves > 15-dB notch filtering at RF input for twoblockers while causing < 3-dB NF degradation.Finally, a code-domain N-path receiver (RX) is proposed based on pseudo-random(PN) code-modulated LO pulses for simultaneous transmission and reception (STAR)applications. A combination of Walsh-Function and PN sequence is proposed to createcode-domain matched filter at the RF frontend which reflects unknown in-band blockersand rejects known in-band TX self-interference (SI) by using orthogonal codes at RXinput thereby maximizing the SNR of the received signals. The resulting prototype in65 nm is functional from 0.3 GHz-1.4 GHz with 35 dB gain and concurrently receivestwo code-modulated signals. Proposed transmitter (TX) SI mitigation approach resultsin 38.5 dB rejection for -11.8 dBm 1.46 Mb s QPSK modulated SI at RX input. TheRX achieves 23.7 dBm OP1dB for in-band SI, while consuming ∼35 mW and occupies0.31 mm2Keywords: Passive Mixers, dual band, TX self-Interferer, synchronisation, STAR, Code domain N-path receiver, mode switching, notch filter, Phase locked loops, Octave tuning range, CMOS, phase noise, VCO, large-scale 5G mm-wave arrays, resonator, Simultaneous transmit and receive, resonator band-switching, LO distribution, scalable coupled-PLL, N-path passive mixers, MIMO arrays, digital beamforming, CDMA, phased arrays, wide tuning range, Walsh Functio

Wavelength tunable transmitters for future reconfigurable agile optical networks

Wavelength tuneable transmission is a requirement for future reconfigurable agile optical networks as it enables cost efficient bandwidth distribution and a greater degree of transparency. This thesis focuses on the development and characterisation of wavelength tuneable transmitters for the core, metro and access based WDM networks. The wavelength tuneable RZ transmitter is a fundamental component for the core network as the RZ coding scheme is favoured over the conventional NRZ format as the line rate increases. The combination of a widely tuneable SG DBR laser and an EAM is a propitious technique employed to generate wavelength tuneable pulses at high repetition rates (40 GHz). As the EAM is inherently wavelength dependant an accurate characterisation of the generated pulses is carried out using the linear spectrogram measurement technique. Performance issues associated with the transmitter are investigated by employing the generated pulses in a 1500 km 42.7 Gb/s circulating loop system. It is demonstrated that non-optimisation of the EAM drive conditions at each operating wavelength can lead to a 33 % degradation in system performance. To achieve consistent operation over a wide waveband the drive conditions of the EAM must be altered at each operating wavelength. The metro network spans relatively small distances in comparison to the core and therefore must utilise more cost efficient solutions to transmit data, while also maintaining high reconfigurable functionality. Due to the shorter transmission distances, directly modulated sources can be utilised, as less precise wavelength and chirp control can be tolerated. Therefore a gain-switched FP laser provides an ideal source for wavelength tuneable pulse generation at high data rates (10 Gb/s). A self-seeding scheme that generates single mode pulses with high SMSR (> 30 dB) and small pulse duration is demonstrated. A FBG with a very large group delay disperses the generated pulses and subsequently uses this CW like signal to re-inject the laser diode negating the need to tune the repetition rate for optimum gain-switching operation. The access network provides the last communication link between the customer’s premises and the first switching node in the network. FTTH systems should take advantage of directly modulated sources; therefore the direct modulation of a SG DBR tuneable laser is investigated. Although a directly modulated TL is ideal for reconfigurable access based networks, the modulation itself leads to a drift in operating frequency which may result in cross channel interference in a WDM network. This effect is investigated and also a possible solution to compensate the frequency drift through simultaneous modulation of the lasers phase section is examined

Dirty RF Signal Processing for Mitigation of Receiver Front-end Non-linearity

Moderne drahtlose Kommunikationssysteme stellen hohe und teilweise gegensätzliche Anforderungen an die Hardware der Funkmodule, wie z.B. niedriger Energieverbrauch, große Bandbreite und hohe Linearität. Die Gewährleistung einer ausreichenden Linearität ist, neben anderen analogen Parametern, eine Herausforderung im praktischen Design der Funkmodule. Der Fokus der Dissertation liegt auf breitbandigen HF-Frontends für Software-konfigurierbare Funkmodule, die seit einigen Jahren kommerziell verfügbar sind. Die praktischen Herausforderungen und Grenzen solcher flexiblen Funkmodule offenbaren sich vor allem im realen Experiment. Eines der Hauptprobleme ist die Sicherstellung einer ausreichenden analogen Performanz über einen weiten Frequenzbereich. Aus einer Vielzahl an analogen Störeffekten behandelt die Arbeit die Analyse und Minderung von Nichtlinearitäten in Empfängern mit direkt-umsetzender Architektur. Im Vordergrund stehen dabei Signalverarbeitungsstrategien zur Minderung nichtlinear verursachter Interferenz - ein Algorithmus, der besser unter "Dirty RF"-Techniken bekannt ist. Ein digitales Verfahren nach der Vorwärtskopplung wird durch intensive Simulationen, Messungen und Implementierung in realer Hardware verifiziert. Um die Lücken zwischen Theorie und praktischer Anwendbarkeit zu schließen und das Verfahren in reale Funkmodule zu integrieren, werden verschiedene Untersuchungen durchgeführt. Hierzu wird ein erweitertes Verhaltensmodell entwickelt, das die Struktur direkt-umsetzender Empfänger am besten nachbildet und damit alle Verzerrungen im HF- und Basisband erfasst. Darüber hinaus wird die Leistungsfähigkeit des Algorithmus unter realen Funkkanal-Bedingungen untersucht. Zusätzlich folgt die Vorstellung einer ressourceneffizienten Echtzeit-Implementierung des Verfahrens auf einem FPGA. Abschließend diskutiert die Arbeit verschiedene Anwendungsfelder, darunter spektrales Sensing, robuster GSM-Empfang und GSM-basiertes Passivradar. Es wird gezeigt, dass nichtlineare Verzerrungen erfolgreich in der digitalen Domäne gemindert werden können, wodurch die Bitfehlerrate gestörter modulierter Signale sinkt und der Anteil nichtlinear verursachter Interferenz minimiert wird. Schließlich kann durch das Verfahren die effektive Linearität des HF-Frontends stark erhöht werden. Damit wird der zuverlässige Betrieb eines einfachen Funkmoduls unter dem Einfluss der Empfängernichtlinearität möglich. Aufgrund des flexiblen Designs ist der Algorithmus für breitbandige Empfänger universal einsetzbar und ist nicht auf Software-konfigurierbare Funkmodule beschränkt.Today's wireless communication systems place high requirements on the radio's hardware that are largely mutually exclusive, such as low power consumption, wide bandwidth, and high linearity. Achieving a sufficient linearity, among other analogue characteristics, is a challenging issue in practical transceiver design. The focus of this thesis is on wideband receiver RF front-ends for software defined radio technology, which became commercially available in the recent years. Practical challenges and limitations are being revealed in real-world experiments with these radios. One of the main problems is to ensure a sufficient RF performance of the front-end over a wide bandwidth. The thesis covers the analysis and mitigation of receiver non-linearity of typical direct-conversion receiver architectures, among other RF impairments. The main focus is on DSP-based algorithms for mitigating non-linearly induced interference, an approach also known as "Dirty RF" signal processing techniques. The conceived digital feedforward mitigation algorithm is verified through extensive simulations, RF measurements, and implementation in real hardware. Various studies are carried out that bridge the gap between theory and practical applicability of this approach, especially with the aim of integrating that technique into real devices. To this end, an advanced baseband behavioural model is developed that matches to direct-conversion receiver architectures as close as possible, and thus considers all generated distortions at RF and baseband. In addition, the algorithm's performance is verified under challenging fading conditions. Moreover, the thesis presents a resource-efficient real-time implementation of the proposed solution on an FPGA. Finally, different use cases are covered in the thesis that includes spectrum monitoring or sensing, GSM downlink reception, and GSM-based passive radar. It is shown that non-linear distortions can be successfully mitigated at system level in the digital domain, thereby decreasing the bit error rate of distorted modulated signals and reducing the amount of non-linearly induced interference. Finally, the effective linearity of the front-end is increased substantially. Thus, the proper operation of a low-cost radio under presence of receiver non-linearity is possible. Due to the flexible design, the algorithm is generally applicable for wideband receivers and is not restricted to software defined radios