36 research outputs found

    Low-power, high-speed FFT processor for MB-OFDM UWB application

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    This paper presents a low-power, high-speed 4-data-path 128-point mixed-radix (radix-2 & radix-2 2 ) FFT processor for MB-OFDM Ultra-WideBand (UWB) systems. The processor employs the single-path delay feedback (SDF) pipelined structure for the proposed algorithm, it uses substructure-sharing multiplication units and shift-add structure other than traditional complex multipliers. Furthermore, the word lengths are properly chosen, thus the hardware costs and power consumption of the proposed FFT processor are efficiently reduced. The proposed FFT processor is verified and synthesized by using 0.13 µm CMOS technology with a supply voltage of 1.32 V. The implementation results indicate that the proposed 128-point mixed-radix FFT architecture supports a throughput rate of 1Gsample/s with lower power consumption in comparison to existing 128-point FFT architecture

    A 128-point Multi-Path SC FFT Architecture

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    This paper presents a new radix-2^k multi-path FFT architecture, named MSC FFT, which is based on a single-path radix-2 serial commutator (SC) FFT architecture. The proposed multi-path architecture has a very high hardware utilization that results in a small chip area, while providing high throughput. In addition, the adoption of radix-2^k FFT algorithms allows for simplifying the rotators even further. It is achieved by optimizing the structure of the processing element (PE). The implemented architecture is a 128-point 4-parallel multi-path SC FFT using 90 nm process. Its area and power consumption at 250 MHz are only 0.167 mm2 and 14.81 mW, respectively. Compared with existing works, the proposed design reduces significantly the chip rea and the power consumption, while providing high throughput.Comment: Conference paper, ISCAS 2020, 5 page

    Simulation of Parallel Pipeline Radix 2^2 Architecture

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    In popular orthogonal frequency division multiplexing (OFDM) communication system processing is one of the key procedures Fast Fourier transform (FFT) and inversely for that Fast Fourier Transform (IFFT) is one of them. In this VLSI implementation Structured pipeline architectures, low power consumption, high speed and reduced chip area are the important concerns. In this paper, presentation of the worthy implementation of FFT/IFFT processor for OFDM applications is described. We obtain the single-path delay feedback architecture, to get a ROM of smaller size and this proposed architecture applies a reconfigurable complex multiplier. To minimize the error of truncation we apply a fixed width modified booth multiplier. As a result, the proposed radix-2k feed forward architectures even offer an attractive solution for current applications, and also open up a new research line on feed forward structures

    FPGA Based Design & Implementation of Orthogonal Frequency Division Multiplexing Transciever Module using VHDL”,

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    ABSTRACT Orthogonal Frequency Division Multiplexing (OFDM) is a multi-carrier transmission technique, which divides the available spectrum into many carriers, each one being modulated by a low rate data stream. OFDM is similar to FDMA in that the multiple user access is achieved by subdividing the available bandwidth into multiple channels that are then allocated to users. However, OFDM uses the spectrum much more efficiently by spacing the channels much closer together. This is achieved by making all the carriers orthogonal to one another, preventing interference between the closely spaced carriers. The OFDM modem developed in this work consists of development of serial to parallel converter, 4-QAM modulator, IFFT logic which is built using 64 point radix-4 butterfly structure, FFT logic, 4-QAM de-modulator, and parallel-to-serial converter. The OFDM modem core is simulated by considering 31 sub-carriers. The whole design has been implemented using Xilinx Spartan-3AN XC3S700AN FPGA. The FFT/IFFT module that has been implemented makes use of CORDIC algorithms as an alternate for multipliers. This makes better usage of FPGA resources and the performance is more due to the usage of CORDIC algorithms instead of multipliers

    FPGA Based Design & Implementation of Orthogonal Frequency Division Multiplexing Transciever Module using VHDL”,

    Get PDF
    ABSTRACT Orthogonal Frequency Division Multiplexing (OFDM) is a multi-carrier transmission technique, which divides the available spectrum into many carriers, each one being modulated by a low rate data stream. OFDM is similar to FDMA in that the multiple user access is achieved by subdividing the available bandwidth into multiple channels that are then allocated to users. However, OFDM uses the spectrum much more efficiently by spacing the channels much closer together. This is achieved by making all the carriers orthogonal to one another, preventing interference between the closely spaced carriers. The OFDM modem developed in this work consists of development of serial to parallel converter, 4-QAM modulator, IFFT logic which is built using 64 point radix-4 butterfly structure, FFT logic, 4-QAM de-modulator, and parallel-to-serial converter. The OFDM modem core is simulated by considering 31 sub-carriers. The whole design has been implemented using Xilinx Spartan-3AN XC3S700AN FPGA. The FFT/IFFT module that has been implemented makes use of CORDIC algorithms as an alternate for multipliers. This makes better usage of FPGA resources and the performance is more due to the usage of CORDIC algorithms instead of multipliers

    Selected Papers from IEEE ICASI 2019

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    The 5th IEEE International Conference on Applied System Innovation 2019 (IEEE ICASI 2019, https://2019.icasi-conf.net/), which was held in Fukuoka, Japan, on 11–15 April, 2019, provided a unified communication platform for a wide range of topics. This Special Issue entitled “Selected Papers from IEEE ICASI 2019” collected nine excellent papers presented on the applied sciences topic during the conference. Mechanical engineering and design innovations are academic and practical engineering fields that involve systematic technological materialization through scientific principles and engineering designs. Technological innovation by mechanical engineering includes information technology (IT)-based intelligent mechanical systems, mechanics and design innovations, and applied materials in nanoscience and nanotechnology. These new technologies that implant intelligence in machine systems represent an interdisciplinary area that combines conventional mechanical technology and new IT. The main goal of this Special Issue is to provide new scientific knowledge relevant to IT-based intelligent mechanical systems, mechanics and design innovations, and applied materials in nanoscience and nanotechnology

    Radix-2<sup>2</sup> Algorithm for the Odd New Mersenne Number Transform (ONMNT)

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    \ua9 2023 by the authors. This paper introduces a new derivation of the radix- (Formula presented.) fast algorithm for the forward odd new Mersenne number transform (ONMNT) and the inverse odd new Mersenne number transform (IONMNT). This involves introducing new equations and functions in finite fields, bringing particular challenges unlike those in other fields. The radix- (Formula presented.) algorithm combines the benefits of the reduced number of operations of the radix-4 algorithm and the simple butterfly structure of the radix-2 algorithm, making it suitable for various applications such as lightweight ciphers, authenticated encryption, hash functions, signal processing, and convolution calculations. The multidimensional linear index mapping technique is the conventional method used to derive the radix- (Formula presented.) algorithm. However, this method does not provide clear insights into the underlying structure and flexibility of the radix- (Formula presented.) approach. This paper addresses this limitation and proposes a derivation based on bit-unscrambling techniques, which reverse the ordering of the output sequence, resulting in efficient calculations with fewer operations. Butterfly and signal flow diagrams are also presented to illustrate the structure of the fast algorithm for both ONMNT and IONMNT. The proposed method should pave the way for efficient and flexible implementation of ONMNT and IONMNT in applications such as lightweight ciphers and signal processing. The algorithm has been implemented in C and is validated with an example
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