Memristor-based series voltage regulators

Series linear voltage regulators are integrated circuits commonly used to make adjustable voltage sources. When used with potentiometers, these regulators are able to give adjustable voltage at the output. Memristor is a new nonlinear circuit element which came out in the last decade. It is able to provide electronically adjustable resistance. If a memristor is fed with a voltage over the threshold and it is not under saturation, its resistance also called memristance is dependent on the integration of its current, also called memristor charge. Memristor shows promise for different types and lots of digital and analog applications. In this paper, memristor-based series voltage regulator topologies are suggested and they are examined using parameters and simulations. Some design criteria have been given for the memristor-based series voltage regulators

ANALOG SIGNAL PROCESSING SOLUTIONS AND DESIGN OF MEMRISTOR-CMOS ANALOG CO-PROCESSOR FOR ACCELERATION OF HIGH-PERFORMANCE COMPUTING APPLICATIONS

Emerging applications in the field of machine vision, deep learning and scientific simulation require high computational speed and are run on platforms that are size, weight and power constrained. With the transistor scaling coming to an end, existing digital hardware architectures will not be able to meet these ever-increasing demands. Analog computation with its rich set of primitives and inherent parallel architecture can be faster, more efficient and compact for some of these applications. The major contribution of this work is to show that analog processing can be a viable solution to this problem. This is demonstrated in the three parts of the dissertation. In the first part of the dissertation, we demonstrate that analog processing can be used to solve the problem of stereo correspondence. Novel modifications to the algorithms are proposed which improves the computational speed and makes them efficiently implementable in analog hardware. The analog domain implementation provides further speedup in computation and has lower power consumption than a digital implementation. In the second part of the dissertation, a prototype of an analog processor was developed using commercially available off-the-shelf components. The focus was on providing experimental results that demonstrate functionality and to show that the performance of the prototype for low-level and mid-level image processing tasks is equivalent to a digital implementation. To demonstrate improvement in speed and power consumption, an integrated circuit design of the analog processor was proposed, and it was shown that such an analog processor would be faster than state-of-the-art digital and other analog processors. In the third part of the dissertation, a memristor-CMOS analog co-processor that can perform floating point vector matrix multiplication (VMM) is proposed. VMM computation underlies some of the major applications. To demonstrate the working of the analog co-processor at a system level, a new tool called PSpice Systems Option is used. It is shown that the analog co-processor has a superior performance when compared to the projected performances of digital and analog processors. Using the new tool, various application simulations for image processing and solution to partial differential equations are performed on the co-processor model

Memristores

Mestrado em Engenharia Eletrónica e TelecomunicaçõesThe memristor was proposed by Leon Chua in 1971 only for the sake of mathematical complement, an idea that was not widely accepted by the scientific community. Only decades later, after HP’s announcement in 2008 is that the memristors started to be seen as realizable elements and not as mere mathematical curiosities. These devices feature distinct characteristics from the other known electronic devices. Besides being passive, they are characterized by the following postulates: the existence of a characteristic voltage-current loop with hysteresis and single valued in the origin, gradual decrease of the area defined by the loop with the increasing of the frequency and simply resistive behaviour for infinite frequency. As a memristive device’s response depends greatly on the amplitude and frequency characteristics of the input signal and its own internal characteristics. Therefore there is a clear need to find procedures and attributes that allow to classify and categorize various memristive devices. These attributes, in their essence, similar to the figures of merit of devices like diodes and transistors, will allow in the near future to better choose memristive devices for specific applications. To try to obtain these attributes, a morphologic analysis of the voltage-current loops’ area and length of several theoretical memristive devices models was made in MATLAB changing its internal characteristics, for arrays of frequency and amplitude values of the input signal. Afterwards, a memristor device emulator was built to corroborate the theoretical results obtained. To this end the voltage-current loops for several input values were measured and the calculation of the loops’ areas and lengths was effectuated.O memristor foi proposto por Leon Chua em 1971 apenas por uma questão de complemento matemático, uma ideia que não teve grande aceitação na comunidade científica. Só décadas mais tarde, depois do anúncio da HP em 2008 é que os memristors começaram a ser vistos como elementos realizáveis e não como meras curiosidades matemáticas. Estes dispositivos apresentam características distintas dos demais dispositivos eletrónicos conhecidos. Além de serem elementos passivos, são caracterizados pelos seguintes postulados: existência de uma curva característica tensão-corrente com histerese e valor único na origem, diminuição gradual da área definida por esta curva com o aumento da frequência e comportamento puramente resistivo do memristor quando a frequência tende para infinito. A resposta dos dispositivos memristivos depende bastante das características de amplitude e frequência do sinal de entrada e das suas próprias características internas. Por isso, há uma clara necessidade de descobrir procedimentos e atributos que permitam classificar e categorizar diferentes dispositivos memristivos. Estes atributos, na sua essência, semelhantes às figuras de mérito de dispositivos como díodos ou transístores, permitirão num futuro próximo selecionar dispositivos memristivos para aplicações específicas. Para tentar obter estes atributos, realizou-se uma análise morfológica da área e comprimento das curvas tensão-corrente de vários modelos teóricos de dispositivos memristivos em MATLAB variando as suas características internas, para conjuntos de valores de frequência e amplitude do sinal de entrada. De seguida construiu-se um emulador de um dispositivo memristivo para corroborar os resultados teóricos obtidos. Para tal mediram-se as curvas de tensão-corrente para vários valores de entrada e efetuou-se o cálculo das áreas e comprimentos dessas curvas

A Memristor-Based Neuromorphic Computing Application

Artificial neural networks have recently received renewed interest because of the discovery of the memristor. The memristor is the fourth basic circuit element, hypothesized to exist by Leon Chua in 1971 and physically realized in 2008. The two-terminal device acts like a resistor with memory and is therefore of great interest for use as a synapse in hardware ANNs. Recent advances in memristor technology allowed these devices to migrate from the experimental stage to the application stage. This Master\u27s thesis presents the development of a threshold logic gate (TLG), which is a special case of an ANN, implemented with discrete circuit elements using memristors as synapses. Further, a programming circuit is developed, allowing the memristors and therefore the network to be reconfigured and trained in real-time. The results show that memristors are indeed viable for use in ANNs, but are somewhat hard to control as a lot of intrinsic device characteristics are still under investigation and are currently not fully understood. A simple threshold logic gate was built and can be reconfigured to implement AND, OR, NAND, and NOR functionality. The findings presented here contribute towards improvements on the device as well as algorithmic level to implement a memristor-based ANN capable of on-line learning

Low Power IoT based Automated Manhole Cover Monitoring System as a Smart City application

With the increased population in the big cities, Internet of Things (IoT) devices to be used as automated monitoring systems are required in many of the Smart city’s applications. Monitoring road infrastructure such as a manhole cover (MC) is one of these applications. Automating monitoring manhole cover structure has become more demanding, especially when the number of MC failure increases rapidly: it affects the safety, security and the economy of the society. Only 30% of the current MC monitoring systems are automated with short lifetime in comparison to the lifetime of the MC, without monitoring all the MC issues and without discussing the challenges of the design from IoT device design point of view. Extending the lifetime of a fully automated IoT-based MC monitoring system from circuit design point of view was studied and addressed in this research. The main circuit that consumes more power in the IoT-based MC monitoring system is the analogue to digital converter (ADC) found at the data acquisition module (DAQ). In several applications, the compressive sensing (CS) technique proved its capability to reduce the power consumption for ADC. In this research, CS has been investigated and studied deeply to reach the aim of the research. CS based ADC is named analogue to information converter (AIC). Because the heart of the AIC is the pseudorandom number generator (PRNG), several researchers have used it as a key to secure the data, which makes AIC more suitable for IoT device design. Most of these PRNG designs for AIC are hardware implemented in the digital circuit design. The presence of digital PRNG at the AIC analogue front end requires: a) isolating digital and analogue parts, and b) using two different power supplies and grounds for analogue and digital parts. On the other hand, analogue circuit design becomes more demanding for the sake of the power consumption, especially after merging the analogue circuit design with other fields such as neural networks and neuroscience. This has motivated the researcher to propose two low-power analogue chaotic oscillators to replace digital PRNG using opamp Schmitt Trigger. The proposed systems are based on a coupling oscillator concept. The design of the proposed systems is based on: First, two new modifications for the well-known astable multivibrator using opamp Schmitt trigger. Second, the waveshaping design technique is presented to design analogue chaotic oscillators instead of starting with complex differential equations as it is the case for most of the chaotic oscillator designs. This technique helps to find easy steps and understanding of building analogue chaotic oscillators for electronic circuit designers. The proposed systems used off the shelf components as a proof of concept. The proposed systems were validated based on: a) the range of the temperature found beneath a manhole cover, and b) the signal reconstruction under the presence and the absence of noise. The results show decent performance of the proposed system from the power consumption point of view, as it can exceed the lifetime of similar two opamps based Jerk chaotic oscillators by almost one year for long lifetime applications such as monitoring MC using Li-Ion battery. Furthermore, in comparison to PRNG output sequence generated by a software algorithm used in AIC framework in the presence of the noise, the first proposed system output sequence improved the signal reconstruction by 6.94%, while the second system improved the signal reconstruction by 17.83