356 research outputs found
Release and Verification of an Operating System for Testing e-Flash on Microcontrollers for Automotive Applications based on Multicore Architecture
The cars produced contain an increasing number of electronic devices for active assistance to driving, safety controls, energy efficiency, passenger comfort and entertainment. Safety is the keyword and means to have electronic components high reliability. Infineon microcontroller division works to improve reliability and guarantee the quality of microcontroller flash memories. The thesis goal is to verify the operating system used to test the microcontrollers flash memorie
DRAFT: work in progress - - - comments solicited evolving Mach 3.0 to use migrating threads
technical reportLike most operating systems, Mach 3.0 views threads as statically associated with a single task. An alternative model is that of migrating threads, in which a single thread abstraction moves between tasks with the logical flow of control, and "server" code is passively executed. We have compatibly replaced Mach's static threads with migrating threads, isolating that aspect of operating system design and implementation. The key element of our design is a decoupling of the thread abstraction into the controllable execution context and the schedulable thread of control, consisting of a chain of contexts. A key element of our implementation is that threads are now "based" in the kernel, and temporarily make excursions into tasks via upcalls. The new system provides cleaner and more powerful semantics for thread manipulation, allows scheduling and accounting attributes to follow threads, simplifies both kernel and server code, and improves RPC performance. We have retained the old thread and IPC interfaces for backwards compatibility, with no changes required to existing client programs and only a minimal change to servers, as demonstrated by a functional Unix single server and clients. Code size along the critical RPC path has been reduced by a factor of three, while its logical complexity has been reduced by an order of magnitude. Initial timings show that the performance of local RPC, doing normal marshaling, has also improved by a factor of three. We conclude that a migrating thread model is superior to a static model, and that it is feasible to improve existing operating systems in this manner
Managing contamination delay to improve Timing Speculation architectures
Timing Speculation (TS) is a widely known method for realizing better-than-worst-case systems. Aggressive clocking, realizable by TS, enable systems to operate beyond specified safe frequency limits to effectively exploit the data dependent circuit delay. However, the range of aggressive clocking for performance enhancement under TS is restricted by short paths. In this paper, we show that increasing the lengths of short paths of the circuit increases the effectiveness of TS, leading to performance improvement. Also, we propose an algorithm to efficiently add delay buffers to selected short paths while keeping down the area penalty. We present our algorithm results for ISCAS-85 suite and show that it is possible to increase the circuit contamination delay by up to 30% without affecting the propagation delay. We also explore the possibility of increasing short path delays further by relaxing the constraint on propagation delay and analyze the performance impact
Telecommunications Networks
This book guides readers through the basics of rapidly emerging networks to more advanced concepts and future expectations of Telecommunications Networks. It identifies and examines the most pressing research issues in Telecommunications and it contains chapters written by leading researchers, academics and industry professionals. Telecommunications Networks - Current Status and Future Trends covers surveys of recent publications that investigate key areas of interest such as: IMS, eTOM, 3G/4G, optimization problems, modeling, simulation, quality of service, etc. This book, that is suitable for both PhD and master students, is organized into six sections: New Generation Networks, Quality of Services, Sensor Networks, Telecommunications, Traffic Engineering and Routing
Computer Aided Verification
The open access two-volume set LNCS 11561 and 11562 constitutes the refereed proceedings of the 31st International Conference on Computer Aided Verification, CAV 2019, held in New York City, USA, in July 2019. The 52 full papers presented together with 13 tool papers and 2 case studies, were carefully reviewed and selected from 258 submissions. The papers were organized in the following topical sections: Part I: automata and timed systems; security and hyperproperties; synthesis; model checking; cyber-physical systems and machine learning; probabilistic systems, runtime techniques; dynamical, hybrid, and reactive systems; Part II: logics, decision procedures; and solvers; numerical programs; verification; distributed systems and networks; verification and invariants; and concurrency
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Distributed computation system : distributed computing in a heterogeneous networked Unix environment
Large integer factorization exemplifies a class of hard computational problems requiring the power of a supercomputer but which have algorithms decomposable into many large independent computations. The availability of internetworking provides the opportunity to solve such problems in distributed fashion on ordinary machines. Such a distributed network might contain a heterogeneous collection of machines running under the administrative authority of different organizations in separate geographic locations. DCS uses standard UNIX BSD 4.2/4.3 features to implement a central scheduler daemon and remote grain server daemons providing support for an extended model of very large grain data flow computation. A system providing such a service needs to address the essential goals of reliability, fault tolerance, courtesy and security in addition to dataflow functionality. In particular, checkpointing becomes essential for reliability and efficiency when grain lifetimes become comparable to system uptimes. A user control program makes grain requests and receives results from a central scheduler which launches and coordinates grain computations on remote grain servers. Grain servers supply checkpoint information at regular intervals to the central scheduler or a passive backup. Grain computations on busy or failed server hosts are automatically moved by the scheduler to quiescent hosts using checkpoint information. Additionally, the system transparently recovers from temporary failure of the central scheduler or the user control program, A simple paradigm for the organization and update protocol of a reliable backing store is introduced. Other design, implementation, and operational issues are discussed. DCS was used to run the computation finding the 34 digit penultimate prime factor of a 93 digit, "more wanted" number from the Cunningham Project [BRI88]
Delay analysis for wireless applications using a multiservice multiqueue processor sharing model
The ongoing development of wireless networks supporting multimedia applications requires service providers to efficiently deliver complex Quality of Service (QoS) requirements. The wide range of new applications in these networks significantly increases the difficulty of network design and dimensioning to meet QoS requirements. Medium Access Control (MAC) protocols affect QoS achieved by wireless networks. Research on analysis and performance evaluation is important for the efficient protocol design. As wireless networks feature scarce resources that are simultaneously shared by all users, processor sharing (PS) models were proposed for modelling resource sharing mechanisms in such systems. In this thesis, multi-priority MAC protocols are proposed for handling the various service traffic types. Then, an investigation of multiservice multiqueue PS models is undertaken to analyse the delay for some recently proposed wireless applications. We start with an introduction to MAC protocols for wireless networks which are specified in IEEE standards and then review scheduling algorithms which were proposed to work with the underlying MAC protocols to cooperatively achieve QoS goals. An overview of the relevant literature is given on PS models for performance analysis and evaluation of scheduling algorithms. We propose a multiservice multiqueue PS model using a scheduling scheme in multimedia wireless networks with a comprehensive description of the analytical solution. Firstly, we describe the existing multiqueue processor sharing (MPS) model, which uses a fixed service quantum at each queue, and correct a subtle incongruity in previous solutions presented in the literature. Secondly, a new scheduling framework is proposed to extend the previous MPS model to a general case. This newly proposed analytical approach is based on the idea that the service quantum arranged by a MAC scheduling controller to service data units can be priority-based. We obtain a closed-form expression for the mean delay of each service class in this model. In summary, our new approach simplifies MAC protocols for multimedia applications into an analytical model that includes more complex and realistic traffic models without compromising details of the protocol and significantly reduces the number of MAC headers, thus the overall average delay will be decreased. In response to using the studied multiservice multiqueue PS models, we apply the MPS model to two wireless applications: Push to Talk (PTT) service over GPRS/GSM networks and the Worldwide Interoperability for Microwave Access (WiMAX) networks. We investigate the uplink delay of PTT over traditional GPRS/GSM networks and the uplink delay for WiMAX Subscriber Station scheduler under a priority-based fair scheduling. MAC structures capable of supporting dynamically varying traffic are studied for the networks, especially, with the consideration of implementation issues. The model provides useful insights into the dynamic performance behaviours of GPRS/GSM and WiMAX networks with respect to various system parameters and comprehensive traffic conditions. We then evaluate the model under some different practical traffic scenarios. Through modelling of the operation of wireless access systems, under a variety of multimedia traffic, our analytical approaches provide practical analysis guidelines for wireless network dimensioning
Computer Aided Verification
The open access two-volume set LNCS 11561 and 11562 constitutes the refereed proceedings of the 31st International Conference on Computer Aided Verification, CAV 2019, held in New York City, USA, in July 2019. The 52 full papers presented together with 13 tool papers and 2 case studies, were carefully reviewed and selected from 258 submissions. The papers were organized in the following topical sections: Part I: automata and timed systems; security and hyperproperties; synthesis; model checking; cyber-physical systems and machine learning; probabilistic systems, runtime techniques; dynamical, hybrid, and reactive systems; Part II: logics, decision procedures; and solvers; numerical programs; verification; distributed systems and networks; verification and invariants; and concurrency
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