Periodically Disturbed Oscillators

By controlling the timing of events and enabling the transmission of data over long distances, oscillators can be considered to generate the "heartbeat" of modern electronic systems. Their utility, however, is boosted significantly by their peculiar ability to synchronize to external signals that are themselves periodic in time. Although this fascinating phenomenon has been studied by scientists since the 1600s, models for describing this behavior have seen a disconnect between the rigorous, methodical approaches taken by mathematicians and the design-oriented, physically-based analyses carried out by engineers. While the analytical power of the former is often concealed by an inundation of abstract mathematical machinery, the accuracy and generality of the latter are constrained by the empirical nature of the ensuing derivations. We hope to bridge that gap here. In this thesis, a general theory of electrical oscillators under the influence of a periodic injection is developed from first principles. Our approach leads to a fundamental yet intuitive understanding of the process by which oscillators lock to a periodic injection, as well as what happens when synchronization fails and the oscillator is instead injection pulled. By considering the autonomous and periodically time-varying nature that underlies all oscillators, we build a time-synchronous model that is valid for oscillators of any topology and periodic disturbances of any shape. A single first-order differential equation is shown to be capable of making accurate, quantitative predictions about a wide array of properties of periodically disturbed oscillators: the range of injection frequencies for which synchronization occurs, the phase difference between the injection and the oscillator under lock, stable vs. unstable modes of locking, the pull-in process toward lock, the dynamics of injection pulling, as well as phase noise in both free-running and injection-locked oscillators. The framework also naturally accommodates superharmonic injection-locked frequency division, subharmonic injection-locked frequency multiplication, and the general case of an arbitrary rational relationship between the injection and oscillation frequencies. A number of novel insights for improving the performance of systems that utilize injection locking are also elucidated. In particular, we explore how both the injection waveform and the oscillator's design can be modified to optimize the lock range. The resultant design techniques are employed in the implementation of a dual-moduli prescaler for frequency synthesis applications which features low power consumption, a wide operating range, and a small chip area. For the commonly used inductor-capacitor (LC) oscillator, we make a simple modification to our framework that takes the oscillation amplitude into account, greatly enhancing the model's accuracy for large injections. The augmented theory uniquely captures the asymmetry of the lock range as well as the distinct characteristics exhibited by different types of LC oscillators. Existing injection locking and pulling theories in the available literature are subsumed as special cases of our model. It is important to note that even though the veracity of our theoretical predictions degrades as the size of the injection grows due to our framework's linearization with respect to the disturbance, our model's validity across a broad range of practical injection strengths are borne out by simulations and measurements on a diverse collection of integrated LC, ring, and relaxation oscillators. Lastly, we also present a phasor-based analysis of LC and ring oscillators which yields a novel perspective into how the injection current interacts with the oscillator's core nonlinearity to facilitate injection locking.</p

Mathematical Modeling of Electronic Systems: From Oscillators to Multipliers

The ubiquity of electronics in modern technology is undeniable. Although it is not feasible to design or analyze circuits in an exhaustively detailed fashion, it is still imperative that circuit design engineers understand the pertinent physical tradeoffs and are able to think at the appropriate level of mathematical abstraction. This thesis presents several mathematical modeling techniques of common electronic systems. First, we derive, ab initio, a general analytical model for the behavior of electrical oscillators under injection without making any assumptions about the type of oscillator or the size or shape of the injection. This model provides novel insights into the phenomena of injection locking and pulling while subsuming existing theories found in the literature. Next, we focus on the familiar scenario of an inductor-capacitor (LC) oscillator locked to a sinusoidal signal. An exact analysis of this circuit is carried out for an arbitrary injection strength and frequency, a task which has not been executed to fruition in the existing literature. This analysis intuitively illuminates the fundamental physics underlying the synchronization of electrical harmonic oscillators, and it generalizes the notion of the lock range for such oscillators into separate necessary and sufficient conditions. We then turn to the classical estimate of the bandwidth of a linear time-invariant (LTI) system via the sum of its zero-value time constants (ZVTs), and we show that this sum can actually be used to tightly bound the bandwidth—both from above and from below—in addition to simply estimating it. Finally, we look at a natural generalization of the Gilbert cell topology: an analog multiplier for an arbitrary number of inputs; we then analyze its large- and small-signal characteristics as well as its frequency response. Throughout, we will demonstrate how infusing physical intuition with mathematical rigor whilst seeking a balance between detailed analysis and abstract modularity results in models that are conceptually insightful, sufficiently accurate, and computationally feasible.</p

Computationally Efficient Innovative Techniques for the Design-Oriented Simulation of Free-Running and Driven Microwave Oscillators

Analysis techniques for injection-locked oscillators/amplifiers (ILO) can be broadly divided into two classes. To the first class belong methods with a strong and rigorous theoretical basis, that can be applied to rather general circuits/systems but which are very cumbersome and/or time-consuming to apply. To the second class belong methods which are very simple and fast to apply, but either lack of validity/accuracy or are applicable only to very simple or particular cases. In this thesis, a novel method is proposed which aims at combining the rigorousness and broad applicability characterizing the first class of analysis techniques above cited with the simplicity and computational efficiency of the second class. The method relies in the combination of perturbation-refined techniques with a fundamental frequency system approach in the dynamical complex envelope domain. This permits to derive an approximate, but first-order exact, differential model of the phase-locked system useable for the steady-state, transient and stability analysis of ILOs belonging to the rather broad (and rigorously identified) class of nonlinear oscillators considered. The hybrid (analytical-numerical) nature of the formulation developed is suited for coping with all ILO design steps, from initial dimensioning (exploiting, e.g., the simplified semi-analytical expressions stemming from a low-level injection operation assumption) to accurate prediction (and fine-tuning, if required) of critical performances under high-injection signal operation. The proposed application examples, covering realistically modeled low- and high-order ILOs of both reflection and transmission type, illustrate the importance of having at one's disposal a simulation/design tool fully accounting for the deviation observed, appreciable for instance in the locking bandwidth of high-frequency circuits with respect to the simplified treatments usually applied, for a quick arrangement, in ILO design optimization procedures.Analysis techniques for injection-locked oscillators/amplifiers (ILO) can be broadly divided into two classes. To the first class belong methods with a strong and rigorous theoretical basis, that can be applied to rather general circuits/systems but which are very cumbersome and/or time-consuming to apply. To the second class belong methods which are very simple and fast to apply, but either lack of validity/accuracy or are applicable only to very simple or particular cases. In this thesis, a novel method is proposed which aims at combining the rigorousness and broad applicability characterizing the first class of analysis techniques above cited with the simplicity and computational efficiency of the second class. The method relies in the combination of perturbation-refined techniques with a fundamental frequency system approach in the dynamical complex envelope domain. This permits to derive an approximate, but first-order exact, differential model of the phase-locked system useable for the steady-state, transient and stability analysis of ILOs belonging to the rather broad (and rigorously identified) class of nonlinear oscillators considered. The hybrid (analytical-numerical) nature of the formulation developed is suited for coping with all ILO design steps, from initial dimensioning (exploiting, e.g., the simplified semi-analytical expressions stemming from a low-level injection operation assumption) to accurate prediction (and fine-tuning, if required) of critical performances under high-injection signal operation. The proposed application examples, covering realistically modeled low- and high-order ILOs of both reflection and transmission type, illustrate the importance of having at one's disposal a simulation/design tool fully accounting for the deviation observed, appreciable for instance in the locking bandwidth of high-frequency circuits with respect to the simplified treatments usually applied, for a quick arrangement, in ILO design optimization procedures

Injection locked ring oscillator design for application in Direct Time of Flight LIDAR

Diplomová práce přibližuje systémy LIDAR přímo měřící čas průletu a časově digitální převodníky určené k použití v těchto systémech. Představuje problematiku distribuce hodinových signálů napříč soubory časově digitálních převodníků v LIDAR systémech a věnuje se jednomu z nových řešení této problematiky, které je založené na injekcí zavěšených oscilátorech. Technika injekčního zavěšení oscilátorů je důkladně matematicky popsána. V programu Matlab byl vytvořen simulační model injekcí zavěšeného kruhového oscilátoru, který potvrzuje správnost uvedených analytických predikcí. Ve výrobní technologii ONK65 byl navržen injekcí zavěšený kruhový oscilátor stabilizovaný pomocí smyčky závěsu zpoždění, určený pro implementaci časově digitálního převodníku pro systém LIDAR. Navržený injekcí zavěšený kruhový oscilátor byl verifikován počítačovými simulacemi zohledňujícími vliv procesních, napěťových i teplotních variací. Oscilátor poskytuje specifikované časové rozlišení 50 pikosekund a dosahuje dvakrát nižší hodnoty fázového neklidu než ekvivalentní volnoběžný oscilátor v dané technologii.The diploma thesis provides an introduction to Direct Time of Flight LIDAR systems and Time to Digital Converters used in these systems. It discusses the problem of clock distribution in LIDAR Time to Digital Converter arrays, and examines one of the possible solutions to this problem based on injection locked oscillators. The injection locking phenomenon is thoroughly mathematically described and a Matlab model of an injection locked ring oscillator is presented, confirming the analytic predictions. In ONK65 processing technology, an injection locked ring oscillator biased by a delay locked loop meant specifically for application in Time to Digital Converters for LIDAR systems has been designed. The designed oscillator has been verified by computer simulations taking process, voltage and temperature variations into account and offers specified time resolution of 50 picosecond as well as two times less clock jitter than an equivalent free-running oscillator in the given processing technology.

LOW-POWER FREQUENCY SYNTHESIS BASED ON INJECTION LOCKING

Ph.DDOCTOR OF PHILOSOPH

INJECTION-LOCKING TECHNIQUES FOR MULTI-CHANNEL ENERGY EFFICIENT TRANSMITTER

Ph.DDOCTOR OF PHILOSOPH

Ku band rotary traveling-wave voltage controlled oscillator

Voltage-controlled oscillator (VCO) plays a key role in determination of the link budget of wireless communication, and consequently the performance of the transceiver. Lowering the noise contribution from the VCO to the entire system is always challenging and remains the active research area. Motivated by high demands for the low-phase noise, low-power consumption VCO in the application of 5G, radar-sensing system, implantable device, to name a few, this research focused on the design of a rotary travelling-wave oscillator (RTWO). A power conscious RTWO with reliable direction control of the wave propagation was investigated. The phase noise was analyzed based on the proposed RTWO. The phase noise reduction technique was introduced by using tail current source filtering technique in which a figure-8 inductors were employed. Three RTWO were implemented based on GF 130 nm standard CMOS process and TSMC 130 nm standard CMOS process. The first design was achieving 16-GHz frequency with power consumption of 5.8-mW with 190.3 dBc/Hz FoM at 1 MHz offset. The second and third design were operating at 14-GHz with a power consumption range of 13-18.4mW and 14.6-20.5mW, respectively. The one with filtering technique achieved FoM of 184.8 dBc/Hz at 1 MHz whereas the one without inudctor filtering obtained FoM of 180.8 dBc/Hz at 1 MHz offset based on simulation

Design of Power-Efficient Optical Transceivers and Design of High-Linearity Wireless Wideband Receivers

The combination of silicon photonics and advanced heterogeneous integration is promising for next-generation disaggregated data centers that demand large scale, high throughput, and low power. In this dissertation, we discuss the design and theory of power-efficient optical transceivers with System-in-Package (SiP) 2.5D integration. Combining prior arts and proposed circuit techniques, a receiver chip and a transmitter chip including two 10 Gb/s data channels and one 2.5 GHz clocking channel are designed and implemented in 28 nm CMOS technology. An innovative transimpedance amplifier (TIA) and a single-ended to differential (S2D) converter are proposed and analyzed for a low-voltage high-sensitivity receiver; a four-to-one serializer, programmable output drivers, AC coupling units, and custom pads are implemented in a low-power transmitter; an improved quadrature locked loop (QLL) is employed to generate accurate quadrature clocks. In addition, we present an analysis for inverter-based shunt-feedback TIA to explicitly depict the trade-off among sensitivity, data rate, and power consumption. At last, the research on CDR-based​ clocking schemes for optical links is also discussed. We introduce prior arts and propose a power-efficient clocking scheme based on an injection-locked phase rotator. Next, we analyze injection-locked ring oscillators (ILROs) that have been widely used for quadrature clock generators (QCGs) in multi-lane optical or wireline transceivers due to their low power, low area, and technology scalability. The asymmetrical or partial injection locking from 2 phases to 4 phases results in imbalances in amplitude and phase. We propose a modified frequency-domain analysis to provide intuitive insight into the performance design trade-offs. The analysis is validated by comparing analytical predictions with simulations for an ILRO-based QCG in 28 nm CMOS technology. This dissertation also discusses the design of high-linearity wireless wideband receivers. An out-of-band (OB) IM3 cancellation technique is proposed and analyzed. By exploiting a baseband auxiliary path (AP) with a high-pass feature, the in-band (IB) desired signal and out-of-band interferers are split. OB third-order intermodulation products (IM3) are reconstructed in the AP and cancelled in the baseband (BB). A 0.5-2.5 GHz frequency-translational noise-cancelling (FTNC) receiver is implemented in 65nm CMOS to demonstrate the proposed approach. It consumes 36 mW without cancellation at 1 GHz LO frequency and 1.2 V supply, and it achieves 8.8 MHz baseband bandwidth, 40dB gain, 3.3dB NF, 5dBm OB IIP3, and −6.5dBm OB B1dB. After IM3 cancellation, the effective OB-IIP3 increases to 32.5 dBm with an extra 34 mW for narrow-band interferers (two tones). For wideband interferers, 18.8 dB cancellation is demonstrated over 10 MHz with two −15 dBm modulated interferers. The local oscillator (LO) leakage is −92 dBm and −88 dB at 1 GHz and 2 GHz LO respectively. In summary, this technique achieves both high OB linearity and good LO isolation

Ultra Low-Power Frequency Synthesizers for Duty Cycled IoT radios

Internet of Things (IoT), which is one of the main talking points in the electronics industry today, consists of a number of highly miniaturized sensors and actuators which sense the physical environment around us and communicate that information to a central information hub for further processing. This agglomeration of miniaturized sensors helps the system to be deployed in previously impossible arenas such as healthcare (Body Area Networks - BAN), industrial automation, real-time monitoring environmental parameters and so on; thereby greatly improving the quality of life. Since the IoT devices are usually untethered, their energy sources are limited (typically battery powered or energy scavenging) and hence have to consume very low power. Today's IoT systems employ radios that use communication protocols like Bluetooth Smart; which means that they communicate at data rates of a few hundred kb/s to a few Mb/s while consuming around a few mW of power. Even though the power dissipation of these radios have been decreasing steadily over the years, they seem to have reached a lower limit in the recent times. Hence, there is a need to explore other avenues to further reduce this dissipation so as to further improve the energy autonomy of the IoT node. Duty cycling has emerged as a promising alternative in this sense since it involves radios transmitting very short bursts of data at high rates and being asleep the rest of the time. In addition, high data rates proffer the added advantage of reducing network congestion which has become a major problem in IoT owing to the increase in the number of sensor nodes as well as the volume of data they send. But, as the average power (energy) dissipated decreases due to duty cycling, the energy overhead associated with the start-up phase of the radio becomes comparable with the former. Therefore, in order to take full advantage of duty cycling, the radio should be capable of being turned ON/OFF almost instantaneously. Furthermore, the radio of the future should also be able to support easy frequency hopping to improve the system efficiency from an interference point of view. In other words, in addition to high data rate capability, the next generation radios must also be highly agile and have a low energy overhead. All these factors viz. data rate, agility and overhead are mainly dependent on the radio's frequency synthesizer and therefore emphasis needs to be laid on developing new synthesizer architectures which are also amenable to technology scaling. This thesis deals with the evolution of one such all-digital frequency synthesizer; with each step dealing with one of the aforementioned issues. In order to reduce the energy overhead of the synthesizer, FBAR resonators (which are a class of MEMS resonators) are used as the frequency reference instead of a traditional quartz crystal. The FBAR resonators aid the design of fast-startup oscillators as opposed to the long latency associated with the start-up of the crystal oscillator. In addition, the frequency stability of the FBAR lends itself to open-loop architecture which can support very high data rates. Another advantage of the open-loop architecture is the frequency agility which aids easy channel switching for multi-hop architectures, as demonstrated in this thesis