Hypercube technology

The JPL designed MARKIII hypercube supercomputer has been in application service since June 1988 and has had successful application to a broad problem set including electromagnetic scattering, discrete event simulation, plasma transport, matrix algorithms, neural network simulation, image processing, and graphics. Currently, problems that are not homogeneous are being attempted, and, through this involvement with real world applications, the software is evolving to handle the heterogeneous class problems efficiently

Efficient instruction level simulation of computers

Journal ArticleA technique for creating efficient, yet highly accurate, instruction level simulation models of computers is described. In contrast to traditional approaches that use a software interpreter, this technique employs direct execution of application programs on the host computer. An assembly language program for the machine to be modeled is decompiled to a high level language, instrumented, and then recompiled and executed on the host computer. A prototype implementation modeling the Motorola MC68010 microprocessor is described, and the efficiency and accuracy of this prototype is reported. It is demonstrated that the direct execution technique can be used to produce accurate simulation models which are orders of magnitude faster than traditional, register transfer level simulators

Enhanced performance simulation of diesel engines

SIGLEAvailable from British Library Document Supply Centre- DSC:DX90577 / BLDSC - British Library Document Supply CentreGBUnited Kingdo

Multiprocessor system design tutor : expert system approach

To increase computational bandwidth and system resilience, integration of several microprocessors in a single system becomes necessary. The overall throughput and efficiency of such a system is directly dependent on the hardware and software interconnection supported by the basic microprocessor chip. Sometimes it becomes difficult to put together all the information for design criteria and all the design related formulas. The approach made here is to continuously update the hardware and software information in the database related to a given microprocessor. This information can be accessed at any time for efficient design solution. Intel 80386 and Motorola 68020 microprocessors are reviewed in detail and all the information is stored in a database. The above approach has been implemented in the Multiprocessor System Design - Tutor (MSDT) using the Informix relational database management system. MSDT is a menu driven system implemented to help the system design engineers. MSDT stores and maintains information related to multiprocessor system design, which includes multiprocessor system requirements, microprocessor characteristics, the role of microprocessor in multiprocessor system design and interconnection network configurations and their performance factors. This information is presented to the user via the screen building utility of Informix-4GL; the user can also get a hard copy of all the information within the database by running the report generation utility. MSDT also has security password protection. The system has a good help facility available for the design process. At any given time the user can update the data in the table using this menu driven system. The system is intended to grow into a complete evaluation system based on the Informix-4GL. It is developed on the basis of Fourth Generation Language which has a screen building utility, a menu building utility, a report writer and a window manager. This system will suggest the candidate microprocessor and suitable support chips and interconnection techniques for different applications

Kinematics and control algorithm development and simulation for a redundant two-arm robotic manipulator system

An efficient approach to cartesian motion and force control of a 7 degree of freedom (DOF) manipulator is presented. It is based on extending the active stiffness controller to the 7 DOF case in general and use of an efficient version of the gradient projection technique for solving the inverse kinematics problem. Cooperative control is achieved through appropriate configuration of individual manipulator controllers. In addition, other aspects of trajectory generation using standard techniques are integrated into the controller. The method is then applied to a specific manipulator of interest (Robotics Research T-710). Simulation of the kinematics, dynamics, and control are provided in the context of several scenarios: one pertaining to a noncontact pick and place operation; one relating to contour following where contact is made between the manipulator and environment; and one pertaining to cooperative control

An Efficient Reliable Broadcast Protocol

Many distributed and parallel applications can make good use of broadcast communication. In this paper we present a (software) protocol that simulates reliable broadcast, even on an unreliable network. Using this protocol, application programs need not worry about lost messages. Recovery of communication failures is handled automatically and transparently by the protocol. In normal operation, our protocol is more efficient than previously published reliable broadcast protocols. An initial implementation of the protocol on 10 MC68020 CPUs connected by a 10 Mbit/sec Ethernet performs a reliable broadcast in 1.5 msec

Implementation and design of a teleoperation system based on a VMEBUS/68020 pipelined architecture

A pipelined control design and architecture for a force-feedback teleoperation system that is being implemented at the Jet Propulsion Laboratory and which will be integrated with the autonomous portion of the testbed to achieve share control is described. At the local site, the operator sees real-time force/torque displays and moves two 6-degree of freedom (dof) force-reflecting hand-controllers as his hands feel the contact force/torques generated at the remote site where the robots interact with the environment. He also uses a graphical user menu to monitor robot states and specify system options. The teleoperation software is written in the C language and runs on MC68020-based processor boards in the VME chassis, which utilizes a real-time operating system; the hardware is configured to realize a four-stage pipeline configuration. The environment is very flexible, such that the system can easily be configured as a stand-alone facility for performing independent research in human factors, force control, and time-delayed systems

Emulation of a Complex Instruction Set Computer with a Reduced Instruction Set Computer

This paper analyzes some of the difficulties of emulating a Complex Instruction Set Computer (CISC) with a Reduced Instruction Set Computer (RISC). It will be shown that although the speed advantage of a RISC is sacrificed, a CISC can be emulated with the exception of software constructs that support nonstandard hardware interfaces. Some concrete examples will be used to help illustrate the execution- time bottlenecks as well as to discuss possible solutions from an architectural point of view for both Silicon and Gallium Arsenide (GaAs). In addition, it will be shown that the most efficient method of emulation involves debugging compiled High-Level Language (HLL) source code on a CISC, and then recompiling the HLL code with a compiler that is familiar with the target RISC architectur

A Lifetime-based Garbage Collector for LISP Systems on General-Purpose Computers

Garbage collector performance in LISP systems on custom hardware has been substantially improved by the adoption of lifetime-based garbage collection techniques. To date, however, successful lifetime-based garbage collectors have required special-purpose hardware, or at least privileged access to data structures maintained by the virtual memory system. I present here a lifetime-based garbage collector requiring no special-purpose hardware or virtual memory system support, and discuss its performance