A Design of a High-Performance Analog Front-End for Passive UHF RFID Tag EPC C1G2

This paper introduces a high-performance analog front end for passive UHF RFID tag compatible with the EPC Class-1 Generation 2 (EPC C1G2) standard protocol. The proposed front end of a passive tag which contains the following modules: a power generation circuit which is composed of a matching circuit and an RF-limiter circuit, an NMOS rectifier, a DC limiter, a voltage regulation, a modulation and ASK demodulation circuit, a power-on-reset circuit, a ring oscillator which generates a clock of 1.28 MHz. The originality of this work is the proposal of a voltage regulation circuit composed of two distinct LDO regulators that share the same reference voltage and are designed to generate a Vdd1 (0.5 V) for the analog supply and Vdd2 (1 V) for digital power supply, under conditions of 50 Ω antenna, 900 MHz, a sensitivity of -24 dBm and a maximum consumption of 1 µW. The operating distance of the RFID is more than 25 meters based on the regulated 4 W effective isotropic radiated power (EIRP). The chip area of the proposed analog front end is only 79 μm × 83 μm. The simulation results in 90 nm CMOS process confirm the performance of the proposed analog front-end

Next generation RFID telemetry design for biomedical implants.

The design and development of a Radio Frequency Identification (RFID) based pressure-sensing system to increase the range of current Intra-Ocular Pressure (IOP) sensing systems is described in this dissertation. A large number of current systems use near-field inductive coupling for the transfer of energy and data, which limits the operational range to only a few centimeters and does not allow for continuous monitoring of pressure. Increasing the powering range of the telemetry system will offer the possibility of continuous monitoring since the reader can be attached to a waist belt or put on a night stand when sleeping. The system developed as part of this research operates at Ultra-High Frequencies (UHF) and makes use of the electromagnetic far field to transfer energy and data, which increases the potential range of operation and allows for the use of smaller antennas. The system uses a novel electrically small antenna (ESA) to receive the incident RF signal. A four stage Schottky circuit rectifies and multiplies the received RF signal and provides DC power to a Colpitts oscillator. The oscillator is connected to a pressure sensor and provides an output signal frequency that is proportional to the change in pressure. The system was fabricated using a mature, inexpensive process. The performance of the system compares well with current state of the art, but uses a smaller antenna and a less expensive fabrication process. The system was able to operate over the desired range of 1 m using a half-wave dipole antenna. It was possible to power the system over a range of at least 6.4 cm when the electrically small antenna was used as the receiving antenna

Power Management Circuits for Low-Power RF Energy Harvesters

The paper describes the design and implementation of power management circuits for RF energy harvesters suitable for integration in wireless sensor nodes. In particular, we report the power management circuits used to provide the voltage supply of an integrated temperature sensor with analog-to-digital converter. A DC-DC boost converter is used to transfer efficiently the energy harvested from a generic radio-frequency rectifier into a charge reservoir, whereas a linear regulator scales the voltage supply to a suitable value for a sensing and conversion circuit. Implemented in a 65 nm CMOS technology, the power management system achieves a measured overall efficiency of 20%, with an available power of 4.5 μW at the DC-DC converter input. The system can sustain a temperature measurement rate of one sample/s with an RF input power of −28 dBm, making it compatible with the power levels available in generic outdoor environments

Design of a Low-Cost Passive UHF RFID tag in 0.18um CMOS technology

The work addresses the design of a passive UHF Radio-Frequency Identification (RFID) tag. In order to realize a product able to be competitive in the RFID expanding market, a cost reduction policy has been applied in the design: a general purpose digital technology has been employed, resorting to specific techniques in order to overcome the limitations due to the lack of process options. Such solutions are accurately described, and every block composing the transponder analog frontend is analyzed, highlighting advantages and disadvantages of the proposed architectures with respect to the ones present in literature. The circuits theory is validated through simulations and experimental data.Il lavoro di tesi è imperniato sul progetto di un tag passivo per l'Identificazione a Radio-Frequenza (RFID) operante nelle bande UHF. Per il progetto è stata applicata una politica di riduzione dei costi, così da proporre un prodotto in grado di essere competitivo nel fiorente mercato dell'RFID: è stata scelta una tecnologia digitale general-purpose, e specifiche tecniche di progettazione sono state utilizzate per superare le limitazioni dovute alla scarsità di opzioni di processo. Le soluzioni adottate sono descritte accuratamente, ed è riportata l'analisi di ogni singolo blocco componente il frontend analogico, evidenziando vantaggi e svantaggi delle architetture proposte rispetto a quelle presenti in letteratura. La validità della teoria alla base dei circuiti è stata verificata tramite simulazioni e dati sperimentali

High-Efficiency Low-Voltage Rectifiers for Power Scavenging Systems

Abstract Rectifiers are commonly used in electrical energy conversion chains to transform the energy obtained from an AC signal source to a DC level. Conventional bridge and gate cross-coupled rectifier topologies are not sufficiently power efficient, particularly when input amplitudes are low. Depending on their rectifying element, their power efficiency is constrained by either the forward-bias voltage drop of a diode or the threshold voltage of a diode-connected MOS transistor. Advanced passive rectifiers use threshold cancellation techniques to effectively reduce the threshold voltage of MOS diodes. Active rectifiers use active circuits to control the conduction angle of low-loss MOS switches. In this thesis, an active rectifier with a gate cross-coupled topology is proposed, which replaces the diode-connected MOS transistors of a conventional rectifier with low-loss MOS switches. Using the inherent characteristics of MOS transistors as comparators, dynamic biasing of the bulks of main switches and small pull-up transistors, the proposed self-supplied active rectifier exhibits smaller voltage drop across the main switches leading to a higher power efficiency compared to conventional rectifier structures for a wide range of operating frequencies in the MHz range. Delivery of high load currents is another feature of the proposed rectifier. Using the bootstrapping technique, single- and double-reservoir based rectifiers are proposed. They present higher power and voltage conversion efficiencies compared to conventional rectifier structures. With a source amplitude of 3.3 V, when compared to the gate cross-coupled topology, the proposed active rectifier offers power and voltage conversion efficiencies improved by up to 10% and 16% respectively. The proposed rectifier using the bootstrap technique, including double- and single-reservoir schemes, are well suited for very low input amplitudes. They present power and voltage conversion efficiencies of 75% and 76% at input amplitude of 1.0 V and maintain their high efficiencies over input amplitudes greater than 1.0V. Single-reservoir bootstrap rectifier also reduces die area by 70% compared to its double-reservoir counterpart.---------Résumé Les redresseurs sont couramment utilisés dans de nombreux systèmes afin de transformer l'énergie électrique obtenue à partir d'une source alternative en une alimentation continue. Les topologies traditionnelles telles que les ponts de diodes et les redresseurs se servant de transistors à grilles croisées-couplées ne sont pas suffisamment efficaces en terme d’énergie, en particulier pour des signaux à faibles amplitudes. Dépendamment de leur élément de redressement, leur efficacité en termes de consommation d’énergie est limitée soit par la chute de tension de polarisation directe d'une diode, soit par la tension de seuil du transistor MOS. Les redresseurs passifs avancés utilisent une technique de conception pour réduire la tension de seuil des diodes MOS. Les redresseurs actifs utilisent des circuits actifs pour contrôler l'angle de conduction des commutateurs MOS à faible perte. Dans cette thèse, nous avons proposé un redresseur actif avec une topologie en grille croisée-couplée. Elle utilise des commutateurs MOS à faible perte à la place des transistors MOS connectés en diode comme redresseurs. Le circuit proposé utilise: des caractéristiques intrinsèques des transistors MOS pour les montages comparateurs et une polarisation dynamique des substrats des commutateurs principaux supportés par de petits transistors de rappel. Le redresseur proposé présente des faibles chutes de tension à travers le commutateur principal menant à une efficacité de puissance plus élevée par rapport aux structures d’un redresseur conventionnel pour une large gamme de fréquences de fonctionnement de l’ordre des MHz. La conduction des courants de charge élevée est une autre caractéristique du redresseur proposé. En utilisant la méthode de bootstrap, des redresseurs à simple et à double réservoir sont proposés. Ils présentent une efficacité de puissance et un rapport de conversion de tension élevés en comparaison avec les structures des redresseurs conventionnels. Avec une amplitude de source de 3,3 V, le redresseur proposé offre des efficacités de puissance et de conversion de tension améliorées par rapport au circuit à transistors croisés couplés. Ces améliorations atteignent 10% et 16% respectivement. Les redresseurs proposés utilisent la technique de bootstrap. Ils sont bien adaptés pour des amplitudes d'entrée très basses. À une amplitude d'entrée de 1,0 V, ces derniers redresseurs présentent des rendements de conversion de puissance et de tension de 75% et 76%. Le redresseur à simple réservoir réduit également l’aire de silicium requise de 70% par rapport à la version à double-réservoir

A Novel Micro Piezoelectric Energy Harvesting System

(Doktora) -- İstanbul Teknik Üniversitesi, Fen Bilimleri Enstitüsü, 2007(PhD) -- İstanbul Technical University, Institute of Science and Technology, 2007Bu tezde yeni bir titreşim temelli mikro enerji harmanlayıcı sistemi önerilmiştir. Titreşimler ve ani hareketler, mekanik yapının sadece eğilmesine değil aynı zamanda gerilmesine yol açar, bu sayede sistem doğrusal olmayan bölgede çalışır. İnce piezoelektrik film tabakası mekanik stresi elektrik enerjisine çevirir. Mikrowatt mertebesinde güç seviyeleri mm3’lük aletlerle elde edilebilir, bu da güneş panellerinde elde edilen güç yoğunlukları kadar yüksektir. Algılayıcı kabiliyeti sayesinde bilgi depolayabilen, kum tanesi büyüklüğünde olan ve üretiminde kullanılan temel malzeme silikon olan bu aletler “zeki kum” olarak isimlendirilmiştir. Mekanik yapının modellenmesi ve tasarımı geliştirilmiş ve üretim sonuçları da ayrıca verilmiştir. Sistemin bilgi gönderebilmesi ve alabilmesi amacıyla iyi bilinen RFID teknolojisi tabanlı bir kablosuz haberleşme yöntemi önerilmiştir. Bu bağlamda, paket taşımacılığında sürekli ivme denetleme, sınır güvenliği için kendinden beslemeli algılayıcılar, çabuk bozulan yiyeceklerin taşımacılığında sıcaklık denetleme ve pilsiz kalp atışı algılayıcı gibi birçok uygulama önerilmiştir.In this thesis, a novel, vibration based micro energy harvester system is proposed. Vibrations or sudden movements cause the mechanical structure does not only bend but also stretch, thus working in non-linear regime. The piezoelectric thin film layer converts the mechanical stress into the electrical energy. Microwatts of power can be achieved with a mm3 device which yields a high power density levels on the order of the solar panels. This device is named “smart sand”, because it has also sensor capabilities that can store information, its size is almost a sand grain and the main material used for the fabrication is silicon. The modeling and design of the mechanical structure has been developed and fabrication results have also been given in the thesis. In order for the system to send and receive the information, a wireless communication scheme is proposed which is based on the well-known RFID technology. In this concept, several applications are proposed such as continuous acceleration monitoring in package delivery, self-powered sensors for homeland security, temperature monitoring of the perishable food item delivery and a batteryless heart rate sensor.DoktoraPh

Chipless Wireless High-Temperature Sensing in Time-Variant Environments

The wireless sensing of various physical quantities is demanded in numerous applications. A usual wireless sensor is based on the functionality of semiconductor Integrated Circuits (ICs), which enable the radio communication. These ICs may limit the application potential of the sensor in certain specific applications. One of these applications stands in the focus of this thesis: the operation in harsh environments, e.g., at high temperatures above 175°C, where most available sensors fail. Chipless wireless sensors are researched to exceed such chip-based limitations. A chipless sensor is setup as an entirely electro-magnetic circuit, and uses passive Radio Frequency (RF) backscatter principles to encode and transmit the measured value. Chipless sensors that target harsh environment operation are facing two important challenges: First, the disturbance by clutter, caused by time-variant reflections of the interrogation signal in the sensor environment and second, the design of suitable measurand transducers. These challenges are addressed in the thesis. To overcome the first challenge, three basic chipless sensor concepts feasible for operation in clutter environments are introduced. The concepts are realized by demonstrator designs of three temperature sensors and are proofed by wireless indoor measurements. A channel estimation method is presented that dynamically estimates and suppresses clutter signals to reduce measurement errors. To overcome the second challenge, measurand-sensitive dielectric materials are used as measurement transducers, and are being characterized by a novel high-temperature microwave dielectric characterization method. Complex permittivity characterization results in temperatures up to 900°C are presented. Finally, in-depth description and discussion of the three chipless concepts is given as well as a performance comparison in wireless indoor measurement scenarios. The first concept is based on polarization separation between the wanted sensor backscatter signal and unwanted clutter. The second concept separates tag and clutter signals in the frequency domain by using harmonic radar. The third concept exploits the slow decay of high-Q resonances in order to achieve the desired separation in time domain. This concept’s realization is based on dielectric resonators and has demon- strated the capability of wirelessly measuring temperatures up to 800°C without requiring an optical line-of-sight. This performance significantly exceeds temperature- and detection-limitations of commercially available sensors at the current state-of-the-art

RESISTIVE SWITCHING CHARACTERISTICS OF NANOSTRUCTURED AND SOLUTION-PROCESSED COMPLEX OXIDE ASSEMBLIES

Miniaturization of conventional nonvolatile (NVM) memory devices is rapidly approaching the physical limitations of the constituent materials. An emerging random access memory (RAM), nanoscale resistive RAM (RRAM), has the potential to replace conventional nonvolatile memory and could foster novel type of computing due to its fast switching speed, high scalability, and low power consumption. RRAM, or memristors, represent a class of two terminal devices comprising an insulating layer, such as a metal oxide, sandwiched between two terminal electrodes that exhibits two or more distinct resistance states that depend on the history of the applied bias. While the sudden resistance reduction into a conductive state in metal oxide insulators has been known for almost 50 years, the fundamental resistive switching mechanism is a complex phenomenon that is still long-debated, complex process. Further improvements to existing memristor performance require a complete understanding of memristive properties under various operation conditions. Additional technical issues also remain, such as the development of facile, low-cost fabrication methods as an alternative to expensive, ultra-high vacuum (UHV) deposition methods. This collection of work explores resistive switching within metal oxide-based memristive material assemblies by analyzing the fundamental physical insulating material properties. Chapter 3 aims to translate the utility and simplicity of the highly ordered anodic aluminum oxide (AAO) template structure to complex, yet more functional (memristive) materials. Functional oxides possessing ordered, scalable nanoporous arrays and nanocapacitor arrays over a large area is of interest to both the fields of next-generation electronics and energy storing/harvesting devices. Here their switching performance will be evaluated using conductive atomic force microscopy (C-AFM). Chapter 4 demonstrates a convective self-assembly fabrication method that effectively enables the synthesis of a low-cost solution processed memristor comprising binary oxide and perovskite ABO3 nanocrystals of varying diameter. Chapter 5 systematically compares the influence of inter-nanoparticle distance on the threshold switching SET voltage of hafnium oxide (HfO2) memristors. Utilizing shorter phosphonic acid ligands with higher binding affinity on the nanocrystal surface enabled a record-low SET voltage to be achieved. Chapter 6 extends the scope to the fine tuning of solution processed memristors with two types of perovskites nanocrystals. The primary advantage of nanocrystal memristors is the ability to draw from additional degrees of freedom by tuning the constituent nanocrystal material properties. Recent advancement of solution phase techniques enables a high degree of controllability over the nanocrystal size and structure. Thus, this work found in this dissertation aims to understand and decouple the effects of the geometric size and substitutional nanocrystal parameters on resistive switching

A low power, reconfigurable fabric body area network for healthcare applications

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.Cataloged from PDF version of thesis.Includes bibliographical references (p. 105-110).Body Area Networks (BANs) are gaining prominence for their capability to revolutionize medical monitoring, diagnosis and treatment. This thesis describes a BAN that uses conductive fabrics (e-textiles) worn by the user to act as a power distribution and data communication network to sensors on the user's body. The network is controlled by a central hub in the form of a Base Station, which can either be a standalone device or can be embedded inside one of the user's portable electronic devices like a cellphone. Specifications for a Physical (PHY) layer and a Medium Access Control (MAC) layer have been developed that make use of the asymmetric energy budgets between the base station and sensor nodes in the network. The PHY layer has been designed to be suitable for the unique needs of such a BAN, namely easy reconfigurability, fault-tolerance and efficient energy and data transfer at low power levels. This is achieved by a mechanism for dividing the network into groups of sensors. The co-designed MAC layer is capable of supporting a wide variety of sensors with different data rate and network access requirements, ranging from EEG monitors to temperature sensors. Circuits have been designed at both ends of the network to transmit, receive and store power and data in appropriate frequency bands. Digital circuits have been designed to implement the MAC protocols. The base station and sensor nodes have been implemented in standard 180nm 1P6M CMOS process, and occupy an area 4.8mm2 and 3.6mm2 respectively. The base station has a minimum power consumption of 2.86mW, which includes the power transmitter, modulation and demodulation circuitry. The sensor nodes can recover up to 33.6paW power to supply to the biomedical signal acquisition circuitry with peak transfer efficiency of 1.2%.by Nachiket Venkappayya Desai.S.M